extern __xdata uint8_t ao_spi_mutex;
-#define ao_spi_get_mask(reg,mask) do {\
- ao_mutex_get(&ao_spi_mutex); \
- (reg) &= ~(mask); \
+#define ao_spi_get_mask(reg,mask,bus) do { \
+ ao_mutex_get(&ao_spi_mutex); \
+ (reg) &= ~(mask); \
} while (0)
-#define ao_spi_put_mask(reg,mask) do { \
- (reg) |= (mask); \
- ao_mutex_put(&ao_spi_mutex); \
+#define ao_spi_put_mask(reg,mask,bus) do { \
+ (reg) |= (mask); \
+ ao_mutex_put(&ao_spi_mutex); \
} while (0)
-#define ao_spi_get_bit(bit) do {\
- ao_mutex_get(&ao_spi_mutex); \
- (bit) = 0; \
+#define ao_spi_get_bit(bit) do { \
+ ao_mutex_get(&ao_spi_mutex); \
+ (bit) = 0; \
} while (0)
-#define ao_spi_put_bit(bit) do { \
- (bit) = 1; \
- ao_mutex_put(&ao_spi_mutex); \
+#define ao_spi_put_bit(bit) do { \
+ (bit) = 1; \
+ ao_mutex_put(&ao_spi_mutex); \
} while (0)
/*
*/
void
-ao_spi_send(void __xdata *block, uint16_t len) __reentrant;
+ao_spi_send_bus(void __xdata *block, uint16_t len) __reentrant;
void
-ao_spi_recv(void __xdata *block, uint16_t len) __reentrant;
+ao_spi_recv_bus(void __xdata *block, uint16_t len) __reentrant;
+
+#define ao_spi_send(block, len, bus) ao_spi_send_bus(block, len)
+#define ao_spi_recv(block, len, bus) ao_spi_recv_bus(block, len)
void
ao_spi_init(void);
+#define ao_spi_init_cs(port, mask) do { \
+ SPI_CS_PORT |= (mask); \
+ SPI_CS_DIR |= (mask); \
+ } while (0)
#define SPI_SLAVE_PIN_2_5 0
#endif
+#define AO_M25_SPI_CS_PORT SPI_CS_PORT
+#define AO_M25_SPI_CS_MASK M25_CS_MASK
+
#endif /* _AO_PINS_H_ */
* so using interrupts would take way too long
*/
void
-ao_spi_send(void __xdata *block, uint16_t len) __reentrant
+ao_spi_send_bus(void __xdata *block, uint16_t len) __reentrant
{
uint8_t *d = block;
* Poll, sending zeros and reading data back
*/
void
-ao_spi_recv(void __xdata *block, uint16_t len) __reentrant
+ao_spi_recv_bus(void __xdata *block, uint16_t len) __reentrant
{
uint8_t *d = block;
extern __xdata uint8_t ao_spi_mutex;
-#define ao_spi_get_mask(reg,mask) do {\
+#define ao_spi_get_mask(reg,mask,bus) do { \
ao_mutex_get(&ao_spi_mutex); \
(reg) &= ~(mask); \
} while (0)
-#define ao_spi_put_mask(reg,mask) do { \
+#define ao_spi_put_mask(reg,mask,bus) do { \
(reg) |= (mask); \
ao_mutex_put(&ao_spi_mutex); \
} while (0)
-#define ao_spi_get_bit(bit) do {\
+#define ao_spi_get_bit(bit,bus) do { \
ao_mutex_get(&ao_spi_mutex); \
(bit) = 0; \
} while (0)
-#define ao_spi_put_bit(bit) do { \
+#define ao_spi_put_bit(bit,bus) do { \
(bit) = 1; \
ao_mutex_put(&ao_spi_mutex); \
} while (0)
+
/*
* The SPI mutex must be held to call either of these
* functions -- this mutex covers the entire SPI operation,
*/
void
-ao_spi_send(void __xdata *block, uint16_t len) __reentrant;
+ao_spi_send_bus(void __xdata *block, uint16_t len) __reentrant;
void
-ao_spi_recv(void __xdata *block, uint16_t len) __reentrant;
+ao_spi_recv_bus(void __xdata *block, uint16_t len) __reentrant;
+
+#define ao_spi_send(block, len, bus) ao_spi_send_bus(block, len)
+#define ao_spi_recv(block, len, bus) ao_spi_recv_bus(block, len)
void
ao_spi_init(void);
+#define ao_spi_init_cs(port, mask) do { \
+ SPI_CS_PORT |= mask; \
+ SPI_CS_DIR |= mask; \
+ SPI_CS_SEL &= ~mask; \
+ } while (0)
#define HAS_ACCEL_REF 1
#define SPI_CS_ON_P1 1
#define SPI_CS_ON_P0 0
- #define M25_CS_MASK 0x02 /* CS0 is P1_1 */
+ #define AO_M25_SPI_CS_MASK 0x02 /* CS0 is P1_1 */
#define M25_MAX_CHIPS 1
#define HAS_ACCEL 1
#define HAS_IGNITE 1
#define HAS_ACCEL_REF 1
#define SPI_CS_ON_P1 1
#define SPI_CS_ON_P0 0
- #define M25_CS_MASK 0x02 /* CS0 is P1_1 */
+ #define AO_M25_SPI_CS_MASK 0x02 /* CS0 is P1_1 */
#define M25_MAX_CHIPS 1
#define HAS_ACCEL 1
#define HAS_IGNITE 1
#define LEDS_AVAILABLE (AO_LED_RED|AO_LED_GREEN)
#define SPI_CS_ON_P1 1
#define SPI_CS_ON_P0 0
- #define M25_CS_MASK 0x04 /* CS0 is P1_2 */
+ #define AO_M25_SPI_CS_MASK 0x04 /* CS0 is P1_2 */
#define M25_MAX_CHIPS 1
#define HAS_ACCEL 0
#define HAS_IGNITE 0
#define SPI_CS_DIR P0DIR
#endif
+#define AO_M25_SPI_CS_PORT SPI_CS_PORT
+
#ifndef IGNITE_ON_P2
#error Please define IGNITE_ON_P2
#endif
* completion one byte before the transfer is actually complete
*/
void
-ao_spi_send(void __xdata *block, uint16_t len) __reentrant
+ao_spi_send_bus(void __xdata *block, uint16_t len) __reentrant
{
ao_dma_set_transfer(ao_spi_dma_in_id,
&U0DBUFXADDR,
* clocks the data coming in.
*/
void
-ao_spi_recv(void __xdata *block, uint16_t len) __reentrant
+ao_spi_recv_bus(void __xdata *block, uint16_t len) __reentrant
{
ao_dma_set_transfer(ao_spi_dma_in_id,
&U0DBUFXADDR,
_asm nop _endasm; \
} while(0)
-#define ao_ee_cs_low() ao_spi_get_bit(EE_CS)
+#define ao_ee_cs_low() ao_spi_get_bit(EE_CS, AO_EE_SPI_BUS)
-#define ao_ee_cs_high() ao_spi_put_bit(EE_CS)
+#define ao_ee_cs_high() ao_spi_put_bit(EE_CS, AO_EE_SPI_BUS)
struct ao_ee_instruction {
uint8_t instruction;
{
ao_ee_cs_low();
ao_ee_instruction.instruction = EE_WREN;
- ao_spi_send(&ao_ee_instruction, 1);
+ ao_spi_send(&ao_ee_instruction, 1, AO_EE_SPI_BUS);
ao_ee_cs_high();
}
{
ao_ee_cs_low();
ao_ee_instruction.instruction = EE_RDSR;
- ao_spi_send(&ao_ee_instruction, 1);
- ao_spi_recv(&ao_ee_instruction, 1);
+ ao_spi_send(&ao_ee_instruction, 1, AO_EE_SPI_BUS);
+ ao_spi_recv(&ao_ee_instruction, 1, AO_EE_SPI_BUS);
ao_ee_cs_high();
return ao_ee_instruction.instruction;
}
ao_ee_cs_low();
ao_ee_instruction.instruction = EE_WRSR;
ao_ee_instruction.address[0] = status;
- ao_spi_send(&ao_ee_instruction, 2);
+ ao_spi_send(&ao_ee_instruction, 2, AO_EE_SPI_BUS);
ao_ee_cs_high();
}
ao_ee_instruction.address[0] = ao_ee_block >> 8;
ao_ee_instruction.address[1] = ao_ee_block;
ao_ee_instruction.address[2] = 0;
- ao_spi_send(&ao_ee_instruction, 4);
- ao_spi_send(ao_ee_data, EE_BLOCK_SIZE);
+ ao_spi_send(&ao_ee_instruction, 4, AO_EE_SPI_BUS);
+ ao_spi_send(ao_ee_data, EE_BLOCK_SIZE, AO_EE_SPI_BUS);
ao_ee_cs_high();
for (;;) {
uint8_t status = ao_ee_rdsr();
ao_ee_instruction.address[0] = ao_ee_block >> 8;
ao_ee_instruction.address[1] = ao_ee_block;
ao_ee_instruction.address[2] = 0;
- ao_spi_send(&ao_ee_instruction, 4);
- ao_spi_recv(ao_ee_data, EE_BLOCK_SIZE);
+ ao_spi_send(&ao_ee_instruction, 4, AO_EE_SPI_BUS);
+ ao_spi_recv(ao_ee_data, EE_BLOCK_SIZE, AO_EE_SPI_BUS);
ao_ee_cs_high();
}
_asm nop _endasm; \
} while(0)
-#define ao_flash_cs_low() ao_spi_get_bit(FLASH_CS)
+#define ao_flash_cs_low() ao_spi_get_bit(FLASH_CS, AO_FLASH_SPI_BUS)
-#define ao_flash_cs_high() ao_spi_put_bit(FLASH_CS)
+#define ao_flash_cs_high() ao_spi_put_bit(FLASH_CS, AO_FLASH_SPI_BUS)
struct ao_flash_instruction {
uint8_t instruction;
ao_flash_instruction.address[0] = FLASH_SET_512_BYTE_0;
ao_flash_instruction.address[1] = FLASH_SET_512_BYTE_1;
ao_flash_instruction.address[2] = FLASH_SET_512_BYTE_2;
- ao_spi_send(&ao_flash_instruction, 4);
+ ao_spi_send(&ao_flash_instruction, 4, AO_FLASH_SPI_BUS);
ao_flash_cs_high();
}
{
ao_flash_cs_low();
ao_flash_instruction.instruction = FLASH_READ_STATUS;
- ao_spi_send(&ao_flash_instruction, 1);
- ao_spi_recv(&ao_flash_instruction, 1);
+ ao_spi_send(&ao_flash_instruction, 1, AO_FLASH_SPI_BUS);
+ ao_spi_recv(&ao_flash_instruction, 1, AO_FLASH_SPI_BUS);
ao_flash_cs_high();
return ao_flash_instruction.instruction;
}
ao_flash_instruction.address[0] = ao_flash_block >> (16 - ao_flash_block_shift);
ao_flash_instruction.address[1] = ao_flash_block << (ao_flash_block_shift - 8);
ao_flash_instruction.address[2] = 0;
- ao_spi_send(&ao_flash_instruction, 4);
- ao_spi_send(ao_flash_data, ao_storage_block);
+ ao_spi_send(&ao_flash_instruction, 4, AO_FLASH_SPI_BUS);
+ ao_spi_send(ao_flash_data, ao_storage_block, AO_FLASH_SPI_BUS);
ao_flash_cs_high();
ao_flash_write_pending = 1;
}
ao_flash_instruction.address[0] = ao_flash_block >> (16 - ao_flash_block_shift);
ao_flash_instruction.address[1] = ao_flash_block << (ao_flash_block_shift - 8);
ao_flash_instruction.address[2] = 0;
- ao_spi_send(&ao_flash_instruction, 4);
- ao_spi_recv(ao_flash_data, ao_flash_block_size);
+ ao_spi_send(&ao_flash_instruction, 4, AO_FLASH_SPI_BUS);
+ ao_spi_recv(ao_flash_data, ao_flash_block_size, AO_FLASH_SPI_BUS);
ao_flash_cs_high();
}
UxGCR_ORDER_MSB | \
(17 << UxGCR_BAUD_E_SHIFT)))
-#define COMPANION_SELECT() do { ao_spi_get_bit(COMPANION_CS); ao_spi_slow(); } while (0)
-#define COMPANION_DESELECT() do { ao_spi_fast(); ao_spi_put_bit(COMPANION_CS); } while (0)
+#define COMPANION_SELECT() do { ao_spi_get_bit(COMPANION_CS, AO_COMPANION_BUS); ao_spi_slow(); } while (0)
+#define COMPANION_DESELECT() do { ao_spi_fast(); ao_spi_put_bit(COMPANION_CS, AO_COMPANION_BUS); } while (0)
__xdata struct ao_companion_command ao_companion_command;
__xdata struct ao_companion_setup ao_companion_setup;
ao_companion_command.tick = ao_time();
ao_companion_command.serial = ao_serial_number;
ao_companion_command.flight = ao_flight_number;
- ao_spi_send(&ao_companion_command, sizeof (ao_companion_command));
+ ao_spi_send(&ao_companion_command, sizeof (ao_companion_command), AO_COMPANION_SPI_BUS);
}
static uint8_t
{
COMPANION_SELECT();
ao_companion_send_command(AO_COMPANION_SETUP);
- ao_spi_recv(&ao_companion_setup, sizeof (ao_companion_setup));
+ ao_spi_recv(&ao_companion_setup, sizeof (ao_companion_setup), AO_COMPANION_SPI_BUS);
COMPANION_DESELECT();
return (ao_companion_setup.board_id ==
~ao_companion_setup.board_id_inverse);
COMPANION_SELECT();
ao_companion_send_command(AO_COMPANION_FETCH);
ao_mutex_get(&ao_companion_mutex);
- ao_spi_recv(&ao_companion_data, ao_companion_setup.channels * 2);
+ ao_spi_recv(&ao_companion_data, ao_companion_setup.channels * 2, AO_COMPANION_SPI_BUS);
ao_mutex_put(&ao_companion_mutex);
COMPANION_DESELECT();
}
static __xdata uint8_t ao_m25_instruction[4];
-#define M25_SELECT(cs) ao_spi_get_mask(SPI_CS_PORT,cs)
-#define M25_DESELECT(cs) ao_spi_put_mask(SPI_CS_PORT,cs)
+#define M25_SELECT(cs) ao_spi_get_mask(AO_M25_SPI_CS_PORT,cs,AO_M25_SPI_BUS)
+#define M25_DESELECT(cs) ao_spi_put_mask(AO_M25_SPI_CS_PORT,cs,AO_M25_SPI_BUS)
#define M25_BLOCK_SHIFT 16
#define M25_BLOCK 65536L
if (ao_m25_wip & cs) {
M25_SELECT(cs);
ao_m25_instruction[0] = M25_RDSR;
- ao_spi_send(ao_m25_instruction, 1);
+ ao_spi_send(ao_m25_instruction, 1, AO_M25_SPI_BUS);
do {
- ao_spi_recv(ao_m25_instruction, 1);
+ ao_spi_recv(ao_m25_instruction, 1, AO_M25_SPI_BUS);
} while (ao_m25_instruction[0] & M25_STATUS_WIP);
M25_DESELECT(cs);
ao_m25_wip &= ~cs;
{
M25_SELECT(cs);
ao_m25_instruction[0] = M25_WREN;
- ao_spi_send(&ao_m25_instruction, 1);
+ ao_spi_send(&ao_m25_instruction, 1, AO_M25_SPI_BUS);
M25_DESELECT(cs);
ao_m25_wip |= cs;
}
uint8_t capacity;
M25_SELECT(cs);
ao_m25_instruction[0] = M25_RDID;
- ao_spi_send(ao_m25_instruction, 1);
- ao_spi_recv(ao_m25_instruction, M25_RDID_LEN);
+ ao_spi_send(ao_m25_instruction, 1, AO_M25_SPI_BUS);
+ ao_spi_recv(ao_m25_instruction, M25_RDID_LEN, AO_M25_SPI_BUS);
M25_DESELECT(cs);
/* Check to see if the chip is present */
chip = ao_m25_pin[chip];
#else
- chip = M25_CS_MASK;
+ chip = AO_M25_SPI_CS_MASK;
#endif
ao_m25_wait_wip(chip);
#if M25_MAX_CHIPS > 1
ao_m25_numchips = 0;
for (pin = 1; pin != 0; pin <<= 1) {
- if (M25_CS_MASK & pin) {
+ if (AO_M25_SPI_CS_MASK & pin) {
size = ao_m25_read_capacity(pin);
if (size != 0) {
ao_m25_size[ao_m25_numchips] = size;
}
}
#else
- ao_m25_total = ao_m25_read_capacity(M25_CS_MASK);
+ ao_m25_total = ao_m25_read_capacity(AO_M25_SPI_CS_MASK);
#endif
if (!ao_m25_total)
return 0;
ao_m25_instruction[0] = M25_SE;
M25_SELECT(cs);
- ao_spi_send(ao_m25_instruction, 4);
+ ao_spi_send(ao_m25_instruction, 4, AO_M25_SPI_BUS);
M25_DESELECT(cs);
ao_m25_wip |= cs;
ao_m25_instruction[0] = M25_PP;
M25_SELECT(cs);
- ao_spi_send(ao_m25_instruction, 4);
- ao_spi_send(d, len);
+ ao_spi_send(ao_m25_instruction, 4, AO_M25_SPI_BUS);
+ ao_spi_send(d, len, AO_M25_SPI_BUS);
M25_DESELECT(cs);
ao_mutex_put(&ao_m25_mutex);
/* No need to use the FAST_READ as we're running at only 8MHz */
ao_m25_instruction[0] = M25_READ;
M25_SELECT(cs);
- ao_spi_send(ao_m25_instruction, 4);
- ao_spi_recv(d, len);
+ ao_spi_send(ao_m25_instruction, 4, AO_M25_SPI_BUS);
+ ao_spi_recv(d, len, AO_M25_SPI_BUS);
M25_DESELECT(cs);
ao_mutex_put(&ao_m25_mutex);
printf ("Available chips:\n");
for (cs = 1; cs != 0; cs <<= 1) {
- if ((M25_CS_MASK & cs) == 0)
+ if ((AO_M25_SPI_CS_MASK & cs) == 0)
continue;
ao_mutex_get(&ao_m25_mutex);
M25_SELECT(cs);
ao_m25_instruction[0] = M25_RDID;
- ao_spi_send(ao_m25_instruction, 1);
- ao_spi_recv(ao_m25_instruction, M25_RDID_LEN);
+ ao_spi_send(ao_m25_instruction, 1, AO_M25_SPI_BUS);
+ ao_spi_recv(ao_m25_instruction, M25_RDID_LEN, AO_M25_SPI_BUS);
M25_DESELECT(cs);
printf ("Select %02x manf %02x type %02x cap %02x uid %02x\n",
void
ao_storage_device_init(void)
{
- /* Set up chip select wires */
- SPI_CS_PORT |= M25_CS_MASK; /* raise all CS pins */
- SPI_CS_DIR |= M25_CS_MASK; /* set CS pins as outputs */
-#ifdef SPI_CS_SEL
- SPI_CS_SEL &= ~M25_CS_MASK; /* set CS pins as GPIO */
-#endif
+ ao_spi_init_cs (AO_M25_SPI_CS_PORT, AO_M25_SPI_CS_MASK);
}
ao_ms5607_init(void)
{
ao_cmd_register(&ao_ms5607_cmds[0]);
-
- stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
- stm_gpio_set(&AO_MS5607_CS_GPIO, AO_MS5607_CS, 1);
- stm_moder_set(&AO_MS5607_CS_GPIO, AO_MS5607_CS, STM_MODER_OUTPUT);
+ ao_spi_init_cs(AO_MS5607_CS_GPIO, (1 << AO_MS5607_CS));
}
ao_spi_stm.c \
ao_ms5607.c \
ao_adc_stm.c \
- ao_beep_stm.c
+ ao_beep_stm.c \
+ ao_storage.c \
+ ao_m25.c
PRODUCT=MegaMetrum-v0.1
PRODUCT_DEF=-DMEGAMETRUM
ao_ms5607_init();
ao_beep_init();
ao_adc_init();
+ ao_storage_init();
ao_cmd_register(&ao_mm_cmds[0]);
ao_start_scheduler();
#define AO_MS5607_CS_MASK (1 << AO_MS5607_CS)
#define AO_MS5607_SPI_INDEX (STM_SPI_INDEX(1))
+/*
+ * SPI Flash memory
+ */
+
+#define M25_MAX_CHIPS 1
+#define AO_M25_SPI_CS_PORT stm_gpiod
+#define AO_M25_SPI_CS_MASK (1 << 3)
+#define AO_M25_SPI_BUS STM_SPI_INDEX(2)
+
#endif /* _AO_PINS_H_ */
void
ao_spi_init(void);
+#define ao_spi_get_mask(reg,mask,bus) do { \
+ ao_spi_get(bus); \
+ (reg).bsrr = ((uint32_t) mask) << 16; \
+ } while (0)
+
+#define ao_spi_put_mask(reg,mask,bus) do { \
+ (reg).bsrr = mask; \
+ ao_spi_put(bus); \
+ } while (0)
+
+#define ao_stm_enable_port(port) do { \
+ if (&(port) == &stm_gpioa) \
+ stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN); \
+ else if (&(port) == &stm_gpiob) \
+ stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN); \
+ else if (&(port) == &stm_gpioc) \
+ stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN); \
+ else if (&(port) == &stm_gpiod) \
+ stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN); \
+ else if (&(port) == &stm_gpioe) \
+ stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \
+ } while (0)
+
+
+#define ao_stm_enable_cs(port,bit) do { \
+ stm_gpio_set(&(port), bit, 1); \
+ stm_moder_set(&(port), bit, STM_MODER_OUTPUT); \
+ } while (0)
+
+#define ao_spi_init_cs(port, mask) do { \
+ ao_stm_enable_port(port); \
+ if (mask & 0x0001) ao_stm_enable_cs(port, 0); \
+ if (mask & 0x0002) ao_stm_enable_cs(port, 1); \
+ if (mask & 0x0004) ao_stm_enable_cs(port, 2); \
+ if (mask & 0x0008) ao_stm_enable_cs(port, 3); \
+ if (mask & 0x0010) ao_stm_enable_cs(port, 4); \
+ if (mask & 0x0020) ao_stm_enable_cs(port, 5); \
+ if (mask & 0x0040) ao_stm_enable_cs(port, 6); \
+ if (mask & 0x0080) ao_stm_enable_cs(port, 7); \
+ if (mask & 0x0100) ao_stm_enable_cs(port, 8); \
+ if (mask & 0x0200) ao_stm_enable_cs(port, 9); \
+ if (mask & 0x0400) ao_stm_enable_cs(port, 10); \
+ if (mask & 0x0800) ao_stm_enable_cs(port, 11); \
+ if (mask & 0x1000) ao_stm_enable_cs(port, 12); \
+ if (mask & 0x2000) ao_stm_enable_cs(port, 13); \
+ if (mask & 0x4000) ao_stm_enable_cs(port, 14); \
+ if (mask & 0x8000) ao_stm_enable_cs(port, 15); \
+ } while (0)
+
/* ao_dma_stm.c
*/
#define AO_IGNITER_FIRE_TIME AO_MS_TO_TICKS(50)
#define AO_IGNITER_CHARGE_TIME AO_MS_TO_TICKS(2000)
+#define AO_M25_SPI_CS_PORT SPI_CS_PORT
+#define AO_M25_SPI_CS_MASK M25_CS_MASK
+
#endif /* _AO_PINS_H_ */