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   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #ifndef _AO_ARCH_FUNCS_H_
  19 #define _AO_ARCH_FUNCS_H_
  20
  21 /* ao_spi_stm.c
  22  */
  23 extern uint8_t  ao_spi_mutex[STM_NUM_SPI];
  24
  25 void
  26 ao_spi_get(uint8_t spi_index);
  27
  28 void
  29 ao_spi_put(uint8_t spi_index);
  30
  31 void
  32 ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
  33
  34 void
  35 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
  36
  37 void
  38 ao_spi_init(void);
  39
  40 #define ao_spi_get_mask(reg,mask,bus) do {              \
  41                 ao_spi_get(bus);                        \
  42                 (reg).bsrr = ((uint32_t) mask) << 16;   \
  43         } while (0)
  44
  45 #define ao_spi_put_mask(reg,mask,bus) do {      \
  46                 (reg).bsrr = mask;              \
  47                 ao_spi_put(bus);                \
  48         } while (0)
  49
  50 #define ao_stm_enable_port(port) do {                                   \
  51                 if (&(port) == &stm_gpioa)                              \
  52                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN); \
  53                 else if (&(port) == &stm_gpiob)                         \
  54                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN); \
  55                 else if (&(port) == &stm_gpioc)                         \
  56                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN); \
  57                 else if (&(port) == &stm_gpiod)                         \
  58                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN); \
  59                 else if (&(port) == &stm_gpioe)                         \
  60                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \
  61         } while (0)
  62
  63
  64 #define ao_stm_enable_cs(port,bit) do {                         \
  65                 stm_gpio_set(&(port), bit, 1);                  \
  66                 stm_moder_set(&(port), bit, STM_MODER_OUTPUT);  \
  67         } while (0)
  68
  69 #define ao_spi_init_cs(port, mask) do {                         \
  70                 ao_stm_enable_port(port);                       \
  71                 if (mask & 0x0001) ao_stm_enable_cs(port, 0);   \
  72                 if (mask & 0x0002) ao_stm_enable_cs(port, 1);   \
  73                 if (mask & 0x0004) ao_stm_enable_cs(port, 2);   \
  74                 if (mask & 0x0008) ao_stm_enable_cs(port, 3);   \
  75                 if (mask & 0x0010) ao_stm_enable_cs(port, 4);   \
  76                 if (mask & 0x0020) ao_stm_enable_cs(port, 5);   \
  77                 if (mask & 0x0040) ao_stm_enable_cs(port, 6);   \
  78                 if (mask & 0x0080) ao_stm_enable_cs(port, 7);   \
  79                 if (mask & 0x0100) ao_stm_enable_cs(port, 8);   \
  80                 if (mask & 0x0200) ao_stm_enable_cs(port, 9);   \
  81                 if (mask & 0x0400) ao_stm_enable_cs(port, 10);  \
  82                 if (mask & 0x0800) ao_stm_enable_cs(port, 11);  \
  83                 if (mask & 0x1000) ao_stm_enable_cs(port, 12);  \
  84                 if (mask & 0x2000) ao_stm_enable_cs(port, 13);  \
  85                 if (mask & 0x4000) ao_stm_enable_cs(port, 14);  \
  86                 if (mask & 0x8000) ao_stm_enable_cs(port, 15);  \
  87         } while (0)
  88
  89 /* ao_dma_stm.c
  90  */
  91
  92 extern uint8_t ao_dma_done[STM_NUM_DMA];
  93
  94 void
  95 ao_dma_set_transfer(uint8_t             index,
  96                     volatile void       *peripheral,
  97                     void                *memory,
  98                     uint16_t            count,
  99                     uint32_t            ccr);
 100
 101 void
 102 ao_dma_set_isr(uint8_t index, void (*isr)(void));
 103
 104 void
 105 ao_dma_start(uint8_t index);
 106
 107 void
 108 ao_dma_done_transfer(uint8_t index);
 109
 110 void
 111 ao_dma_abort(uint8_t index);
 112
 113 void
 114 ao_dma_alloc(uint8_t index);
 115
 116 void
 117 ao_dma_init(void);
 118
 119 /* ao_i2c_stm.c */
 120
 121 void
 122 ao_i2c_get(uint8_t i2c_index);
 123
 124 uint8_t
 125 ao_i2c_start(uint8_t i2c_index, uint16_t address);
 126
 127 void
 128 ao_i2c_put(uint8_t i2c_index);
 129
 130 void
 131 ao_i2c_send(void *block, uint16_t len, uint8_t i2c_index);
 132
 133 void
 134 ao_i2c_recv(void *block, uint16_t len, uint8_t i2c_index);
 135
 136 void
 137 ao_i2c_init(void);
 138
 139 #endif /* _AO_ARCH_FUNCS_H_ */