10 // AD0_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL3;
11 // AD0_CR |= AD_CR_START_NOW;
13 // while (!(AD0_DR3 & AD_DR_DONE))
16 // return ((AD0_DR3 & AD_DR_RESULTMASK) >> AD_DR_RESULTSHIFT);
21 // Assumes PCLK == 48Mhz
25 // SCB_PCONP |= SCB_PCONP_PCAD0;
26 SCB_PCONP |= SCB_PCONP_PCAD1;
28 // PCB_PINSEL1 |= PCB_PINSEL1_P030_AD03;
30 PCB_PINSEL0 |= PCB_PINSEL0_P012_AD13;
31 PCB_PINSEL0 |= PCB_PINSEL0_P013_AD14;
32 PCB_PINSEL1 |= PCB_PINSEL1_P021_AD16;
36 void adcStartXYZ (void)
38 unsigned portLONG ulCompareMatch;
40 // configure MAT0.1 ... assumes TIMER0 already initialized and running
42 // Calculate the match value required for 1khz ADC trigger rate
43 ulCompareMatch = configCPU_CLOCK_HZ / 1000;
45 // Account for prescaler, protecting against divide by zero.
46 #if portPRESCALE_VALUE != 0
48 ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
51 T0_MR1 = ulCompareMatch;
53 // burst sample 3 channels of accelerometer triggering on MAT0.1
54 AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL3 | AD_CR_SEL4 | AD_CR_SEL6 | AD_CR_BURST;
55 AD1_CR |= AD_CR_START_MAT01;
57 // following works for one channel repeated sampling
58 // AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL6 | AD_CR_BURST;
59 // AD1_CR |= AD_CR_START_NOW;
61 // wait for conversion to complete
62 // while (!(AD1_DR3 & AD_DR_DONE))
68 // Read and return X accelerometer value
72 while (!(AD1_DR3 & AD_DR_DONE)) ;
73 return ((AD1_DR3 & AD_DR_RESULTMASK) >> AD_DR_RESULTSHIFT);
77 // Read and return Y accelerometer value
81 while (!(AD1_DR4 & AD_DR_DONE)) ;
82 return ((AD1_DR4 & AD_DR_RESULTMASK) >> AD_DR_RESULTSHIFT);
86 // Read and return Z accelerometer value
90 while (!(AD1_DR6 & AD_DR_DONE)) ;
91 return ((AD1_DR6 & AD_DR_RESULTMASK) >> AD_DR_RESULTSHIFT);