void adcStartXYZ (void)
{
-// AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL3 | AD_CR_SEL4 | AD_CR_SEL6 | AD_CR_BURST;
-// AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL3 | AD_CR_BURST;
- AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL6 | AD_CR_BURST;
- AD1_CR |= AD_CR_START_NOW;
+ unsigned portLONG ulCompareMatch;
+
+ // configure MAT0.1 ... assumes TIMER0 already initialized and running
+
+ // Calculate the match value required for 1khz ADC trigger rate
+ ulCompareMatch = configCPU_CLOCK_HZ / 1000;
+
+ // Account for prescaler, protecting against divide by zero.
+ #if portPRESCALE_VALUE != 0
+ {
+ ulCompareMatch /= ( portPRESCALE_VALUE + 1 );
+ }
+ #endif
+ T0_MR1 = ulCompareMatch;
+
+ // burst sample 3 channels of accelerometer triggering on MAT0.1
+ AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL3 | AD_CR_SEL4 | AD_CR_SEL6 | AD_CR_BURST;
+ AD1_CR |= AD_CR_START_MAT01;
+
+// following works for one channel repeated sampling
+// AD1_CR = AD_CR_CLKS10 | AD_CR_PDN | ((11 - 1) << AD_CR_CLKDIVSHIFT) | AD_CR_SEL6 | AD_CR_BURST;
+// AD1_CR |= AD_CR_START_NOW;
// wait for conversion to complete
// while (!(AD1_DR3 & AD_DR_DONE))
//
int adcReadX (void)
{
-// while (!(AD1_DR3 & AD_DR_DONE)) ;
+ while (!(AD1_DR3 & AD_DR_DONE)) ;
return ((AD1_DR3 & AD_DR_RESULTMASK) >> AD_DR_RESULTSHIFT);
}
//
int adcReadY (void)
{
-// while (!(AD1_DR4 & AD_DR_DONE)) ;
+ while (!(AD1_DR4 & AD_DR_DONE)) ;
return ((AD1_DR4 & AD_DR_RESULTMASK) >> AD_DR_RESULTSHIFT);
}