altos/micropeak-v2.0: Reduce power usage

This gets power consumption down under 1mA on the pad. Not really low
enough to sell, but I think this is about as low as the chip will go.

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/src/micropeak-v2.0/ao_micropeak.c b/src/micropeak-v2.0/ao_micropeak.c
index 0b9972e908b1687e8741f2187fed64211b056806..1bf0999ec1da00c8743e3c7421f0270ce877c99b 100644 (file)
--- a/src/micropeak-v2.0/ao_micropeak.c
+++ b/src/micropeak-v2.0/ao_micropeak.c
@@ -272,9 +272,6 @@ ao_hsi_init(void)
        /* Enable prefetch */
        stm_flash.acr |= (1 << STM_FLASH_ACR_PRFTBE);
 
-       /* Enable power interface clock */
-       stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_PWREN);
-
        /* HCLK to 48MHz -> AHB prescaler = /1 */
        cfgr = stm_rcc.cfgr;
        cfgr &= ~(STM_RCC_CFGR_HPRE_MASK << STM_RCC_CFGR_HPRE);
@@ -314,7 +311,6 @@ main(void)
        ao_led_init();
        ao_task_init();
        ao_timer_init();
-       ao_serial_init();
        stm_moder_set(&stm_gpioa, 2, STM_MODER_OUTPUT);
        ao_dma_init();
        ao_spi_init();
@@ -325,6 +321,12 @@ main(void)
        ao_ms5607_init();
        ao_storage_init();
 
+       /* Let FLITF clock turn off in sleep mode */
+       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_FLITFEN);
+
+       /* Le SRAM clock turn off in sleep mode */
+       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_SRAMEN);
+
        if (ao_on_battery) {
                /* On battery power, run the flight code */
                ao_add_task(&mp_task, ao_micropeak, "micropeak");

diff --git a/src/micropeak-v2.0/ao_pins.h b/src/micropeak-v2.0/ao_pins.h
index 9dba26bd718fe0bc28e1fe3737f4251524fa542a..d3bd22814a46f0264669237de7c06bf2beb87efb 100644 (file)
--- a/src/micropeak-v2.0/ao_pins.h
+++ b/src/micropeak-v2.0/ao_pins.h
@@ -43,8 +43,8 @@ extern uint8_t ao_on_battery;
 #define AO_RCC_CFGR_HPRE_DIV   (ao_on_battery ? STM_RCC_CFGR_HPRE_DIV_16 : STM_RCC_CFGR_HPRE_DIV_1)
 
 /* APB = 12MHz usb / 2MHz battery */
-#define AO_APB_PRESCALER       1
-#define AO_RCC_CFGR_PPRE_DIV   STM_RCC_CFGR_PPRE_DIV_1
+#define AO_APB_PRESCALER       (ao_on_battery ? 2 : 1)
+#define AO_RCC_CFGR_PPRE_DIV   (ao_on_battery ? STM_RCC_CFGR_PPRE_DIV_2 : STM_RCC_CFGR_PPRE_DIV_1)
 
 #define HAS_USB                        1
 #define AO_PA11_PA12_RMP       1
@@ -86,6 +86,7 @@ extern uint8_t ao_on_battery;
 
 /* SPI */
 #define HAS_SPI_1              1
+#define SPI_1_POWER_MANAGE     1
 #define SPI_1_PA5_PA6_PA7      1
 #define SPI_1_PB3_PB4_PB5      0
 #define SPI_1_OSPEEDR          STM_OSPEEDR_MEDIUM
@@ -128,9 +129,11 @@ void ao_delay_until(uint16_t target);
 #define ao_async_stop() do {                                   \
                ao_serial2_drain();                             \
                stm_moder_set(&stm_gpioa, 2, STM_MODER_OUTPUT); \
+               ao_serial_shutdown();                           \
        } while (0)
 
 #define ao_async_start() do {                                          \
+               ao_serial_init();                                       \
                stm_moder_set(&stm_gpioa, 2, STM_MODER_ALTERNATE);      \
                ao_delay(AO_MS_TO_TICKS(100));                          \
        } while (0)