*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
{
if (!ao_fifo_empty(usart->tx_fifo)) {
#if HAS_SERIAL_SW_FLOW
- if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts, foo) == 1) {
+ if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts) == 1) {
ao_exti_enable(usart->gpio_cts, usart->pin_cts);
return 0;
}
#endif
static void
-_ao_usart_rx(struct ao_stm_usart *usart, int stdin)
+_ao_usart_rx(struct ao_stm_usart *usart, int is_stdin)
{
if (usart->reg->sr & (1 << STM_USART_SR_RXNE)) {
if (!ao_fifo_full(usart->rx_fifo)) {
- ao_fifo_insert(usart->rx_fifo, usart->reg->dr);
+ ao_fifo_insert(usart->rx_fifo, (char) usart->reg->dr);
ao_wakeup(&usart->rx_fifo);
- if (stdin)
+ if (is_stdin)
ao_wakeup(&ao_stdin_ready);
#if HAS_SERIAL_SW_FLOW
/* If the fifo is nearly full, turn off RTS and wait
* for it to drain a bunch
*/
if (usart->gpio_rts && ao_fifo_mostly(usart->rx_fifo)) {
- ao_gpio_set(usart->gpio_rts, usart->pin_rts, usart->pin_rts, 1);
+ ao_gpio_set(usart->gpio_rts, usart->pin_rts, 1);
usart->rts = 0;
}
#endif
} else {
- usart->reg->cr1 &= ~(1 << STM_USART_CR1_RXNEIE);
+ usart->reg->cr1 &= ~(1UL << STM_USART_CR1_RXNEIE);
}
}
}
static void
-ao_usart_isr(struct ao_stm_usart *usart, int stdin)
+ao_usart_isr(struct ao_stm_usart *usart, int is_stdin)
{
- _ao_usart_rx(usart, stdin);
+ _ao_usart_rx(usart, is_stdin);
if (!_ao_usart_tx_start(usart))
- usart->reg->cr1 &= ~(1<< STM_USART_CR1_TXEIE);
+ usart->reg->cr1 &= ~(1UL << STM_USART_CR1_TXEIE);
if (usart->reg->sr & (1 << STM_USART_SR_TC)) {
usart->tx_running = 0;
- usart->reg->cr1 &= ~(1 << STM_USART_CR1_TCIE);
+ usart->reg->cr1 &= ~(1UL << STM_USART_CR1_TCIE);
if (usart->draining) {
usart->draining = 0;
ao_wakeup(&usart->tx_fifo);
#if HAS_SERIAL_SW_FLOW
/* If we've cleared RTS, check if there's space now and turn it back on */
if (usart->gpio_rts && usart->rts == 0 && ao_fifo_barely(usart->rx_fifo)) {
- ao_gpio_set(usart->gpio_rts, usart->pin_rts, foo, 0);
+ ao_gpio_set(usart->gpio_rts, usart->pin_rts, 0);
usart->rts = 1;
}
#endif
}
static inline uint8_t
-_ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
+_ao_usart_sleep_for(struct ao_stm_usart *usart, AO_TICK_TYPE timeout)
{
return ao_sleep_for(&usart->rx_fifo, timeout);
}
}
static void
-ao_usart_init(struct ao_stm_usart *usart)
+ao_usart_init(struct ao_stm_usart *usart, int hw_flow)
{
usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
(1 << STM_USART_CR1_UE) |
(0 << STM_USART_CR3_IREN) |
(0 << STM_USART_CR3_EIE));
+ if (hw_flow)
+ usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
+ (1 << STM_USART_CR3_RTSE));
+
/* Pick a 9600 baud rate */
ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
}
static void
ao_usart_set_flow(struct ao_stm_usart *usart)
{
- usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
- (1 << STM_USART_CR3_RTSE));
}
#endif
}
uint8_t
-_ao_serial1_sleep_for(uint16_t timeout)
+_ao_serial1_sleep_for(AO_TICK_TYPE timeout)
{
return _ao_usart_sleep_for(&ao_stm_usart1, timeout);
}
}
uint8_t
-_ao_serial2_sleep_for(uint16_t timeout)
+_ao_serial2_sleep_for(AO_TICK_TYPE timeout)
{
return _ao_usart_sleep_for(&ao_stm_usart2, timeout);
}
}
#if HAS_SERIAL_SW_FLOW
-void
+static void
ao_serial2_cts(void)
{
_ao_usart_cts(&ao_stm_usart2);
}
uint8_t
-_ao_serial3_sleep_for(uint16_t timeout)
+_ao_serial3_sleep_for(AO_TICK_TYPE timeout)
{
return _ao_usart_sleep_for(&ao_stm_usart3, timeout);
}
ao_serial_set_sw_rts_cts(struct ao_stm_usart *usart,
void (*isr)(void),
struct stm_gpio *port_rts,
- int pin_rts,
+ uint8_t pin_rts,
struct stm_gpio *port_cts,
- int pin_cts)
+ uint8_t pin_cts)
{
/* Pull RTS low to note that there's space in the FIFO
*/
- ao_enable_output(port_rts, pin_rts, foo, 0);
+ ao_enable_output(port_rts, pin_rts, 0);
usart->gpio_rts = port_rts;
usart->pin_rts = pin_rts;
usart->rts = 1;
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
ao_stm_usart1.reg = &stm_usart1;
- ao_usart_init(&ao_stm_usart1);
+ ao_usart_init(&ao_stm_usart1, 0);
stm_nvic_set_enable(STM_ISR_USART1_POS);
- stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
+ stm_nvic_set_priority(STM_ISR_USART1_POS, AO_STM_NVIC_MED_PRIORITY);
#if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
ao_add_stdio(_ao_serial1_pollchar,
ao_serial1_putchar,
stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
ao_stm_usart2.reg = &stm_usart2;
- ao_usart_init(&ao_stm_usart2);
-#if USE_SERIAL_2_FLOW && !USE_SERIAL_2_SW_FLOW
- ao_usart_set_flow(&ao_stm_usart2);
-#endif
+ ao_usart_init(&ao_stm_usart2, USE_SERIAL_2_FLOW && !USE_SERIAL_2_SW_FLOW);
stm_nvic_set_enable(STM_ISR_USART2_POS);
- stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
+ stm_nvic_set_priority(STM_ISR_USART2_POS, AO_STM_NVIC_MED_PRIORITY);
#if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
ao_add_stdio(_ao_serial2_pollchar,
ao_serial2_putchar,
stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
ao_stm_usart3.reg = &stm_usart3;
- ao_usart_init(&ao_stm_usart3);
+ ao_usart_init(&ao_stm_usart3, 0);
stm_nvic_set_enable(STM_ISR_USART3_POS);
- stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
+ stm_nvic_set_priority(STM_ISR_USART3_POS, AO_STM_NVIC_MED_PRIORITY);
#if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
ao_add_stdio(_ao_serial3_pollchar,
ao_serial3_putchar,
projects / fw / altos / blobdiff