# define MPU9250_ACCEL_CONFIG_AFS_SEL_16G 3
# define MPU9250_ACCEL_CONFIG_AFS_SEL_MASK 3
+#define MPU9250_MST_CTRL 0x24
+#define MPU9250_MST_CTRL_MULT_MST_EN 7
+#define MPU9250_MST_CTRL_WAIT_FOR_ES 6
+#define MPU9250_MST_CTRL_SLV_3_FIFO_EN 5
+#define MPU9250_MST_CTRL_I2C_MST_P_NSR 4
+#define MPU9250_MST_CTRL_I2C_MST_CLK 0
+#define MPU9250_MST_CTRL_I2C_MST_CLK_348 0
+#define MPU9250_MST_CTRL_I2C_MST_CLK_333 1
+#define MPU9250_MST_CTRL_I2C_MST_CLK_320 2
+#define MPU9250_MST_CTRL_I2C_MST_CLK_308 3
+#define MPU9250_MST_CTRL_I2C_MST_CLK_296 4
+#define MPU9250_MST_CTRL_I2C_MST_CLK_286 5
+#define MPU9250_MST_CTRL_I2C_MST_CLK_276 6
+#define MPU9250_MST_CTRL_I2C_MST_CLK_267 7
+#define MPU9250_MST_CTRL_I2C_MST_CLK_258 8
+#define MPU9250_MST_CTRL_I2C_MST_CLK_500 9
+#define MPU9250_MST_CTRL_I2C_MST_CLK_471 10
+#define MPU9250_MST_CTRL_I2C_MST_CLK_444 11
+#define MPU9250_MST_CTRL_I2C_MST_CLK_421 12
+#define MPU9250_MST_CTRL_I2C_MST_CLK_400 13
+#define MPU9250_MST_CTRL_I2C_MST_CLK_381 14
+#define MPU9250_MST_CTRL_I2C_MST_CLK_364 15
+#define MPU9250_MST_CTRL_I2C_MST_CLK_MASK 15
+
+#define MPU9250_I2C_SLV0_ADDR 0x25
+#define MPU9250_I2C_SLV0_REG 0x26
+#define MPU9250_I2C_SLV0_CTRL 0x27
+
+#define MPU9250_I2C_SLV0_CTRL_I2C_SLV0_EN 7
+#define MPU9250_I2C_SLV0_CTRL_I2C_SLV0_BYTE_SW 6
+#define MPU9250_I2C_SLV0_CTRL_I2C_SLV0_REG_DIS 5
+#define MPU9250_I2C_SLV0_CTRL_I2C_SLV0_GRP 4
+#define MPU9250_I2C_SLV0_CTRL_I2C_SLV0_LENG 0
+
+#define MPU9250_I2C_SLV1_ADDR 0x28
+#define MPU9250_I2C_SLV1_REG 0x29
+#define MPU9250_I2C_SLV1_CTRL 0x2a
+
+#define MPU9250_I2C_SLV2_ADDR 0x2b
+#define MPU9250_I2C_SLV2_REG 0x2c
+#define MPU9250_I2C_SLV2_CTRL 0x2d
+
+#define MPU9250_I2C_SLV3_ADDR 0x2e
+#define MPU9250_I2C_SLV3_REG 0x2f
+#define MPU9250_I2C_SLV3_CTRL 0x30
+
+#define MPU9250_I2C_SLV4_ADDR 0x31
+#define MPU9250_I2C_SLV4_REG 0x32
+#define MPU9250_I2C_SLV4_DO 0x33
+#define MPU9250_I2C_SLV4_CTRL 0x34
+#define MPU9250_I2C_SLV4_CTRL_I2C_SLV4_EN 7
+#define MPU9250_I2C_SLV4_CTRL_SLV4_DONE_INT_EN 6
+#define MPU9250_I2C_SLV4_CTRL_I2C_SLV4_REG_DIS 5
+#define MPU9250_I2C_SLV4_CTRL_I2C_MST_DLY 0
+
+#define MPU9250_I2C_SLV4_DI 0x35
+
+#define MPU9250_I2C_MST_STATUS 0x36
+
+#define MPU9250_INT_PIN_CFG 0x37
+
#define MPU9250_INT_ENABLE 0x38
-#define MPU9250_INT_ENABLE_FF_EN 7
-#define MPU9250_INT_ENABLE_MOT_EN 6
-#define MPU9250_INT_ENABLE_ZMOT_EN 5
+#define MPU9250_INT_ENABLE_WOM_EN 6
#define MPU9250_INT_ENABLE_FIFO_OFLOW_EN 4
-#define MPU9250_INT_ENABLE_I2C_MST_INT_EN 3
-#define MPU9250_INT_ENABLE_DATA_RDY_EN 0
+#define MPU9250_INT_ENABLE_FSYNC_INT_EN 3
+#define MPU9250_INT_ENABLE_RAW_RDY_EN 0
#define MPU9250_INT_STATUS 0x3a
-#define MPU9250_INT_STATUS_FF_EN 7
-#define MPU9250_INT_STATUS_MOT_EN 6
-#define MPU9250_INT_STATUS_ZMOT_EN 5
-#define MPU9250_INT_STATUS_FIFO_OFLOW_EN 4
-#define MPU9250_INT_STATUS_I2C_MST_INT_EN 3
-#define MPU9250_INT_STATUS_DATA_RDY_EN 0
+#define MPU9250_INT_STATUS_WOM_INT 6
+#define MPU9250_INT_STATUS_FIFO_OFLOW_INT 4
+#define MPU9250_INT_STATUS_FSYNC_INT 3
+#define MPU9250_INT_STATUS_RAW_RDY_INT 0
#define MPU9250_ACCEL_XOUT_H 0x3b
#define MPU9250_ACCEL_XOUT_L 0x3c
#define MPU9250_GYRO_ZOUT_H 0x47
#define MPU9250_GYRO_ZOUT_L 0x48
+#define MPU9250_I2C_MST_DELAY_CTRL 0x67
+
+#define MPU9250_I2C_MST_DELAY_CTRL_DELAY_ES_SHADOW 7
+#define MPU9250_I2C_MST_DELAY_CTRL_I2C_SLV4_DLY_EN 4
+#define MPU9250_I2C_MST_DELAY_CTRL_I2C_SLV3_DLY_EN 3
+#define MPU9250_I2C_MST_DELAY_CTRL_I2C_SLV2_DLY_EN 2
+#define MPU9250_I2C_MST_DELAY_CTRL_I2C_SLV1_DLY_EN 1
+#define MPU9250_I2C_MST_DELAY_CTRL_I2C_SLV0_DLY_EN 0
+
#define MPU9250_SIGNAL_PATH_RESET 0x68
#define MPU9250_SIGNAL_PATH_RESET_GYRO_RESET 2
#define MPU9250_SIGNAL_PATH_RESET_ACCEL_RESET 1
#define MPU9250_WHO_AM_I 0x75
#define MPU9250_I_AM_9250 0x71
+/* AK8963 mag sensor on the I2C bus */
+
+#define MPU9250_MAG_ADDR 0x0c
+
+#define MPU9250_MAG_WIA 0x00
+#define MPU9250_MAG_WIA_VALUE 0x48
+
+#define MPU9250_MAG_INFO 0x01
+#define MPU9250_MAG_ST1 0x02
+#define MPU9250_MAG_ST1_DOR 1
+#define MPU9250_MAG_ST1_DRDY 0
+
+#define MPU9250_MAG_HXL 0x03
+#define MPU9250_MAG_HXH 0x04
+#define MPU9250_MAG_HYL 0x05
+#define MPU9250_MAG_HYH 0x06
+#define MPU9250_MAG_HZL 0x07
+#define MPU9250_MAG_HZH 0x08
+#define MPU9250_MAG_ST2 0x09
+#define MPU9250_MAG_ST2_BITM 4
+#define MPU9250_MAG_ST2_HOFL 3
+
+#define MPU9250_MAG_CNTL1 0x0a
+#define MPU9250_MAG_CNTL1_MODE 0
+#define MPU9250_MAG_CNTL1_MODE_POWER_DOWN 0x0
+#define MPU9250_MAG_CNTL1_MODE_SINGLE 0x1
+#define MPU9250_MAG_CNTL1_MODE_CONT_1 0x2 /* 8Hz */
+#define MPU9250_MAG_CNTL1_MODE_CONT_2 0x6 /* 100Hz */
+#define MPU9250_MAG_CNTL1_MODE_EXTERNAL 0x4
+#define MPU9250_MAG_CNTL1_MODE_SELF_TEST 0x8
+#define MPU9250_MAG_CNTL1_MODE_FUSE_ACCESS 0xf
+
+#define MPU9250_MAG_CNTL1_BIT 4
+#define MPU9250_MAG_CNTL1_BIT_14 0
+#define MPU9250_MAG_CNTL1_BIT_16 1
+
+#define MPU9250_MAG_CNTL2 0x0b
+#define MPU9250_MAG_CNTL2_SRST 0
+
+#define MPU9250_MAG_ASTC 0x0c
+#define MPU9250_MAG_ASTC_SELF 6
+
+#define MPU9250_MAG_TS1 0x0d
+#define MPU9250_MAG_TS2 0x0e
+#define MPU9250_MAG_I2CDIS 0x0f
+#define MPU9250_MAG_I2CDIS_VALUE 0x1d
+
+#define MPU9250_MAG_ASAX 0x10
+#define MPU9250_MAG_ASAY 0x11
+#define MPU9250_MAG_ASAZ 0x12
+
/* Self test acceleration is approximately 0.5g */
#define MPU9250_ST_ACCEL(full_scale) (32767 / ((full_scale) * 2))
int16_t gyro_x;
int16_t gyro_y;
int16_t gyro_z;
+ int16_t mag_x;
+ int16_t mag_y;
+ int16_t mag_z;
};
extern struct ao_mpu9250_sample ao_mpu9250_current;
projects / fw / altos / blobdiff