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Bdale Garbee [Tue, 23 Nov 2010 06:16:59 +0000 (23:16 -0700)]
make sure all silk elements are within board outline
Bdale Garbee [Tue, 23 Nov 2010 05:50:54 +0000 (22:50 -0700)]
add outline layer
Bdale Garbee [Thu, 18 Nov 2010 23:16:16 +0000 (16:16 -0700)]
lose C9 since it's redundant on such a tight board
Bdale Garbee [Thu, 18 Nov 2010 23:00:45 +0000 (16:00 -0700)]
update to reflect footprint name change
Bdale Garbee [Thu, 11 Nov 2010 10:25:32 +0000 (03:25 -0700)]
add targets for automating outputs
Bdale Garbee [Thu, 11 Nov 2010 10:18:52 +0000 (03:18 -0700)]
fix mask clearance issue identified by freedfm
Bdale Garbee [Thu, 11 Nov 2010 08:38:22 +0000 (01:38 -0700)]
add atributes
Bdale Garbee [Thu, 11 Nov 2010 03:41:12 +0000 (20:41 -0700)]
update to reflect desired reset circuit component values
Bdale Garbee [Wed, 10 Nov 2010 23:45:04 +0000 (16:45 -0700)]
reset circuit passive values changed to match TeleMetrum v0.1, and footprint
for the debug connector fixed to have origin in pin 1
Bdale Garbee [Wed, 10 Nov 2010 17:59:27 +0000 (10:59 -0700)]
a couple more copper tweaks to clean up overlap "jaggies"
Bdale Garbee [Fri, 5 Nov 2010 23:38:22 +0000 (17:38 -0600)]
lots of copper tweaking
Bdale Garbee [Fri, 5 Nov 2010 17:13:00 +0000 (11:13 -0600)]
clean up ground plane a bit .. fewer thermals on vias, etc
Bdale Garbee [Fri, 5 Nov 2010 04:48:36 +0000 (22:48 -0600)]
enabling outline layer causes bogus drc errors, so leave it off
Bdale Garbee [Thu, 4 Nov 2010 22:46:20 +0000 (16:46 -0600)]
add copyright symbol to font, update back side silk
Bdale Garbee [Wed, 3 Nov 2010 20:15:21 +0000 (14:15 -0600)]
part number for better crystal
Bdale Garbee [Wed, 3 Nov 2010 20:10:14 +0000 (14:10 -0600)]
add an explicit outline layer
Bdale Garbee [Wed, 3 Nov 2010 20:03:40 +0000 (14:03 -0600)]
no drc errors, refdes turned off in the silkscreen
Bdale Garbee [Wed, 3 Nov 2010 19:04:03 +0000 (13:04 -0600)]
added mounting holes, cleaned up back-side silk (product name, etc)
Bdale Garbee [Wed, 3 Nov 2010 18:31:33 +0000 (12:31 -0600)]
down to desired board outline size
Bdale Garbee [Wed, 3 Nov 2010 18:21:04 +0000 (12:21 -0600)]
bottom layer pulled back into new board boundary, silk delineation removed
Bdale Garbee [Wed, 3 Nov 2010 18:19:56 +0000 (12:19 -0600)]
fully routed
Bdale Garbee [Wed, 3 Nov 2010 14:58:52 +0000 (08:58 -0600)]
whoa! getting there!
Bdale Garbee [Wed, 3 Nov 2010 13:10:21 +0000 (07:10 -0600)]
rename for consistency with tele* structure
Bdale Garbee [Wed, 3 Nov 2010 12:08:34 +0000 (06:08 -0600)]
avoid 'pico' prefix as potentially confusing with the picoalt guy
Bdale Garbee [Wed, 3 Nov 2010 05:41:54 +0000 (23:41 -0600)]
place new connector on layout
Bdale Garbee [Wed, 3 Nov 2010 05:40:01 +0000 (23:40 -0600)]
move silk marker to 0.375, leaving 1.125 inches length to work in
Bdale Garbee [Wed, 3 Nov 2010 05:38:30 +0000 (23:38 -0600)]
change to picoblade for debug connector
Bdale Garbee [Tue, 2 Nov 2010 19:46:22 +0000 (13:46 -0600)]
what I got done on the DEN->BOS flight to LPC 2010
Bdale Garbee [Tue, 2 Nov 2010 19:14:40 +0000 (13:14 -0600)]
lots of progress on the layout
Bdale Garbee [Mon, 3 May 2010 21:04:42 +0000 (15:04 -0600)]
lose the mounting holes for now
Bdale Garbee [Mon, 3 May 2010 20:55:11 +0000 (14:55 -0600)]
one step closer
Bdale Garbee [Mon, 3 May 2010 20:43:07 +0000 (14:43 -0600)]
working on plane polygons
Bdale Garbee [Mon, 3 May 2010 20:38:12 +0000 (14:38 -0600)]
initial work on stripping TeleMetrum down