Antonio Borneo [Mon, 24 Jun 2019 10:17:17 +0000 (12:17 +0200)]
arm: fix reg num for Monitor mode
Commit 2efb1f14f611 ("Add GDB remote target description support
for ARM4") inserts two additional registers "sp" and "lr" in the
table arm_core_regs[], thus shifting by two the position of the
last three registers already present
"sp_mon" moved from index 37 to 39
"lr_mon" moved from index 38 to 40
"spsr_mon" moved from index 39 to 41
Part of the code is updated (e.g. enum defining ARM_SPSR_MON and
array arm_mon_indices[]), but it's missing the update of mapping
in armv4_5_core_reg_map[].
Fix armv4_5_core_reg_map[].
Change-Id: I0bdf766183392eb738206b876cd9559aacc29fa0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 2efb1f14f611 ("Add GDB remote target description support for ARM4")
Reviewed-on: http://openocd.zylin.com/5257 Tested-by: jenkins
Antonio Borneo [Mon, 3 Feb 2020 15:48:40 +0000 (16:48 +0100)]
ftdi: flush mpsse queue after a level change on reset pins
The function ftdi_set_signal() does not propagate the pin change
until next call to mpsse_flush(). Current code does not toggles
immediately the reset pins if polling is turned off.
Call mpsse_flush() at the end of ftdi_reset().
While there, remove the duplicated LOG message.
Change-Id: I79eacfe4fc32b5cdf2dc1b78f3660d96988466bc Fixes: 8850eb8f2c51 ("swd: get rid of jtag queue to assert/deassert srst") Reported-by: Leonard Crestez <leonard.crestez@nxp.com> Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5431 Tested-by: jenkins Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Sat, 19 Oct 2019 17:46:53 +0000 (19:46 +0200)]
jimtcl: update to tag 0.79
OpenOCD is stuck at jimtcl tag 0.77 that is 3 years old.
The latest tag 0.79 (2019-11-20) is already used by debian build,
which packs jim library separately, as shown in [1]. Today only
the build for architecture powerpcspe is still not updated to
latest package version.
I have been using jim 0.79 since the day of the release, without
any issue.
Switch jimtcl to latest tag 0.79
[1] https://packages.debian.org/sid/openocd
Change-Id: I3426e68c32f88ecde74d4278303925423db451e0 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5403 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Fri, 14 Feb 2020 13:35:51 +0000 (14:35 +0100)]
target: fix crash with jimtcl 0.78
The jimtcl commit 41c5ff1809f5 ("jim.c: Fix Object leak in zlib
support") https://repo.or.cz/jimtcl.git/commit/41c5ff1809f5
makes Jim_SetResultFormatted() freeing the parameters that have
zero refcount.
OpenOCD commit 559d08c19ed8 ("jim tests: use installed") adds the
only code instance in OpenOCD that first passes a zero refcount
object to Jim_SetResultFormatted() and then frees it.
By switching jimtcl version to 0.78 or newer this causes a crash
of OpenOCD.
To trigger the crash in a telnet session, check that the current
target is running and type:
[target current] arp_waitstate halted 1
Remove the call to Jim_FreeNewObj() after the call to
Jim_SetResultFormatted().
Change-Id: I5f5a8bca96a0e8466ff7b789fe578ea9785fa550 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5453 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Mon, 24 Feb 2020 11:26:07 +0000 (12:26 +0100)]
jtag: report API reset as synchronous
The jtag API reset() is synchronous, but this was not highlighted
in the description.
Change-Id: I76ffb7eec97c8608cfbef0b9268ee18a5f50b221 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 8850eb8f2c51 ("swd: get rid of jtag queue to assert/deassert srst")
Reviewed-on: http://openocd.zylin.com/5471 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
A common problem with target configurations appears to be broken
debug base address configuration. ARM DDI0406C.d specifies in App. D,
1.4.1, that bit 31 of the debug base address serves as identification
of an external debugger, as opposed to an internal access to memory
mapped debug registers by the CPU. External accesses are treated
as privileged and require no debug authentification via the lock
access register.
Sometimes the base address of a debug component is wrong even
in the targets' ROM table. In this case, the correct base address
must be specified using the -dbgbase argument when creating the
target.
This patch adds a warning when bit 31 of the debug base address
is not set, as a hint to the user.
Change-Id: I9c41d85a138123c657ef655e3436a2aa39249dcc Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/5105 Tested-by: jenkins Reviewed-by: Tommy Vestermark <tov@vestermark.dk> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Mon, 9 Dec 2019 11:47:07 +0000 (12:47 +0100)]
target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
Writes to EDITR trigger the instruction to be executed if the PE
is in Debug state:
- If the PE is in AArch64 state, this is an A64 instruction.
- If the PE is in AArch32 state, this is a T32 instruction
But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.
Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.
Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Wed, 4 Dec 2019 14:09:51 +0000 (15:09 +0100)]
target/aarch64: fix soft breakpoint when PE is in AArch32 state
Before this patch aarch64_set_breakpoint was using either A64, or A32
HLT opcode by relying on armv8_opcode helper.
This behaviors ignores the fact that in AArch32 state the core could
execute Thumb-2 instructions, and gdb could request to insert a soft
bkpt in a Thumb-2 code chunk.
In this change, we check the core_state and bkpt length to know the
correct opcode to use.
Note: based on https://sourceware.org/gdb/current/onlinedocs/gdb/ARM-Breakpoint-Kinds.html
if bkpt length/kind == 3, we should replace a 32-bit Thumb-2 opcode,
then we use twice the 16 bits Thumb-2 bkpt opcode and we fix-up the
length to 4 bytes, in order to set correctly the bpkt.
Change-Id: I8f3551124412c61d155eae87761767e9937f917d Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5355 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Mon, 9 Dec 2019 11:35:01 +0000 (12:35 +0100)]
target/aarch64: fix minor stepping issue with gdb
when using step command from gdb the step happens without any issue,
but aarch64_step call explicitly aarch64_poll which consumes the
status change to HALTED, so it does not inform gdb that the step has
finished.
by removing this call, all is back to normal and openocd could inform gdb
that the step has finished.
Change-Id: I9366aecd20f7d52259b050b8653189b67d9299d0 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5354 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Change-Id: I693e5b7933fc61956010a96be57ee6eb8abd3c31 Signed-off-by: Anton V. Kirilchik <kosmonaffft@gmail.com>
Reviewed-on: http://openocd.zylin.com/5422 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tarek BOCHKATI [Tue, 25 Feb 2020 18:35:44 +0000 (19:35 +0100)]
semihosting: reorganize semihosting commands
the same semihosting handlers chain is declared twice:
1. in src/target/armv4_5.c
2. in src/target/riscv/riscv.c
to make it simpler we moved the declaration into
'src/target/semihosting_common.c' under semihosting_common_handlers[].
then we used this into both of armv4_5.c and riscv.c
Marek Vasut [Wed, 15 Jan 2020 04:42:03 +0000 (05:42 +0100)]
tcl/target: Unify Renesas R-Car JTAG reset config
Both Gen2 and Gen3 used the same init_reset{} implementation,
pull it into common file and include it from both generations.
Moreover, this behavior is SoC specific, not board specific,
so move the common init_reset into target/ directory.
Edward Fewell [Fri, 28 Feb 2020 22:56:11 +0000 (16:56 -0600)]
flash/nor: update support for TI MSP432 devices
Added fixes for issues found in additional code reviews.
Fixed host Endianness issues with using buffer reads
and writes instead of the *_u32 variants.
Changed code that tried to ID banks by hardcode
bank_number values to use instead the bank base
address. This fixes problems using configurations
with multiple devices.
Note that this replaces Change 4786 which has
been abandoned because of extensive changes to
the code to stop IDing banks by name. And I
think I really messed up a rebase/merge on the
document file.
Tested on MSP432P401R, MSP432P4111, and MSP432E401Y
Launchpads.
Change-Id: Id05798b3aa78ae5cbe725ee762a164d673ee5767 Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/5481 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
luca vinci [Wed, 8 Jan 2020 09:15:40 +0000 (10:15 +0100)]
bluenrg-x: simplyfied the driver
Adopted only fast algorithm for flash programming:
- write_word and write_byte methods have been removed.
- start and end write alignments have been defined.
Moved flash controller registers offsets in a common file
shared with the flash algorithm.
- the flash base address is passed to the flash algorithm
as a parameter.
Removed unused functions
luca vinci [Tue, 5 Nov 2019 07:45:04 +0000 (08:45 +0100)]
bluenrg-x: added support for BlueNRG-LP device
Extended bluenrg-x flash driver with BlueNRG-LP flash controller.
Changes include:
- register set for the flash controller
- made software structure prone to support more easily future devices
- updated target config file
Writing bits to an uninitialized buffer generated false warnings.
Zero buffers before setting them by buf_set_u32|64()
(do it only if bit-by-bit copy loop is used,
zeroed buffer is not necessary if a fast path write is used)
Change-Id: I2f7f8ddb45b0cbd08d3e249534fc51f4b5cc6694 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5383 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tomas Vanek [Fri, 20 Dec 2019 22:26:51 +0000 (23:26 +0100)]
flash/nor/numicro: use flash infrastructure to align write
The aligning code generated a clang static analyzer warning and
imposed huge memory leak. This part of code was removed and
flash infrastructure to alignment is used instead.
Oleksij Rempel [Mon, 3 Feb 2020 18:44:40 +0000 (19:44 +0100)]
remove libusb0_common support
Supporting two libusb versions provides additional development challenges
without additional advantage. In most cases we need to patch libusb0_common and
libusb1_common without real ability to test libusb0_common.
Marek Vasut [Tue, 7 Jan 2020 21:49:45 +0000 (22:49 +0100)]
tcl/target: Add unified config for Renesas R-Car Gen2 targets
Add configuration for the Renesas R-Car Generation 2 targets.
These are SoCs with Cortex A15s and A7s. All cores currently
supported by OpenOCD are supported here as well as two new
cores, M2N and V2H, for the sake of support completeness.
Tarek BOCHKATI [Thu, 6 Feb 2020 23:12:48 +0000 (00:12 +0100)]
flash/stm32h7x: add support of STM32H7Ax/H7Bx devices
this new device has the following features:
- single core cortex-M7
- 2MB flash - dual bank
- page size 8k
- write protection grouped by 4 sectors
- write block size 128 bits (16 bytes)
the bit definition of FLASH_CR is different than STM32H74x,
that's why we introduced a helper to compute the FLASH_CR value
Evgeniy Didin [Mon, 27 Jan 2020 12:22:27 +0000 (15:22 +0300)]
Introduce ARCv2 architecture related code
This patch is an initial bump of ARC-specific code
which implements the ARCv2 target(EMSK board) initializing
routine and some basic remote connection/load/continue
functionality.
Changes:
03.12.2019:
-Add return value checks.
-Using static code analizer next fixes were made:
Mem leak in functions:
arc_jtag_read_memory,arc_jtag_read_memory,
arc_jtag_write_registers, arc_jtag_read_registers,
jim_arc_add_reg_type_flags, jim_arc_add_reg_type_struct,
arc_build_reg_cache, arc_mem_read.
Dead code in "arc_mem_read";
In arc_save_context, arc_restore_context correct arguments
in"memset" calls.
In "build_bcr_reg_cache", "arc_build_reg_cache" check
if list is not empty.
29.12.2019
-Moved code from arc_v2.c to arc.c
-Added checks of the result of calloc/malloc calls
-Reworked arc_cmd.c: replaced spagetty code with functions
-Moved to one style in if statements - to "if(!bla)"
-Changed Licence headers
22.01.2020
-Removed unused variables in arc_common
-Renamed register operation functions
-Introduced arc_deinit_target function
-Fixed interrupt handling in halt/resume:
* add irq_state field in arc_common
* fix irq enable/disable calls ( now STATUS32 register is used)
-Switched from buf_set(get)_us32() usage to target_buffer_set(get)_u32()
-Made some cleanup
30.01.2020
-Removed redundant arc_register struct, moved target link to arc_reg_desc
-Introduced link to BCR reg cache in arc_common for freeing memory.
-Now arc_deinit_target frees all arc-related allocated memory.
Valgrind shows no memory leaks.
-Inroduced arch description in arc.c
01.02.2020
-Remove small memory allocations in arc_init_reg. Instead created reg_value
and feature fields in arc_reg_desc.
-Add return value for arc_init_reg() func.
-Replaced some integer constants(61,62,63) with defines.
-Removed redundant conversions in arc_reg_get_field().
-Moved iccm/dccm configuration code from arc_configure()
to separate functions.
19.02.2020
-Change sizeof(struct) to sizeof(*ptr) in allocations
-Changed if/while(ptr != NULL) to if/while(ptr)
-Removed unused variables from struct arc_jtag
-Add additional structs to arc_reg_data_type
to reduce amount of memory allocations calls
and simplifying memory freeing.
-Add helper arc_reg_bitfield_t struct which includes
reg_data_type_bitfield object and char[] name. Reduces
memory allocations calls.
-Add limit for reg_type/reg_type_field names(20 symbols).
-Add in jim_arc_add_reg_type*() functions additional
argnument checks(amount of field/name size).
-In jim_arc_add_reg_type*() reduced amount of memory allocations.
-Cleanup of jim_arc_add_reg_type*() functions.
-For commands update ".usage" fields according docopt.
-Cleanup in arc_jtag.c
-Renamed functions which require jtag_exeutre_queue() to arc_jtag_enque_*()
-Add arc_jtag_enque_register_rw() function, which r/w to jtag ir/dr regs
during regiter r/w.
24.02:
-Change include guards in arc* files according coding style
-Remove _t suffix in struct arc_reg_bitfield_t
-Some cleanup
Antonio Borneo [Sun, 5 May 2019 19:26:56 +0000 (21:26 +0200)]
coding style: fix space around pointer's asterisk
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like spacing.
This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types POINTER_LOCATION --fix-inplace -f {} \;
then manually reviewed.
OpenOCD coding style does not mention the space around pointer's
asterisk, so no check is enforced. This patch only makes the style
uniform across the files.
The patch only changes amount and position of whitespace, thus
the following commands show empty diff
git diff -w
git log -w -p
git log -w --stat
Change-Id: Iefb4998e69bebdfe0d1ae65cadfc8d2c4f166d13 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5197 Tested-by: jenkins
Antonio Borneo [Fri, 14 Jun 2019 08:00:06 +0000 (10:00 +0200)]
log: let command "log_output" to set back its default
The default log output is stderr. After the command "log_output"
has been used to set an output log file, it is possible to return
back to stderr only on *NIX hosts specifying a new log output file
as "/dev/stderr", but this is not intuitive, not documented and
not portable out of *NIX.
Make command "log_output" able to set back the default output to
stderr when the parameter is either "default" or is missing.
While there, add debug message to log the change and make the
command return error on incorrect syntax.
Change-Id: I8c7c929780f58e2c23936737c8e7274a96734786 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5233 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Thu, 23 Jan 2020 14:18:33 +0000 (15:18 +0100)]
adi_v5_dapdirect: fix connect under reset
Deassert the reset only if connect under reset is not required;
otherwise, assert the reset.
This fix aligns the behavior of connect under reset in dapdirect
with the behavior in jtag and swd.
Change-Id: I937ef4320b44e51ef6cb0e349e12348dbfbe4abb Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5415 Tested-by: jenkins
Marc Schink [Mon, 10 Feb 2020 14:39:19 +0000 (15:39 +0100)]
flash/nor/stm32h7x: Minor code cleanups
Change-Id: Ia212b1877abeda27f507de29a3aee2b171c1b8c6 Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5448 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Christopher Head <chead@zaber.com>
The imx8mp-evk board has a FT4232H chip connected to the chip's JTAG
pins.
Switching between this on-board interface and the external ARM-10
connector is controlled by an GPIO which is behind an i2c expander
connected to the same FTDI chip.
Switching can be performed using the NXP bcu tool:
https://github.com/NXPmicro/bcu
Change-Id: Ic910515f76eaf09ea6d0f755b026fb09cf09ccfc Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5426 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Report the 32-byte alignemnt requirement via the bank structure rather
than enforcing it ad-hoc in the write routine. This allows people to do
non-32-byte-aligned writes if they want, with the infrastructure fixing
up the addresses passed to the low-level driver.
Change-Id: I2c4f532f2000435954a900224dbc9f2c30d1cc94 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5388 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Christopher Head [Mon, 27 Jan 2020 22:48:15 +0000 (14:48 -0800)]
flash/nor/stm32h7x: check OPTCHANGEERR
Without this, a failed attempt to change option bytes will silently
appear to succeed but without actually changing the option bytes
(confusingly, the option bytes will still read back as if they had been
changed until a reboot as well!).
Change-Id: Id529c6c384a8a16be75f5702310670d99d8fac79 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5418 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Antonio Borneo [Fri, 14 Jun 2019 13:59:17 +0000 (15:59 +0200)]
armv8: check the core state to pass the correct arch to gdb
Commit 3799eded6761 ("target/aarch64: add support for
multi-architecture gdb") passes the constant string "aarch64" as
architecture to gdb. This is not working if the core is running
in 32 bits mode; gdb reports:
Truncated register 8 in remote 'g' packet
then closes the connection with OpenOCD.
Make the architecture string dependant from the current state of
the core.
Change-Id: I16e1614ea02ba29bf87f450b3dfe25c83c9a3612 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5234 Tested-by: jenkins Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Antonio Borneo [Mon, 6 May 2019 09:40:17 +0000 (11:40 +0200)]
target/nds32: fix type of magic number
The macro NDS32_COMMON_MAGIC was cast-ed to int to avoid compile
time error for comparison type mismatch while comparing it with
the field common_magic.
This is incorrect because the macro value is a 32 bit unsigned
value; better changing the type of the field common_magic to keep
the unsigned value.
Issue identified by checkpatch script from Linux kernel v5.1 using
the command
Jan Matyas [Wed, 22 Jan 2020 07:50:36 +0000 (08:50 +0100)]
jtag_vpi: added an option to stop simulation on exit
Command CMD_STOP_SIMU had been defined in jtag_vpi for a long time
(since the beginning?) but has not been utilized until now.
Its purpose is to signal to the jtag_vpi server (i.e. the RTL
simulation software) that the simulation shall be stopped.
This commit adds a TCL configuration command that selects whether
CMD_STOP_SIMU will be sent to the jtag_vpi server when OpenOCD is
about to exit. This functionality is off by default to maintain
identical behavior as in previous OpenOCD versions, unless the user
enables it explicitly.
Change-Id: If3894af6efa61038ccf6c9191f664e2128f2ef11 Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: http://openocd.zylin.com/5407 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This will enable us to use either name when calling flash driver commands.
For example the stm32wbx family use the same flash driver as the stm32l4x, so
the user has to use 'stm32l4x lock 0' which can be confusing.
Now the user can also use 'stm32wbx lock 0' with the same result.
Change-Id: Ic0d8da9afc202d7cc82d9b9949827e958a1cc824 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5436 Tested-by: jenkins Reviewed-by: Marc Schink <dev@zapb.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Marc Schink [Tue, 28 Jan 2020 13:54:19 +0000 (14:54 +0100)]
tcl: Remove executable bit
Change-Id: Ib452435b13c3cb8d14453d983151936238b9601d Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: http://openocd.zylin.com/5419 Reviewed-by: Paul Fertser <fercerpav@gmail.com> Tested-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Frank Hunleth [Tue, 17 Dec 2019 20:06:09 +0000 (15:06 -0500)]
efm32: add EFR32ZG13P and EFR32ZG14P parts
This adds the EFR32 Zen Gecko Family parts. The device family values are
found in table 4.7.11 of
https://www.silabs.com/documents/public/reference-manuals/efr32xg14-rm.pdf.
Change-Id: I3858b7ba815784b1150e2214a2833e8ff7d249e1 Signed-off-by: Frank Hunleth <fhunleth@troodon-software.com>
Reviewed-on: http://openocd.zylin.com/5364 Tested-by: jenkins Reviewed-by: Marc Schink <dev@zapb.de>
Antonio Borneo [Mon, 6 Jan 2020 11:35:17 +0000 (12:35 +0100)]
stlink: fix max packet size for 8 bit R/W on stlink-v3
While ST internal documentation for STLINK-V3 reports that 8 bits
read/write commands handle 512 bytes of data, a firmware bug makes
it crashing on high data size.
This is fixed with firmware V3J6 (shipped together with V2J36).
Check for firmware version to use the proper data size.
Change-Id: Iaba6cd26bbe130097c1c19de610680e0e8b69bfc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: https://sourceforge.net/p/openocd/tickets/259/
Reviewed-on: http://openocd.zylin.com/5408 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Wed, 2 Oct 2019 16:21:05 +0000 (18:21 +0200)]
jtag: flush jtag queue after jtag_add_tlr()
If the TLR sequence is sent as result of the command "adapter
assert trst" while polling is off, the TLR sequence is not sent out
until a following jtag operation.
Flush the jtag queue before return.
Change-Id: I20efd7137cb7b1d1c4f73c1362cbe4e57aeaae49 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5405 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Christopher Head [Tue, 21 Jan 2020 20:44:46 +0000 (12:44 -0800)]
Switch to HTTPS for submodules
repo.or.cz already redirects HTTP requests to HTTPS. There is therefore
no possible benefit to keeping the submodule URLs using HTTP—anyone who
can’t access via HTTPS will fail anyway, immediately after the redirect.
Changing the submodule URLs eliminates one unnecessary HTTP request and,
more importantly, eliminates SSLStrip-style attacks.
Change-Id: I9faf1ec8aa87bcfd1acafe2c445a0baf2abfbd09 Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/5406 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Antonio Borneo [Thu, 30 Jan 2020 17:11:54 +0000 (18:11 +0100)]
tcl: fix remaining scripts after rework adapter commands
Some script have been added or modified after the patches for
reworking the adapter commands were pushed in gerrit.
Such scripts use the old command syntax and trigger a "deprecated"
warning at runtime.
Fix them with the same sed commands used for the other scripts:
sed -i 's/^interface /adapter driver /' $(find tcl/ -type f)
sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f)
sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f)
sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f)
Antonio Borneo [Wed, 5 Feb 2020 17:00:12 +0000 (18:00 +0100)]
jtag: drivers: xlnx-pcie-xvc: fix build on Linux pre v4.10
The macro PCI_CFG_SPACE_EXP_SIZE is exposed to userspace from
Linux kernel v4.10, with commit cc10385b6fde ("PCI: Move config
space size macros to pci_regs.h")
http://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=cc10385b6fde
Define the macro in the driver code, if not already defined.
Change-Id: I610219a2587eff2c142102b9f7830e3da882af78 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5435 Reviewed-by: Moritz Fischer <moritzf@google.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins
Marek Vasut [Sat, 13 Apr 2019 20:44:45 +0000 (22:44 +0200)]
flash/nor: Add Renesas RPC HF driver
Add driver for the RPC block in HF mode on Renesas R-Car Gen3 SoCs.
This driver allows operating the on-SIP HF memory.
Note that HF is CFI compliant flash, but it is not memory mapped,
hence the need to replace all the memory accessors and read/write
functions. The write function is entirely replaced to increase
performance and is Spansion/AMD specific, since there is no known
SIP with other HF from another vendor.
Add the following two lines to board TCL file to bind the driver on
R-Car Gen3 SoC using HyperFlash:
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME rpchf 0x08000000 0x4000000 2 2 $_CHIPNAME.a57.0
Antonio Borneo [Fri, 23 Aug 2019 13:49:58 +0000 (15:49 +0200)]
tcl: replace command "interface" with "adapter driver"
Avoid annoying "deprecated" messages while running the scripts
distributed with OpenOCD code.
Change automatically created with command
sed -i 's/^interface /adapter driver /' $(find tcl/ -type f)
Change-Id: I2291dfb96e164beecbeb3366ce83f9df2ad6c197 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5283 Reviewed-by: Marc Schink <dev@zapb.de> Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tomas Vanek [Sat, 14 Dec 2019 17:55:01 +0000 (18:55 +0100)]
flash/nor/stm32l4x: fix minor errors in flash write/async algo
Fix comment of tested errors in asm src.
List all relevant errors in FLASH_ERROR mask: FLASH_PROGERR was missing
and any trial to re-program already programmed double word ended up
in the error bit held uncleared and flash write permanetly repeating
the error message until reset.
Lock the bank also after unsuccesfull write_block run.
Set async target algo block size to size of double word.
Remove warning in case of write_block success. In case of error
use LOG_ERROR instead of warning.
Tomas Vanek [Sat, 14 Dec 2019 15:08:32 +0000 (16:08 +0100)]
flash/nor/stm32l4x: use flash infrastructure to align write
The original code paded the write chunk with random bytes by overrunning
the buffer. An user can easily regard the random bytes to
be a programming error.
Tomas Vanek [Mon, 16 Dec 2019 12:08:01 +0000 (13:08 +0100)]
target/arm_cti: fix regression from Tcl_return_values series
Since commit 7f260f5009a774f2d66b5f3037f8f595c6881d4d native OpenOCD
command handlers should not directly use Jim_SetResult functions.
The Tcl result of a native command is built as concatenation of
command_print() strings and Jim_SetResult() is called after return
of the command handler.
Replace "wrong number of args" error messages (now not delivered to user)
by simply return ERROR_COMMAND_SYNTAX_ERROR
Antonio Borneo [Fri, 17 Jan 2020 15:44:00 +0000 (16:44 +0100)]
jtag: drivers: xlnx-pcie-xvc: fix build after merge
Commit [1] was submitted in gerrit well before the conflicting
commit [2] get merged in master branch. While it was fine
committing in master branch [1] alone, it should not be
committed "as is" after [2].
Unfortunately gerrit did not complained committing [1] after [2].
The result is that master branch does not build anymore when the
driver xlnx-pcie-xvc is enabled at configure time by the optional
flag --enable-xlnx-pcie-xvc.
Apply to the driver the required changes as in [2].
While there, remove the duplicated struct xlnx_pcie_xvc_transports
and the struct field already implicitly initialized to zero.
[1] ff6d0704ecd6 ("jtag: drivers: xlnx-pcie-xvc: Add support for
Xilinx XVC/PCIe")
[2] efd1d642220a ("adapter: switch from struct jtag_interface to
adapter_driver")
Change-Id: I5498479b802a231afbee1b845ae9775e1da7c728 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5402 Reviewed-by: Moritz Fischer <moritzf@google.com> Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change-Id: Ief22f61e93bcabae37f6e371156dece6c4be3459 Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
---
V2: - Add Makefile and linker script for the SH QSPI IO algorithm
- Include the algorithm code instead of hard-coding it
Reviewed-on: http://openocd.zylin.com/5143 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
jtag_libusb_bulk_read|write: return error code instead of size
A USB bulk write/read operation may fail with different errors:
LIBUSB_ERROR_TIMEOUT if the transfer timed out (and populates transferred)
LIBUSB_ERROR_PIPE if the endpoint halted
LIBUSB_ERROR_OVERFLOW if the device offered more data, see Packets and overflows
LIBUSB_ERROR_NO_DEVICE if the device has been disconnected
another LIBUSB_ERROR code on other failures
Current OpenOCD code is using the transfer size based error detection.
Which may not always work. For example for LIBUSB_ERROR_OVERFLOW as libusb
documentation says:
"Problems may occur if the device attempts to send more data than can fit in
the buffer. libusb reports LIBUSB_TRANSFER_OVERFLOW for this condition but
other behaviour is largely undefined: actual_length may or may not be accurate,
the chunk of data that can fit in the buffer (before overflow) may or may not
have been transferred."
This patch is refactoring code to use actual error return value for
error detection instead of size.
Moritz Fischer [Fri, 4 Oct 2019 03:25:26 +0000 (20:25 -0700)]
jtag: drivers: xlnx-pcie-xvc: Add support for Xilinx XVC/PCIe
Add support for Xilinx Virtual Cable over PCIe JTAG controller.
It is commonly used in Xilinx based PCI Express designs with JTAG IP
in the FPGA fabric.
Access to the JTAG registers happens via the PCI Express extended
configuration space.
This can be used to debug soft-cores instantiated in the FPGA fabric.
The clang static checker doesn't find any new problems with this change.
Change-Id: Ib12ede0d1f26dacfda808d5e05b947b640c5bde7 Signed-off-by: Moritz Fischer <moritzf@google.com>
Reviewed-on: http://openocd.zylin.com/5314 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Marex Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>