]>
git.gag.com Git - hw/lipocharger/log
summary |
shortlog | log |
commit |
commitdiff |
tree
first ⋅ prev ⋅ next
Bdale Garbee [Tue, 7 Jun 2011 15:54:54 +0000 (09:54 -0600)]
explicitly do not include frontsilk in the zip file, as it's basically
illegible on this design and the refdes information isn't all that useful
Bdale Garbee [Mon, 6 Jun 2011 06:31:56 +0000 (00:31 -0600)]
change version to 1.0 in preparation for requesting assembly quote
Bdale Garbee [Tue, 3 May 2011 09:02:36 +0000 (03:02 -0600)]
clean up silk screen
Bdale Garbee [Tue, 3 May 2011 08:50:27 +0000 (02:50 -0600)]
fix stupidity in the LED circuit .. sigh
Bdale Garbee [Tue, 26 Apr 2011 03:10:14 +0000 (21:10 -0600)]
add more attributes
Bdale Garbee [Fri, 22 Apr 2011 16:03:58 +0000 (10:03 -0600)]
add data sheet for the slide switch we're using
Bdale Garbee [Fri, 22 Apr 2011 00:38:41 +0000 (18:38 -0600)]
fix mask clearance on switch mounting holes, fix refdes on switch
Bdale Garbee [Tue, 19 Apr 2011 08:02:52 +0000 (02:02 -0600)]
switch usb footprint for one without overhang so can reduce length to 1"
Bdale Garbee [Tue, 19 Apr 2011 07:56:21 +0000 (01:56 -0600)]
shrink length to minimum required including USB overhang
Bdale Garbee [Thu, 10 Mar 2011 14:32:50 +0000 (07:32 -0700)]
add charge rate switch legends to schematic and pcb silk screen
Bdale Garbee [Thu, 10 Mar 2011 14:07:57 +0000 (07:07 -0700)]
clearn DRC run except for known bug regarding outline pseudo-layer
Bdale Garbee [Thu, 10 Mar 2011 05:32:35 +0000 (22:32 -0700)]
first draft of a second version
Bdale Garbee [Thu, 10 Mar 2011 02:11:56 +0000 (19:11 -0700)]
need a 10k resistor from the thermistor input to ground
Bdale Garbee [Mon, 6 Dec 2010 23:42:06 +0000 (16:42 -0700)]
switch to 6.3V bulk caps!
Bdale Garbee [Tue, 23 Nov 2010 06:13:56 +0000 (23:13 -0700)]
make sure all silk elements are within pcb outline
Bdale Garbee [Tue, 23 Nov 2010 05:37:17 +0000 (22:37 -0700)]
tweaking silk and attributes
Bdale Garbee [Thu, 18 Nov 2010 23:08:44 +0000 (16:08 -0700)]
new footprint for the IC with vias, DRC clean again
Bdale Garbee [Thu, 18 Nov 2010 18:33:41 +0000 (11:33 -0700)]
add explicit netlist connection for exposed ground pad on DFN, clean up
various attributes on the layout to ensure no conflict with LiPo connector
and lower impedance for various high-current nets
Bdale Garbee [Thu, 18 Nov 2010 15:31:11 +0000 (08:31 -0700)]
move vias outside the battery connector pads
Bdale Garbee [Thu, 11 Nov 2010 10:24:51 +0000 (03:24 -0700)]
add targets for automating outputs
Bdale Garbee [Thu, 11 Nov 2010 08:00:27 +0000 (01:00 -0700)]
fix layout name
Bdale Garbee [Thu, 11 Nov 2010 06:19:57 +0000 (23:19 -0700)]
fix DFM identified soldermask issues
Bdale Garbee [Thu, 11 Nov 2010 05:43:04 +0000 (22:43 -0700)]
tweaks based on freedfm.com output
Bdale Garbee [Fri, 5 Nov 2010 17:05:37 +0000 (11:05 -0600)]
ground prog2, fatten supply and output traces
Bdale Garbee [Fri, 5 Nov 2010 04:47:21 +0000 (22:47 -0600)]
enabling outline layer causes bogus drc errors, so leave it off
Bdale Garbee [Thu, 4 Nov 2010 22:47:57 +0000 (16:47 -0600)]
initial capture of LiPo charger