initial capture of LiPo charger

diff --git a/Datasheets/mcp73837.pdf b/Datasheets/mcp73837.pdf
new file mode 100644 (file)
index 0000000..e19d82b
Binary files /dev/null and b/Datasheets/mcp73837.pdf differ

diff --git a/Makefile b/Makefile
new file mode 100644 (file)
index 0000000..3b34b3a
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,44 @@
+# intentionally want to rebuild drc and bom on every invocation
+all:   drc partslist partslist.csv pcb
+
+drc:   lipocharger.sch Makefile
+       -gnetlist -g drc2 lipocharger.sch -o lipocharger.drc
+
+partslist:     lipocharger.sch Makefile
+       gnetlist -g bom -o lipocharger.unsorted lipocharger.sch
+       head -n1 lipocharger.unsorted > partslist
+       tail -n+2 lipocharger.unsorted | sort >> partslist
+       rm -f lipocharger.unsorted
+
+partslist.csv: lipocharger.sch Makefile
+       gnetlist -g partslist4 -o lipocharger.unsorted lipocharger.sch
+       head -n1 lipocharger.unsorted > partslist.csv
+       tail -n+2 lipocharger.unsorted | sort -t \, -k 8 >> partslist.csv
+       rm -f lipocharger.unsorted
+
+pcb:   lipocharger.sch project Makefile
+       gsch2pcb project
+
+# note that 'gschlas -e foo.sch' will embed all symbols in the schematic, this
+# might be a really good idea for publishing designs to the web that others
+# might review?  Like this example from DJ:
+#
+#web :
+#        for i in channel.sch ethernet.sch power.sch mcu.sch; do \
+#          cp $$i tmp.sch ; \
+#          gschlas -e tmp.sch ; \
+#          mv tmp.sch ${WEB}/$$i; \
+#        done
+
+# this shoves local work out to the git.gag.com repository
+push:  
+       git push --mirror
+
+zip:   lipocharger.back.gbr lipocharger.backmask.gbr lipocharger.fab.gbr lipocharger.front.gbr lipocharger.frontmask.gbr lipocharger.frontpaste.gbr lipocharger.frontsilk.gbr lipocharger.group2.gbr lipocharger.group3.gbr lipocharger.plated-drill.cnc lipocharger.xy  Makefile # lipocharger.xls
+       zip lipocharger.zip lipocharger.*.gbr lipocharger.*.cnc lipocharger.xy # lipocharger.xls
+
+clean:
+       rm -f *.bom *.drc *.log *~ lipocharger.ps *.gbr *.cnc *bak* *- *.zip 
+       rm -f *.net *.xy *.cmd *.png partslist partslist.csv
+       rm -f *.partslist *.new.pcb *.unsorted lipocharger.xls
+

diff --git a/attribs b/attribs
new file mode 100644 (file)
index 0000000..92a91e7
--- /dev/null
+++ b/attribs
@@ -0,0 +1,6 @@
+value
+vendor
+vendor_part_number
+footprint
+loadstatus
+device

diff --git a/gattribrc b/gattribrc
new file mode 100644 (file)
index 0000000..55565aa
--- /dev/null
+++ b/gattribrc
@@ -0,0 +1,2 @@
+;; list libraries here.  order matters as this sets the search order
+(component-library "../bdale/sym")

diff --git a/gnetlistrc b/gnetlistrc
new file mode 120000 (symlink)
index 0000000..d31077e
--- /dev/null
+++ b/gnetlistrc
@@ -0,0 +1 @@
+gattribrc
\ No newline at end of file

diff --git a/gschemrc b/gschemrc
new file mode 120000 (symlink)
index 0000000..d31077e
--- /dev/null
+++ b/gschemrc
@@ -0,0 +1 @@
+gattribrc
\ No newline at end of file

diff --git a/lipocharger.pcb b/lipocharger.pcb
new file mode 100644 (file)
index 0000000..f99478a
--- /dev/null
+++ b/lipocharger.pcb
@@ -0,0 +1,1114 @@
+# release: pcb 20091103
+# date:    Thu Nov  4 16:43:53 2010
+# user:    bdale (Bdale Garbee,KB0G)
+# host:    rover
+
+# To read pcb files, the pcb version (or the cvs source date) must be >= the file version
+FileVersion[20070407]
+
+PCB["TeleNano" 100000 40000]
+
+Grid[100.000000 0 0 0]
+Cursor[0 40000 0.000000]
+PolyArea[200000000.000000]
+Thermal[0.500000]
+DRC[600 1000 600 500 1500 700]
+Flags("nameonpcb,clearnew,snappin,liveroute,hidenames")
+Groups("1,c:2,s:3")
+Styles["Signal,1000,2900,1500,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
+
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+       SymbolLine(5 35 10 30 8)
+       SymbolLine(10 30 15 30 8)
+       SymbolLine(15 30 20 35 8)
+       SymbolLine(20 35 20 50 8)
+       SymbolLine(0 30 5 35 8)
+)
+Symbol('o' 12)
+(
+       SymbolLine(0 35 0 45 8)
+       SymbolLine(0 35 5 30 8)
+       SymbolLine(5 30 15 30 8)
+       SymbolLine(15 30 20 35 8)
+       SymbolLine(20 35 20 45 8)
+       SymbolLine(15 50 20 45 8)
+       SymbolLine(5 50 15 50 8)
+       SymbolLine(0 45 5 50 8)
+)
+Symbol('p' 12)
+(
+       SymbolLine(5 35 5 65 8)
+       SymbolLine(0 30 5 35 8)
+       SymbolLine(5 35 10 30 8)
+       SymbolLine(10 30 20 30 8)
+       SymbolLine(20 30 25 35 8)
+       SymbolLine(25 35 25 45 8)
+       SymbolLine(20 50 25 45 8)
+       SymbolLine(10 50 20 50 8)
+       SymbolLine(5 45 10 50 8)
+)
+Symbol('q' 12)
+(
+       SymbolLine(20 35 20 65 8)
+       SymbolLine(15 30 20 35 8)
+       SymbolLine(5 30 15 30 8)
+       SymbolLine(0 35 5 30 8)
+       SymbolLine(0 35 0 45 8)
+       SymbolLine(0 45 5 50 8)
+       SymbolLine(5 50 15 50 8)
+       SymbolLine(15 50 20 45 8)
+)
+Symbol('r' 12)
+(
+       SymbolLine(5 35 5 50 8)
+       SymbolLine(5 35 10 30 8)
+       SymbolLine(10 30 20 30 8)
+       SymbolLine(0 30 5 35 8)
+)
+Symbol('s' 12)
+(
+       SymbolLine(5 50 20 50 8)
+       SymbolLine(20 50 25 45 8)
+       SymbolLine(20 40 25 45 8)
+       SymbolLine(5 40 20 40 8)
+       SymbolLine(0 35 5 40 8)
+       SymbolLine(0 35 5 30 8)
+       SymbolLine(5 30 20 30 8)
+       SymbolLine(20 30 25 35 8)
+       SymbolLine(0 45 5 50 8)
+)
+Symbol('t' 10)
+(
+       SymbolLine(5 10 5 45 8)
+       SymbolLine(5 45 10 50 8)
+       SymbolLine(0 25 10 25 8)
+)
+Symbol('u' 12)
+(
+       SymbolLine(0 30 0 45 8)
+       SymbolLine(0 45 5 50 8)
+       SymbolLine(5 50 15 50 8)
+       SymbolLine(15 50 20 45 8)
+       SymbolLine(20 30 20 45 8)
+)
+Symbol('v' 12)
+(
+       SymbolLine(0 30 0 40 8)
+       SymbolLine(0 40 10 50 8)
+       SymbolLine(10 50 20 40 8)
+       SymbolLine(20 30 20 40 8)
+)
+Symbol('w' 12)
+(
+       SymbolLine(0 30 0 45 8)
+       SymbolLine(0 45 5 50 8)
+       SymbolLine(5 50 10 50 8)
+       SymbolLine(10 50 15 45 8)
+       SymbolLine(15 30 15 45 8)
+       SymbolLine(15 45 20 50 8)
+       SymbolLine(20 50 25 50 8)
+       SymbolLine(25 50 30 45 8)
+       SymbolLine(30 30 30 45 8)
+)
+Symbol('x' 12)
+(
+       SymbolLine(0 30 20 50 8)
+       SymbolLine(0 50 20 30 8)
+)
+Symbol('y' 12)
+(
+       SymbolLine(0 30 0 45 8)
+       SymbolLine(0 45 5 50 8)
+       SymbolLine(20 30 20 60 8)
+       SymbolLine(15 65 20 60 8)
+       SymbolLine(5 65 15 65 8)
+       SymbolLine(0 60 5 65 8)
+       SymbolLine(5 50 15 50 8)
+       SymbolLine(15 50 20 45 8)
+)
+Symbol('z' 12)
+(
+       SymbolLine(0 30 20 30 8)
+       SymbolLine(0 50 20 30 8)
+       SymbolLine(0 50 20 50 8)
+)
+Symbol('{' 12)
+(
+       SymbolLine(5 15 10 10 8)
+       SymbolLine(5 15 5 25 8)
+       SymbolLine(0 30 5 25 8)
+       SymbolLine(0 30 5 35 8)
+       SymbolLine(5 35 5 45 8)
+       SymbolLine(5 45 10 50 8)
+)
+Symbol('|' 12)
+(
+       SymbolLine(0 10 0 50 8)
+)
+Symbol('}' 12)
+(
+       SymbolLine(0 10 5 15 8)
+       SymbolLine(5 15 5 25 8)
+       SymbolLine(5 25 10 30 8)
+       SymbolLine(5 35 10 30 8)
+       SymbolLine(5 35 5 45 8)
+       SymbolLine(0 50 5 45 8)
+)
+Symbol('~' 12)
+(
+       SymbolLine(0 35 5 30 8)
+       SymbolLine(5 30 10 30 8)
+       SymbolLine(10 30 15 35 8)
+       SymbolLine(15 35 20 35 8)
+       SymbolLine(20 35 25 30 8)
+)
+Via[33843 27400 2900 2000 0 1500 "" "thermal(1X)"]
+Via[2600 2600 2900 2000 0 1500 "" ""]
+Via[33843 19526 2900 2000 0 1500 "" ""]
+Via[48300 29800 2900 2000 0 1500 "" ""]
+Via[49200 2500 2900 2000 0 1500 "" "thermal(1S)"]
+Via[37000 9200 2900 2000 0 1500 "" "thermal(0+,1S)"]
+Via[40500 6700 2900 2000 0 1500 "" ""]
+Via[22200 2400 2900 2000 0 1500 "" ""]
+
+Element["" "hole-M2.5" "H1" "unknown" 72500 10000 -2352 -3100 0 100 ""]
+(
+       Pin[0 0 12000 2000 12000 9800 "1" "1" "usetherm,thermal(1S)"]
+       ElementArc [0 0 8000 8000 0 360 1000]
+
+       )
+
+Element["" "hole-M2.5" "H2" "unknown" 72500 30000 -4900 -1000 0 100 ""]
+(
+       Pin[0 0 12000 2000 12000 9800 "1" "1" "usetherm,thermal(1S)"]
+       ElementArc [0 0 8000 8000 0 360 1000]
+
+       )
+
+Element["" "0402" "C1" "4.7uF" 49207 6974 3150 -3150 3 100 ""]
+(
+       Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"]
+       Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "hole-M2.5" "H4" "unknown" 90000 30000 -16900 -21000 0 100 ""]
+(
+       Pin[0 0 12000 2000 12000 9800 "1" "1" "usetherm,thermal(1S)"]
+       ElementArc [0 0 8000 8000 0 360 1000]
+
+       )
+
+Element["" "0402" "C2" "4.7uF" 33926 5307 3150 3150 2 100 ""]
+(
+       Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+       Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "100mil2pin" "J1" "unknown" 56800 14900 3000 12500 3 100 ""]
+(
+       Pin[0 0 7000 3000 7000 3800 "1" "1" "square"]
+       Pin[0 10000 7000 3000 7000 3800 "2" "2" "thermal(1X)"]
+       ElementLine [-5000 15000 5000 15000 1500]
+       ElementLine [-5000 -5000 -5000 15000 1500]
+       ElementLine [-5000 -5000 5000 -5000 1500]
+       ElementLine [5000 -5000 5000 15000 1500]
+
+       )
+
+Element["" "0605" "D1" "unknown" 4320 6226 0 0 1 100 ""]
+(
+       Pad[1280 -1280 2067 -1280 2559 -1771 3159 "2" "2" "square"]
+       Pad[1280 -4626 2067 -4626 2559 -1771 3159 "1" "1" "square"]
+       Pad[6988 -1280 7776 -1280 2559 -1771 3159 "4" "4" "square,edge2"]
+       Pad[6988 -4626 7776 -4626 2559 -1771 3159 "3" "3" "square,edge2"]
+
+       )
+
+Element["" "0402" "R1" "1k" 27826 2407 -3150 -3150 0 100 ""]
+(
+       Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+       Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "0402" "R2" "1k" 17926 2407 -3150 -3150 0 100 ""]
+(
+       Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+       Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "testpoint" "TP2" "unknown" 45600 3100 0 0 0 100 ""]
+(
+       Pin[0 0 3000 1200 4000 1500 "1" "1" ""]
+
+       )
+
+Element["" "testpoint" "TP9" "unknown" 49900 36900 0 0 0 100 ""]
+(
+       Pin[0 0 3000 1200 4000 1500 "1" "1" ""]
+
+       )
+
+Element["" "testpoint" "TP7" "unknown" 39400 36900 0 0 0 100 ""]
+(
+       Pin[0 0 3000 1200 4000 1500 "1" "1" ""]
+
+       )
+
+Element["" "testpoint" "TP8" "unknown" 44700 36900 0 0 0 100 ""]
+(
+       Pin[0 0 3000 1200 4000 1500 "1" "1" ""]
+
+       )
+
+Element["" "S2B-PH-SM4" "J2" "LiPo" 378 39605 0 0 1 100 ""]
+(
+       Pad[23622 -12205 33465 -12205 3937 3937 4724 "-" "2" "square,edge2"]
+       Pad[23622 -20079 33465 -20079 3937 3937 4724 "+" "1" "square,edge2"]
+       Pad[2953 -2953 10433 -2953 5906 0 6693 "tab1" "G" "square"]
+       Pad[2953 -29331 10433 -29331 5906 0 6693 "tab2" "G" "square"]
+
+       )
+
+Element["" "0402" "R3" "3.3k" 37374 31807 -3150 -3150 0 100 ""]
+(
+       Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+       Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "hole-M2.5" "H3" "unknown" 90000 10000 -16900 -21000 0 100 ""]
+(
+       Pin[0 0 12000 2000 12000 9800 "1" "1" "usetherm,thermal(1S)"]
+       ElementArc [0 0 8000 8000 0 360 1000]
+
+       )
+
+Element["" "DFN10_EP" "U1" "unknown" 43343 20000 13000 -8000 3 100 ""]
+(
+       Pad[3937 -7185 3937 -5020 1181 1600 1381 "Vac" "1" "square"]
+       Pad[1969 -7185 1969 -5020 1181 1600 1381 "Vusb" "2" "square"]
+       Pad[0 -7185 0 -5020 1181 1600 1381 "STAT1" "3" "square"]
+       Pad[-1969 -7185 -1969 -5020 1181 1600 1381 "STAT2" "4" "square"]
+       Pad[-3937 -7185 -3937 -5020 1181 1600 1381 "VSS" "5" "square"]
+       Pad[-3937 5020 -3937 7185 1181 1600 1381 "PROG1" "6" "square,edge2"]
+       Pad[-1969 5020 -1969 7185 1181 1600 1381 "PROG2" "7" "square,edge2"]
+       Pad[0 5020 0 7185 1181 1600 1381 "PG" "8" "square,edge2"]
+       Pad[1969 5020 1969 7185 1181 1600 1381 "THERM" "9" "square,edge2"]
+       Pad[3937 5020 3937 7185 1181 1600 1381 "Vbat" "10" "square,edge2"]
+       Pad[-1457 0 1457 0 6496 1600 6796 "11" "11" "square"]
+       ElementLine [7005 -9385 6405 -8785 1000]
+       ElementLine [-6405 -8785 6405 -8785 1000]
+       ElementLine [6405 -8785 6405 8785 1000]
+       ElementLine [-6405 8785 6405 8785 1000]
+       ElementLine [-6405 -8785 -6405 8785 1000]
+
+       )
+Layer(1 "top")
+(
+       Line[24600 5800 25800 4600 1000 2000 "clearline"]
+       Line[19886 2400 19500 2014 1000 2000 "clearline"]
+       Line[4600 2600 5600 1600 1000 2000 "clearline"]
+       Line[15938 1600 16352 2014 1000 2000 "clearline"]
+       Line[29800 2400 29400 2800 1000 2000 "clearline"]
+       Line[2600 2600 4600 2600 1000 2000 "clearline"]
+       Line[45312 3388 45600 3100 1000 2000 "clearline"]
+       Line[45312 12815 45312 3388 1000 2000 "clearline"]
+       Line[2600 2600 3254 2600 1000 2000 "clearline"]
+       Line[49200 5014 48814 5400 1000 2000 "clearline"]
+       Line[56800 14900 55952 14900 1000 2000 "clearline"]
+       Line[55952 14900 49600 8548 1000 2000 "clearline"]
+       Line[33843 29457 35800 31414 1000 2000 "clearline"]
+       Line[3254 2600 5600 4946 1000 2000 "clearline"]
+       Line[12096 1600 15938 1600 1000 2000 "clearline"]
+       Line[22200 2400 19886 2400 1000 2000 "clearline"]
+       Line[25800 3252 26252 2800 1000 2000 "clearline"]
+       Line[47280 28780 48300 29800 1000 2000 "clearline"]
+       Line[25800 4600 25800 3252 1000 2000 "clearline"]
+       Line[14046 4946 14900 5800 1000 2000 "clearline"]
+       Line[14900 5800 24600 5800 1000 2000 "clearline"]
+       Line[47280 27185 47280 28780 1000 2000 "clearline"]
+       Line[12096 4946 14046 4946 1000 2000 "clearline"]
+       Line[37000 9200 37000 7200 1000 2000 "clearline"]
+       Line[37000 7200 35500 5700 1000 2000 "clearline"]
+       Line[39406 12815 39406 11606 1000 2000 "clearline"]
+       Line[39406 11606 37000 9200 1000 2000 "clearline"]
+       Line[41374 12815 41374 6874 1000 2000 "clearline"]
+       Line[41374 6874 41300 6800 1000 2000 "clearline"]
+       Line[43343 12815 43343 4943 1000 2000 "clearline"]
+       Line[43343 4943 40800 2400 1000 2000 "clearline"]
+       Line[40800 2400 29800 2400 1000 2000 "clearline"]
+       Line[47280 12815 47280 10082 1000 2000 "clearline"]
+       Line[47280 10082 48814 8548 1000 2000 "clearline"]
+       Line[49200 2500 49200 5014 1000 2000 "clearline"]
+       Line[39406 27185 39406 30956 1000 2000 "clearline"]
+       Line[39406 30956 38948 31414 1000 2000 "clearline"]
+       Line[33843 27400 33843 29457 1000 2000 "clearline"]
+       Line[41374 27185 41374 34926 1000 2000 "clearline"]
+       Line[41374 34926 39400 36900 1000 2000 "clearline"]
+       Line[43343 27185 43343 35543 1000 2000 "clearline"]
+       Line[43343 35543 44700 36900 1000 2000 "clearline"]
+       Line[45312 27185 45312 32312 1000 2000 "clearline"]
+       Line[45312 32312 49900 36900 1000 2000 "clearline"]
+       Line[32352 5700 32352 11552 1000 2000 "clearline"]
+       Line[32352 11552 33900 13100 1000 2000 "clearline"]
+       Line[33900 13100 33900 19469 1000 2000 "clearline"]
+       Line[33900 19469 33843 19526 1000 2000 "clearline"]
+)
+Layer(2 "bottom")
+(
+       Line[34112 19678 48100 29700 2500 2000 "clearline"]
+       Line[56852 14848 56800 14900 2500 2000 "clearline"]
+       Line[2600 2600 8600 2600 2500 2000 "clearline"]
+       Line[8600 2600 19100 13100 2500 2000 "clearline"]
+       Line[19100 13100 55000 13100 2500 2000 "clearline"]
+       Line[55000 13100 56800 14900 2500 2000 "clearline"]
+       Line[22200 2400 36900 2400 1000 2000 "clearline"]
+       Line[36900 2400 41300 6800 1000 2000 "clearline"]
+       Polygon("clearpoly")
+       (
+               [1000 39000] [99000 39000] [99000 1000] [1000 1000] 
+       )
+)
+Layer(3 "outline")
+(
+)
+Layer(4 "silk")
+(
+       Text[3000 39000 0 100 "LipoCharger" "auto"]
+       Text[3000 32000 0 100 "v0.1" "auto"]
+       Text[3000 25000 0 100 "` 2010" "auto"]
+       Text[3000 17000 0 100 "Bdale Garbee" "auto"]
+)
+Layer(5 "silk")
+(
+)
+NetList()
+(
+       Net("GND" "(unknown)")
+       (
+               Connect("C1-1")
+               Connect("C2-1")
+               Connect("H1-1")
+               Connect("H2-1")
+               Connect("H3-1")
+               Connect("H4-1")
+               Connect("J1-2")
+               Connect("J2-2")
+               Connect("R3-1")
+               Connect("U1-5")
+       )
+       Net("unnamed_net1" "(unknown)")
+       (
+               Connect("C1-2")
+               Connect("D1-1")
+               Connect("D1-2")
+               Connect("J1-1")
+               Connect("U1-1")
+       )
+       Net("unnamed_net2" "(unknown)")
+       (
+               Connect("C2-2")
+               Connect("J2-1")
+               Connect("U1-10")
+       )
+       Net("unnamed_net3" "(unknown)")
+       (
+               Connect("R2-2")
+               Connect("U1-4")
+       )
+       Net("unnamed_net4" "(unknown)")
+       (
+               Connect("TP8-1")
+               Connect("U1-8")
+       )
+       Net("unnamed_net5" "(unknown)")
+       (
+               Connect("TP9-1")
+               Connect("U1-9")
+       )
+       Net("unnamed_net6" "(unknown)")
+       (
+               Connect("R1-2")
+               Connect("U1-3")
+       )
+       Net("unnamed_net7" "(unknown)")
+       (
+               Connect("TP2-1")
+               Connect("U1-2")
+       )
+       Net("unnamed_net8" "(unknown)")
+       (
+               Connect("R3-2")
+               Connect("U1-6")
+       )
+       Net("unnamed_net9" "(unknown)")
+       (
+               Connect("TP7-1")
+               Connect("U1-7")
+       )
+       Net("unnamed_net10" "(unknown)")
+       (
+               Connect("D1-4")
+               Connect("R1-1")
+       )
+       Net("unnamed_net11" "(unknown)")
+       (
+               Connect("D1-3")
+               Connect("R2-1")
+       )
+)

diff --git a/lipocharger.sch b/lipocharger.sch
new file mode 100644 (file)
index 0000000..06a5f13
--- /dev/null
+++ b/lipocharger.sch
@@ -0,0 +1,303 @@
+v 20100214 2
+C 40000 40000 0 0 0 EMBEDDEDtitle-C-bdale.sym
+[
+T 43200 41100 5 10 0 0 0 0 1
+graphical=1
+T 54500 40400 15 8 1 0 0 0 1
+FILE:
+T 59500 40400 15 8 1 0 0 0 1
+REVISION:
+T 57400 40400 15 8 1 0 0 0 1
+PAGE
+T 58200 40400 15 8 1 0 0 0 1
+OF
+B 54400 40000 7600 2700 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+L 54400 40600 62000 40600 15 0 0 0 -1 -1
+T 54500 40100 15 10 1 0 0 0 1
+Project URL:
+T 54900 40800 9 10 1 0 0 0 2
+                Copyright 2010 by Bdale Garbee <bdale@gag.com>
+Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
+L 54400 41400 62000 41400 15 0 0 0 -1 -1
+B 40000 40000 22000 17000 15 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
+T 31100 40800 5 10 0 0 0 0 1
+graphical=1
+]
+C 50000 47300 1 0 0 gnd-1.sym
+C 45500 49200 1 90 0 capacitor-1.sym
+{
+T 44800 49400 5 10 0 0 90 0 1
+device=CAPACITOR
+T 45800 50000 5 10 1 1 180 0 1
+refdes=C1
+T 44600 49400 5 10 0 0 90 0 1
+symversion=0.1
+T 45400 49300 5 10 1 1 0 0 1
+value=4.7uF
+T 45500 49200 5 10 0 0 0 0 1
+vendor_part_number=PCC2475CT-ND
+T 45500 49200 5 10 0 0 0 0 1
+footprint=0402
+T 45500 49200 5 10 0 0 0 0 1
+vendor=digikey
+T 45500 49200 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 53800 49900 1 270 0 battery-1.sym
+{
+T 54700 49600 5 10 0 1 270 0 1
+device=CONNECTOR
+T 54300 49800 5 10 1 1 0 0 1
+refdes=J2
+T 55100 49600 5 10 0 0 270 0 1
+symversion=0.1
+T 54300 49400 5 10 1 1 0 0 1
+value=LiPo
+T 53800 49900 5 10 0 0 0 0 1
+footprint=S2B-PH-SM4
+T 53800 49900 5 10 0 0 0 0 1
+loadstatus=smt
+T 53800 49900 5 10 0 1 0 0 1
+device=CONNECTOR
+T 53800 49900 5 10 0 1 0 0 1
+vendor=digikey
+T 53800 49900 5 10 0 1 0 0 1
+vendor_part_number=455-1749-1-ND
+}
+T 56800 41800 9 30 1 0 0 0 1
+LipoCharger
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T 60400 40400 9 10 1 0 0 0 1
+0.1
+T 58000 40400 9 10 1 0 0 0 1
+1
+T 58600 40400 9 10 1 0 0 0 1
+1
+T 55700 40400 9 10 1 0 0 0 1
+lipocharger.sch
+T 55700 40100 9 10 1 0 0 0 1
+http://altusmetrum.com/
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+C 45900 43700 1 0 0 hole_plated.sym
+{
+T 46000 45400 5 10 0 0 0 0 1
+device=HOLE_PLATED
+T 46000 44200 5 10 1 1 0 0 1
+refdes=H3
+T 45900 43700 5 10 0 0 0 0 1
+footprint=hole-M2.5
+T 45900 43700 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 45900 42900 1 0 0 hole_plated.sym
+{
+T 46000 44600 5 10 0 0 0 0 1
+device=HOLE_PLATED
+T 46000 43400 5 10 1 1 0 0 1
+refdes=H4
+T 45900 42900 5 10 0 0 0 0 1
+footprint=hole-M2.5
+T 45900 42900 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 46400 42800 1 0 0 gnd-1.sym
+N 46500 43100 46500 45500 4
+C 48900 47600 1 0 0 MCP73837.sym
+{
+T 49695 50395 5 10 1 1 0 0 1
+device=MCP73837
+T 49295 50695 5 10 1 1 0 0 1
+refdes=U1
+T 48895 47595 5 10 0 1 0 0 1
+footprint=DFN10_EP
+T 48900 47600 5 10 0 1 0 0 1
+loadstatus=smt
+T 48900 47600 5 10 0 1 0 0 1
+vendor=digikey
+T 48900 47600 5 10 0 1 0 0 1
+vendor_part_number=MCP73837T-FCI/MFCT-ND
+}
+N 48900 50100 44800 50100 4
+C 45200 48900 1 0 0 gnd-1.sym
+C 52900 49200 1 90 0 capacitor-1.sym
+{
+T 52200 49400 5 10 0 0 90 0 1
+device=CAPACITOR
+T 53200 50000 5 10 1 1 180 0 1
+refdes=C2
+T 52000 49400 5 10 0 0 90 0 1
+symversion=0.1
+T 52800 49300 5 10 1 1 0 0 1
+value=4.7uF
+T 52900 49200 5 10 0 0 0 0 1
+vendor_part_number=PCC2475CT-ND
+T 52900 49200 5 10 0 0 0 0 1
+footprint=0402
+T 52900 49200 5 10 0 0 0 0 1
+vendor=digikey
+T 52900 49200 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 52600 48900 1 0 0 gnd-1.sym
+N 51300 50100 54000 50100 4
+N 54000 50100 54000 49900 4
+C 53900 48900 1 0 0 gnd-1.sym
+C 44800 49600 1 0 1 conn-2.sym
+{
+T 44495 50245 5 10 1 1 0 6 1
+refdes=J1
+T 44800 49600 5 10 0 1 0 0 1
+footprint=100mil2pin
+T 44800 49600 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 44700 49400 1 0 0 gnd-1.sym
+C 46700 49000 1 180 1 led2.sym
+{
+T 46650 48200 5 10 1 1 180 6 1
+refdes=D1
+T 46600 48400 5 10 0 0 180 6 1
+device=LED
+T 46650 49000 5 10 0 1 180 6 1
+footprint=0605
+T 46700 49000 5 10 0 0 180 6 1
+vendor=digikey
+T 46700 49000 5 10 0 0 180 6 1
+vendor_part_number=160-1452-1-ND
+T 46700 49000 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 47200 48800 1 0 0 resistor.sym
+{
+T 47500 49200 5 10 0 0 0 0 1
+device=RESISTOR
+T 47300 49100 5 10 1 1 0 0 1
+refdes=R1
+T 47195 48800 5 10 0 1 0 0 1
+footprint=0402
+T 47700 49100 5 10 1 1 0 0 1
+value=1k
+T 47200 48800 5 10 0 1 0 0 1
+vendor=digikey
+T 47200 48800 5 10 0 1 0 0 1
+vendor_part_number=RMCF0402FT1K00CT-ND
+T 47200 48800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 47200 48400 1 0 0 resistor.sym
+{
+T 47500 48800 5 10 0 0 0 0 1
+device=RESISTOR
+T 47300 48200 5 10 1 1 0 0 1
+refdes=R2
+T 47195 48400 5 10 0 1 0 0 1
+footprint=0402
+T 47700 48200 5 10 1 1 0 0 1
+value=1k
+T 47200 48400 5 10 0 1 0 0 1
+vendor=digikey
+T 47200 48400 5 10 0 1 0 0 1
+vendor_part_number=RMCF0402FT1K00CT-ND
+T 47200 48400 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 46400 48500 46400 50100 4
+C 48900 49700 1 180 0 testpoint.sym
+{
+T 48905 49749 5 10 0 1 180 0 1
+device=TestPoint
+T 48905 49749 5 10 0 1 180 0 1
+footprint=testpoint
+T 48300 49600 5 10 1 1 0 0 1
+refdes=TP2
+T 48900 49700 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 51300 49300 1 0 0 testpoint.sym
+{
+T 51295 49251 5 10 0 1 0 0 1
+device=TestPoint
+T 51295 49251 5 10 0 1 0 0 1
+footprint=testpoint
+T 51600 49200 5 10 1 1 0 0 1
+refdes=TP9
+T 51300 49300 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 51300 48500 1 0 0 testpoint.sym
+{
+T 51295 48451 5 10 0 1 0 0 1
+device=TestPoint
+T 51295 48451 5 10 0 1 0 0 1
+footprint=testpoint
+T 51600 48400 5 10 1 1 0 0 1
+refdes=TP7
+T 51300 48500 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 48900 48100 1 180 0 testpoint.sym
+{
+T 48905 48149 5 10 0 1 180 0 1
+device=TestPoint
+T 48905 48149 5 10 0 1 180 0 1
+footprint=testpoint
+T 48300 48000 5 10 1 1 0 0 1
+refdes=TP8
+T 48900 48100 5 10 0 1 0 0 1
+loadstatus=noload
+}
+N 47100 48900 47200 48900 4
+N 47100 48500 47200 48500 4
+N 48100 48900 48900 48900 4
+N 48100 48500 48900 48500 4
+N 46700 48900 46400 48900 4
+N 46400 48500 46700 48500 4
+C 52400 47200 1 90 0 resistor.sym
+{
+T 52000 47500 5 10 0 0 90 0 1
+device=RESISTOR
+T 52800 48000 5 10 1 1 180 0 1
+refdes=R3
+T 52400 47195 5 10 0 1 90 0 1
+footprint=0402
+T 52500 47400 5 10 1 1 0 0 1
+value=3.3k
+T 52400 47200 5 10 0 1 0 0 1
+vendor=digikey
+T 52400 47200 5 10 0 1 0 0 1
+vendor_part_number=P3.3KJCT-ND
+T 52400 47200 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 52200 46900 1 0 0 gnd-1.sym
+N 51300 48100 52300 48100 4
+T 53200 47500 9 10 1 0 0 0 1
+3.3k for approximately 300mA charge current
+C 45900 45300 1 0 0 hole_plated.sym
+{
+T 46000 47000 5 10 0 0 0 0 1
+device=HOLE_PLATED
+T 46000 45800 5 10 1 1 0 0 1
+refdes=H1
+T 45900 45300 5 10 0 0 0 0 1
+footprint=hole-M2.5
+T 45900 45300 5 10 0 1 0 0 1
+loadstatus=noload
+}
+C 45900 44500 1 0 0 hole_plated.sym
+{
+T 46000 46200 5 10 0 0 0 0 1
+device=HOLE_PLATED
+T 46000 45000 5 10 1 1 0 0 1
+refdes=H2
+T 45900 44500 5 10 0 0 0 0 1
+footprint=hole-M2.5
+T 45900 44500 5 10 0 1 0 0 1
+loadstatus=noload
+}

diff --git a/project b/project
new file mode 100644 (file)
index 0000000..6e3a047
--- /dev/null
+++ b/project
@@ -0,0 +1,13 @@
+# List all the schematics to be netlisted and laid out on the pc board
+schematics     lipocharger.sch
+
+# for an output-name of foo, gsch2pcb generates files foo.net, foo.pcb,
+# and foo.new.pcb.  if there is no output name specified, the file names
+# are derived from the first listed schematic...
+output-name    lipocharger
+
+elements-dir ../bdale/pkg
+elements-dir /usr/share/pcb
+
+# stick to newlib elements, don't use the older/odder m4 stuff
+skip-m4