Including interrupt vectors to catch mis-spellings.
Working toward supporting -Wmissing-prototypes
Signed-off-by: Keith Packard <keithp@keithp.com>
void
ao_log_gps_data(uint16_t tick, struct ao_telemetry_location *gps_data);
void
ao_log_gps_data(uint16_t tick, struct ao_telemetry_location *gps_data);
+void
+ao_log_gps_tracking(uint16_t tick, struct ao_telemetry_satellite *gps_tracking_data);
+
#endif /* _AO_LOG_GPS_H_ */
#endif /* _AO_LOG_GPS_H_ */
+#include "ao_send_packet.h"
+void
+ao_debug_out(char c);
+
#define HAS_ARCH_START_SCHEDULER 1
static inline void ao_arch_start_scheduler(void) {
#define HAS_ARCH_START_SCHEDULER 1
static inline void ao_arch_start_scheduler(void) {
#endif /* _AO_ARCH_FUNCS_H_ */
#endif /* _AO_ARCH_FUNCS_H_ */
#define LPC_CT32B_EMR_EMC_SET 2
#define LPC_CT32B_EMR_EMC_TOGGLE 3
#define LPC_CT32B_EMR_EMC_SET 2
#define LPC_CT32B_EMR_EMC_TOGGLE 3
+#define isr_decl(name) \
+ void __attribute__ ((weak)) lpc_ ## name ## _isr(void);
+
+isr_decl(nmi)
+isr_decl(hardfault)
+isr_decl(memmanage)
+isr_decl(busfault)
+isr_decl(usagefault)
+isr_decl(svc)
+isr_decl(debugmon)
+isr_decl(pendsv)
+isr_decl(systick)
+
+isr_decl(pin_int0) /* IRQ0 */
+isr_decl(pin_int1)
+isr_decl(pin_int2)
+isr_decl(pin_int3)
+isr_decl(pin_int4) /* IRQ4 */
+isr_decl(pin_int5)
+isr_decl(pin_int6)
+isr_decl(pin_int7)
+
+isr_decl(gint0) /* IRQ8 */
+isr_decl(gint1)
+isr_decl(ssp1)
+isr_decl(i2c)
+
+isr_decl(ct16b0) /* IRQ16 */
+isr_decl(ct16b1)
+isr_decl(ct32b0)
+isr_decl(ct32b1)
+isr_decl(ssp0) /* IRQ20 */
+isr_decl(usart)
+isr_decl(usb_irq)
+isr_decl(usb_fiq)
+
+isr_decl(adc) /* IRQ24 */
+isr_decl(wwdt)
+isr_decl(bod)
+isr_decl(flash)
+
+isr_decl(usb_wakeup)
+
+
#include <ao.h>
#include <ao_data.h>
#include <ao.h>
#include <ao_data.h>
+#include <ao_adc_single.h>
static uint8_t ao_adc_ready;
static uint8_t ao_adc_ready;
+void
+ao_debug_out(char c);
+
#if HAS_SERIAL_1
extern struct ao_stm_usart ao_stm_usart1;
#endif
#if HAS_SERIAL_1
extern struct ao_stm_usart ao_stm_usart1;
#endif
ao_arch_irqrestore(__mask); \
} while (0)
ao_arch_irqrestore(__mask); \
} while (0)
#endif /* _AO_ARCH_FUNCS_H_ */
#endif /* _AO_ARCH_FUNCS_H_ */
#if BEEPER_TIMER == 2
#define stm_beeper stm_tim2
#if BEEPER_TIMER == 2
#define stm_beeper stm_tim2
extern struct stm_exti stm_exti;
extern struct stm_exti stm_exti;
+#define isr_decl(name) \
+ void __attribute__ ((weak)) stm_ ## name ## _isr(void);
+
+isr_decl(nmi)
+isr_decl(hardfault)
+isr_decl(memmanage)
+isr_decl(busfault)
+isr_decl(usagefault)
+isr_decl(svc)
+isr_decl(debugmon)
+isr_decl(pendsv)
+isr_decl(systick)
+isr_decl(wwdg)
+isr_decl(pvd)
+isr_decl(tamper_stamp)
+isr_decl(rtc_wkup)
+isr_decl(flash)
+isr_decl(rcc)
+isr_decl(exti0)
+isr_decl(exti1)
+isr_decl(exti2)
+isr_decl(exti3)
+isr_decl(exti4)
+isr_decl(dma1_channel1)
+isr_decl(dma1_channel2)
+isr_decl(dma1_channel3)
+isr_decl(dma1_channel4)
+isr_decl(dma1_channel5)
+isr_decl(dma1_channel6)
+isr_decl(dma1_channel7)
+isr_decl(adc1)
+isr_decl(usb_hp)
+isr_decl(usb_lp)
+isr_decl(dac)
+isr_decl(comp)
+isr_decl(exti9_5)
+isr_decl(lcd)
+isr_decl(tim9)
+isr_decl(tim10)
+isr_decl(tim11)
+isr_decl(tim2)
+isr_decl(tim3)
+isr_decl(tim4)
+isr_decl(i2c1_ev)
+isr_decl(i2c1_er)
+isr_decl(i2c2_ev)
+isr_decl(i2c2_er)
+isr_decl(spi1)
+isr_decl(spi2)
+isr_decl(usart1)
+isr_decl(usart2)
+isr_decl(usart3)
+isr_decl(exti15_10)
+isr_decl(rtc_alarm)
+isr_decl(usb_fs_wkup)
+isr_decl(tim6)
+isr_decl(tim7)
+
ao_usb_write2(uint16_t len);
#endif /* AO_USB_DIRECTIO */
ao_usb_write2(uint16_t len);
#endif /* AO_USB_DIRECTIO */
+void start(void);
+
+void
+ao_debug_out(char c);
+
#endif /* _AO_ARCH_FUNCS_H_ */
#endif /* _AO_ARCH_FUNCS_H_ */
extern struct stm_usart stm_usart1;
extern struct stm_usart stm_usart2;
extern struct stm_usart stm_usart1;
extern struct stm_usart stm_usart2;
+#define isr_decl(name) \
+ void __attribute__ ((weak)) stm_ ## name ## _isr(void);
+
+isr_decl(nmi)
+isr_decl(hardfault)
+isr_decl(memmanage)
+isr_decl(busfault)
+isr_decl(usagefault)
+isr_decl(svc)
+isr_decl(debugmon)
+isr_decl(pendsv)
+isr_decl(systick)
+isr_decl(wwdg)
+isr_decl(pvd)
+isr_decl(rtc)
+isr_decl(flash)
+isr_decl(rcc_crs)
+isr_decl(exti0_1)
+isr_decl(exti2_3)
+isr_decl(exti4_15)
+isr_decl(tsc)
+isr_decl(dma_ch1)
+isr_decl(dma_ch2_3)
+isr_decl(dma_ch4_5_6)
+isr_decl(adc_comp)
+isr_decl(tim1_brk_up_trg_com)
+isr_decl(tim1_cc)
+isr_decl(tim2)
+isr_decl(tim3)
+isr_decl(tim6_dac)
+isr_decl(tim7)
+isr_decl(tim14)
+isr_decl(tim15)
+isr_decl(tim16)
+isr_decl(tim17)
+isr_decl(i2c1)
+isr_decl(i2c2)
+isr_decl(spi1)
+isr_decl(spi2)
+isr_decl(usart1)
+isr_decl(usart2)
+isr_decl(usart3_4_5_6_7_8)
+isr_decl(cec_can)
+isr_decl(usb)
+