projects
/
fw
/
altos
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
altoslib: Check for negative tick wrap when importing flight records
[fw/altos]
/
src
/
stmf0
/
ao_adc_fast.c
diff --git
a/src/stmf0/ao_adc_fast.c
b/src/stmf0/ao_adc_fast.c
index 5ce3a396e5a0c538fc8f2f3a67e8b2e6afbcd515..51860ced435d91c083819e356f15e1e6b74741d1 100644
(file)
--- a/
src/stmf0/ao_adc_fast.c
+++ b/
src/stmf0/ao_adc_fast.c
@@
-89,7
+89,7
@@
ao_adc_init(void)
/* Reset ADC */
stm_rcc.apb2rstr |= (1 << STM_RCC_APB2RSTR_ADCRST);
/* Reset ADC */
stm_rcc.apb2rstr |= (1 << STM_RCC_APB2RSTR_ADCRST);
- stm_rcc.apb2rstr &= ~(1 << STM_RCC_APB2RSTR_ADCRST);
+ stm_rcc.apb2rstr &= ~(1
UL
<< STM_RCC_APB2RSTR_ADCRST);
/* Turn on ADC pins */
stm_rcc.ahbenr |= AO_ADC_RCC_AHBENR;
/* Turn on ADC pins */
stm_rcc.ahbenr |= AO_ADC_RCC_AHBENR;
@@
-154,17
+154,17
@@
ao_adc_init(void)
#endif
/* Set the clock */
#endif
/* Set the clock */
- stm_adc.cfgr2 = STM_ADC_CFGR2_CKMODE_
ADCCLK
<< STM_ADC_CFGR2_CKMODE;
+ stm_adc.cfgr2 = STM_ADC_CFGR2_CKMODE_
PCLK_2
<< STM_ADC_CFGR2_CKMODE;
/* Shortest sample time */
stm_adc.smpr = STM_ADC_SMPR_SMP_1_5 << STM_ADC_SMPR_SMP;
/* Turn off enable and start */
/* Shortest sample time */
stm_adc.smpr = STM_ADC_SMPR_SMP_1_5 << STM_ADC_SMPR_SMP;
/* Turn off enable and start */
- stm_adc.cr &= ~((1 << STM_ADC_CR_ADEN) | (1 << STM_ADC_CR_ADSTART));
+ stm_adc.cr &= ~((1
UL
<< STM_ADC_CR_ADEN) | (1 << STM_ADC_CR_ADSTART));
/* Calibrate */
/* Calibrate */
- stm_adc.cr |= (1 << STM_ADC_CR_ADCAL);
- while ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) != 0)
+ stm_adc.cr |= (1
UL
<< STM_ADC_CR_ADCAL);
+ while ((stm_adc.cr & (1
UL
<< STM_ADC_CR_ADCAL)) != 0)
;
/* Enable */
;
/* Enable */
@@
-197,7
+197,7
@@
ao_adc_init(void)
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGCOMPEN);
/* Set ADC to use DMA channel 1 (option 1) */
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGCOMPEN);
/* Set ADC to use DMA channel 1 (option 1) */
- stm_syscfg.cfgr1 &= ~(1 << STM_SYSCFG_CFGR1_ADC_DMA_RMP);
+ stm_syscfg.cfgr1 &= ~(1
UL
<< STM_SYSCFG_CFGR1_ADC_DMA_RMP);
ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
}
ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
}