#ifndef _AO_PINS_H_
#define _AO_PINS_H_
+/* 16MHz crystal */
-/* 16MHz High speed external crystal */
-#define AO_HSE 16000000
+#define AO_HSE 1
+#define AO_HSE_BYPASS 0
-/* PLLVCO = 96MHz (so that USB will work) */
-#define AO_PLLMUL 6
-#define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_6)
+#define AO_SYSCLK 72000000
+#define AO_HCLK 72000000
+#define AO_APB1CLK 36000000
+#define AO_APB2CLK 72000000
+#define AO_ADCCLK 12000000
-/* SYSCLK = 32MHz (no need to go faster than CPU) */
-#define AO_PLLDIV 3
-#define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
+/* PLLMUL is 9, PLLXTPRE (pre divider) is 2, so the
+ * overall PLLCLK is 16 * 9/2 = 72MHz (used as SYSCLK)
+ *
+ * HCLK is SYSCLK / 1 (HPRE_DIV) = 72MHz (72MHz max)
+ * USB is PLLCLK / 1.5 (USBPRE)= 48MHz (must be 48MHz)
+ * APB2 is HCLK / 1 (PPRE2_DIV) = 72MHz (72MHz max)
+ * APB1 is HCLK / 2 (PPRE1_DIV) = 36MHz (36MHz max)
+ * ADC is APB2 / 6 (ADCPRE) = 12MHz (14MHz max)
+ */
-/* HCLK = 32MHz (CPU clock) */
-#define AO_AHB_PRESCALER 1
+#define AO_RCC_CFGR_USBPRE STM_RCC_CFGR_USBPRE_1_5
+#define AO_RCC_CFGR_PLLMUL STM_RCC_CFGR_PLLMUL_9
+#define AO_RCC_CFGR_PLLXTPRE STM_RCC_CFGR_PLLXTPRE_2
+#define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_1
+#define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE1_DIV_2
#define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
-
-/* Run APB1 at 16MHz (HCLK/2) */
-#define AO_APB1_PRESCALER 2
-#define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_2
-
-/* Run APB2 at 16MHz (HCLK/2) */
-#define AO_APB2_PRESCALER 2
-#define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_2
-
-#define HAS_SERIAL_1 0
-#define USE_SERIAL_1_STDIN 0
-#define SERIAL_1_PB6_PB7 0
-#define SERIAL_1_PA9_PA10 0
-
-#define HAS_SERIAL_2 0
-#define USE_SERIAL_2_STDIN 0
-#define SERIAL_2_PA2_PA3 0
-#define SERIAL_2_PD5_PD6 0
-
-#define HAS_SERIAL_3 0
-#define USE_SERIAL_3_STDIN 0
-#define SERIAL_3_PB10_PB11 0
-#define SERIAL_3_PC10_PC11 0
-#define SERIAL_3_PD8_PD9 0
-
-#define ao_gps_getchar ao_serial1_getchar
-#define ao_gps_putchar ao_serial1_putchar
-#define ao_gps_set_speed ao_serial1_set_speed
-#define ao_gps_fifo (ao_stm_usart1.rx_fifo)
+#define AO_RCC_CFGR_ADCPRE STM_RCC_CFGR_ADCPRE_6
#define AO_CONFIG_DEFAULT_FLIGHT_LOG_MAX (1024 * 1024)
#define AO_CONFIG_MAX_SIZE 1024
#define LOG_ERASE_MARK 0x55
#define LOG_MAX_ERASE 128
-#define AO_LOG_FORMAT AO_LOG_FORMAT_EASYMEGA_2
+#define AO_LOG_FORMAT AO_LOG_FORMAT_EASYMEGA_3
+#define AO_LOG_NORMALIZED 1
#define HAS_EEPROM 1
#define USE_INTERNAL_FLASH 0
-#define USE_EEPROM_CONFIG 1
-#define USE_STORAGE_CONFIG 0
+#define USE_EEPROM_CONFIG 0
+#define USE_STORAGE_CONFIG 1
#define HAS_USB 1
#define HAS_BEEP 1
#define BEEPER_TIMER 2
#define HAS_APRS 0
#define HAS_COMPANION 1
+#define HAS_USB_PULLUP 1
+#define AO_USB_PULLUP_PORT (&stm_gpioa)
+#define AO_USB_PULLUP_PIN 8
+
#define HAS_SPI_1 1
#define SPI_1_PA5_PA6_PA7 1 /* Barometer */
#define SPI_1_PB3_PB4_PB5 1 /* Accelerometer */
#define SPI_1_PE13_PE14_PE15 0
-#define SPI_1_OSPEEDR STM_OSPEEDR_10MHz
+#define SPI_1_MODE_OUTPUT STM_GPIO_CR_MODE_OUTPUT_10MHZ
#define HAS_SPI_2 1
#define SPI_2_PB13_PB14_PB15 1 /* Flash, IMU, Companion */
-#define SPI_2_PD1_PD3_PD4 0
-#define SPI_2_OSPEEDR STM_OSPEEDR_10MHz
+#define SPI_2_MODE_OUTPUT STM_GPIO_CR_MODE_OUTPUT_50MHZ
#define HAS_I2C_1 1
#define I2C_1_PB8_PB9 1
#define LOW_LEVEL_DEBUG 0
-#define LED_PORT_ENABLE STM_RCC_AHBENR_GPIOAEN
-#define LED_PORT (&stm_gpioa)
-#define LED_PIN_RED 9
-#define LED_PIN_GREEN 10
-#define AO_LED_RED (1 << LED_PIN_RED)
-#define AO_LED_GREEN (1 << LED_PIN_GREEN)
+#define LED_0_PORT (&stm_gpioa)
+#define LED_0_PIN 9
+#define LED_1_PORT (&stm_gpioa)
+#define LED_1_PIN 10
+#define AO_LED_RED (1 << LED_0_PIN)
+#define AO_LED_GREEN (1 << LED_1_PIN)
#define LEDS_AVAILABLE (AO_LED_RED | AO_LED_GREEN)
#define AO_ADC_TEMP 16
-#define AO_ADC_RCC_AHBENR ((1 << STM_RCC_AHBENR_GPIOAEN) | \
- (1 << STM_RCC_AHBENR_GPIOEEN) | \
- (1 << STM_RCC_AHBENR_GPIOBEN))
-
#define AO_NUM_ADC_PIN (AO_ADC_NUM_SENSE + 2)
#define AO_ADC_PIN0_PORT AO_ADC_SENSE_A_PORT
#define AO_M25_SPI_CS_MASK (1 << AO_M25_SPI_CS_PIN)
#define AO_M25_SPI_BUS AO_SPI_2_PB13_PB14_PB15
-/*
- * bmx160
- */
+/* BMI088 */
-#define HAS_BMX160 1
-#define AO_BMX160_INT_PORT (&stm_gpioc)
-#define AO_BMX160_INT_PIN 15
-#define AO_BMX160_SPI_BUS (AO_SPI_2_PB13_PB14_PB15 | AO_SPI_MODE_0)
-#define AO_BMX160_SPI_CS_PORT (&stm_gpioc)
-#define AO_BMX160_SPI_CS_PIN 13
+#define HAS_BMI088 1
+#define AO_BMI088_SPI_BUS (AO_SPI_2_PB13_PB14_PB15 | AO_SPI_MODE_0)
+#define AO_BMI088_ACC_CS_PORT (&stm_gpioc)
+#define AO_BMI088_ACC_CS_PIN 14
+#define AO_BMI088_GYR_CS_PORT (&stm_gpioc)
+#define AO_BMI088_GYR_CS_PIN 13
#define HAS_IMU 1
-#define ao_data_along(packet) ((packet)->bmx160.acc_x)
-#define ao_data_across(packet) (-(packet)->bmx160.acc_y)
-#define ao_data_through(packet) ((packet)->bmx160.acc_z)
+#define ao_bmi088_along(m) ((m)->acc.x)
+#define ao_bmi088_across(m) (-(m)->acc.y)
+#define ao_bmi088_through(m) ((m)->acc.z)
+
+#define ao_bmi088_roll(m) ((m)->gyr.x)
+#define ao_bmi088_pitch(m) (-(m)->gyr.y)
+#define ao_bmi088_yaw(m) ((m)->gyr.z)
+
+#define ao_data_along(packet) ao_bmi088_along(&(packet)->bmi088)
+#define ao_data_across(packet) ao_bmi088_across(&(packet)->bmi088)
+#define ao_data_through(packet) ao_bmi088_through(&(packet)->bmi088)
+
+#define ao_data_roll(packet) ao_bmi088_roll(&(packet)->bmi088)
+#define ao_data_pitch(packet) ao_bmi088_pitch(&(packet)->bmi088)
+#define ao_data_yaw(packet) ao_bmi088_yaw(&(packet)->bmi088)
+
+/*
+ * MMC5983
+ *
+ * pin 1 NE corner of chip
+ *
+ * +along -Y
+ * +across +X
+ * +through -Z
+ */
+
+#define HAS_MMC5983 1
+#define MMC5983_I2C 1
+#define AO_MMC5983_I2C_INDEX STM_I2C_INDEX(1)
-#define ao_data_roll(packet) ((packet)->bmx160.gyr_x)
-#define ao_data_pitch(packet) (-(packet)->bmx160.gyr_y)
-#define ao_data_yaw(packet) ((packet)->bmx160.gyr_z)
+#define ao_mmc5983_along(m) (-(m)->y)
+#define ao_mmc5983_across(m) ((m)->x)
+#define ao_mmc5983_through(m) (-(m)->z)
-#define ao_data_mag_along(packet) ((packet)->bmx160.mag_x)
-#define ao_data_mag_across(packet) (-(packet)->bmx160.mag_y)
-#define ao_data_mag_through(packet) ((packet)->bmx160.mag_z)
+#define ao_data_mag_along(packet) ao_mmc5983_along(&(packet)->mmc5983)
+#define ao_data_mag_across(packet) ao_mmc5983_across(&(packet)->mmc5983)
+#define ao_data_mag_through(packet) ao_mmc5983_through(&(packet)->mmc5983)
/* ADXL375 */
#ifndef _AO_PINS_H_
#define _AO_PINS_H_
-/* External crystal at 16MHz */
-#define AO_HSE 16000000
+/* 16MHz crystal */
+
+#define AO_HSE 1
+#define AO_HSE_BYPASS 0
+
+#define AO_SYSCLK 72000000
+#define AO_HCLK 72000000
+#define AO_APB1CLK 36000000
+#define AO_APB2CLK 72000000
+#define AO_ADCCLK 12000000
+
+/* PLLMUL is 9, PLLXTPRE (pre divider) is 2, so the
+ * overall PLLCLK is 16 * 9/2 = 72MHz (used as SYSCLK)
+ *
+ * HCLK is SYSCLK / 1 (HPRE_DIV) = 72MHz (72MHz max)
+ * USB is PLLCLK / 1.5 (USBPRE)= 48MHz (must be 48MHz)
+ * APB2 is HCLK / 1 (PPRE2_DIV) = 72MHz (72MHz max)
+ * APB1 is HCLK / 2 (PPRE1_DIV) = 36MHz (36MHz max)
+ * ADC is APB2 / 6 (ADCPRE) = 12MHz (14MHz max)
+ */
+
+#define AO_RCC_CFGR_USBPRE STM_RCC_CFGR_USBPRE_1_5
+#define AO_RCC_CFGR_PLLMUL STM_RCC_CFGR_PLLMUL_9
+#define AO_RCC_CFGR_PLLXTPRE STM_RCC_CFGR_PLLXTPRE_2
+#define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_1
+#define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE1_DIV_2
+#define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
+#define AO_RCC_CFGR_ADCPRE STM_RCC_CFGR_ADCPRE_6
#include <ao_flash_stm_pins.h>
#define AO_BOOT_APPLICATION_VALUE 1
#define AO_BOOT_APPLICATION_MODE AO_EXTI_MODE_PULL_UP
+#define HAS_USB_PULLUP 1
+#define AO_USB_PULLUP_PORT (&stm_gpioa)
+#define AO_USB_PULLUP_PIN 8
+
#endif /* _AO_PINS_H_ */
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