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   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  17  */
  18
  19 #include <ao.h>
  20 #include "stm32f1.h"
  21 #include <string.h>
  22 #include <ao_boot.h>
  23
  24 extern void main(void);
  25
  26 /* Interrupt functions */
  27
  28 void stm_halt_isr(void)
  29 {
  30 //      ao_panic(AO_PANIC_CRASH);
  31 }
  32
  33 void stm_ignore_isr(void)
  34 {
  35 }
  36
  37 #define STRINGIFY(x) #x
  38
  39 #define isr(name) \
  40         void __attribute__ ((weak)) stm_ ## name ## _isr(void); \
  41         _Pragma(STRINGIFY(weak stm_ ## name ## _isr = stm_ignore_isr))
  42
  43 #define isr_halt(name) \
  44         void __attribute__ ((weak)) stm_ ## name ## _isr(void); \
  45         _Pragma(STRINGIFY(weak stm_ ## name ## _isr = stm_halt_isr))
  46
  47 isr(nmi);
  48 isr_halt(hardfault);
  49 isr_halt(memmanage);
  50 isr_halt(busfault);
  51 isr_halt(usagefault);
  52 isr(svc);
  53 isr(debugmon);
  54 isr(pendsv);
  55 isr(systick);
  56 isr(wwdg);
  57 isr(pvd);
  58 isr(tamper_stamp);
  59 isr(rtc_wkup);
  60 isr(flash);
  61 isr(rcc);
  62 isr(exti0);
  63 isr(exti1);
  64 isr(exti2);
  65 isr(exti3);
  66 isr(exti4);
  67 isr(dma1_channel1);
  68 isr(dma1_channel2);
  69 isr(dma1_channel3);
  70 isr(dma1_channel4);
  71 isr(dma1_channel5);
  72 isr(dma1_channel6);
  73 isr(dma1_channel7);
  74 isr(adc1_2);
  75 isr(usb_hp);
  76 isr(usb_lp);
  77 isr(can_rx1);
  78 isr(can_sce);
  79 isr(exti9_5);
  80 isr(tim1_brk);
  81 isr(tim1_up);
  82 isr(tim1_trg_com);
  83 isr(tim1_cc);
  84 isr(tim2);
  85 isr(tim3);
  86 isr(tim4);
  87 isr(i2c1_ev);
  88 isr(i2c1_er);
  89 isr(i2c2_ev);
  90 isr(i2c2_er);
  91 isr(spi1);
  92 isr(spi2);
  93 isr(usart1);
  94 isr(usart2);
  95 isr(usart3);
  96 isr(exti15_10);
  97 isr(rtc_alarm);
  98 isr(usb_wakeup);
  99 isr(tim8_brk);
 100 isr(tim8_up);
 101 isr(tim8_trg_com);
 102 isr(tim8_cc);
 103 isr(adc3);
 104 isr(fsmc);
 105 isr(sdio);
 106 isr(tim5);
 107 isr(spi3);
 108 isr(uart4);
 109 isr(uart5);
 110 isr(tim6);
 111 isr(tim7);
 112 isr(dma2_channel1);
 113 isr(dma2_channel2);
 114 isr(dma2_channel3);
 115 isr(dma2_channel4_5);
 116
 117 #define i(addr,name)    [(addr)/4] = stm_ ## name ## _isr
 118
 119 extern char __stack[];
 120 void _start(void) __attribute__((__noreturn__));
 121 void main(void) __attribute__((__noreturn__));
 122 void ao_setup(void) __attribute__((constructor));
 123
 124 /* This must be exactly 304 bytes long so that the configuration data
 125  * gets loaded at the right place
 126  */
 127
 128 __attribute__ ((section(".init")))
 129 const void * const __interrupt_vector[76] = {
 130         [0] = &__stack,
 131         [1] = _start,
 132         i(0x08, nmi),
 133         i(0x0c, hardfault),
 134         i(0x10, memmanage),
 135         i(0x14, busfault),
 136         i(0x18, usagefault),
 137         i(0x2c, svc),
 138         i(0x30, debugmon),
 139         i(0x38, pendsv),
 140         i(0x3c, systick),
 141         i(0x40, wwdg),
 142         i(0x44, pvd),
 143         i(0x48, tamper_stamp),
 144         i(0x4c, rtc_wkup),
 145         i(0x50, flash),
 146         i(0x54, rcc),
 147         i(0x58, exti0),
 148         i(0x5c, exti1),
 149         i(0x60, exti2),
 150         i(0x64, exti3),
 151         i(0x68, exti4),
 152         i(0x6c, dma1_channel1),
 153         i(0x70, dma1_channel2),
 154         i(0x74, dma1_channel3),
 155         i(0x78, dma1_channel4),
 156         i(0x7c, dma1_channel5),
 157         i(0x80, dma1_channel6),
 158         i(0x84, dma1_channel7),
 159         i(0x88, adc1_2),
 160         i(0x8c, usb_hp),
 161         i(0x90, usb_lp),
 162         i(0x94, can_rx1),
 163         i(0x98, can_sce),
 164         i(0x9c, exti9_5),
 165         i(0xa0, tim1_brk),
 166         i(0xa4, tim1_up),
 167         i(0xa8, tim1_trg_com),
 168         i(0xac, tim1_cc),
 169         i(0xb0, tim2),
 170         i(0xb4, tim3),
 171         i(0xb8, tim4),
 172         i(0xbc, i2c1_ev),
 173         i(0xc0, i2c1_er),
 174         i(0xc4, i2c2_ev),
 175         i(0xc8, i2c2_er),
 176         i(0xcc, spi1),
 177         i(0xd0, spi2),
 178         i(0xd4, usart1),
 179         i(0xd8, usart2),
 180         i(0xdc, usart3),
 181         i(0xe0, exti15_10),
 182         i(0xe4, rtc_alarm),
 183         i(0xe8, usb_wakeup),
 184         i(0xec, tim8_brk),
 185         i(0xf0, tim8_up),
 186         i(0xf4, tim8_trg_com),
 187         i(0xf8, tim8_cc),
 188         i(0xfc, adc3),
 189         i(0x100, fsmc),
 190         i(0x104, sdio),
 191         i(0x108, tim5),
 192         i(0x10c, spi3),
 193         i(0x110, uart4),
 194         i(0x114, uart5),
 195         i(0x118, tim6),
 196         i(0x11c, tim7),
 197         i(0x120, dma2_channel1),
 198         i(0x124, dma2_channel2),
 199         i(0x128, dma2_channel3),
 200         i(0x12c, dma2_channel4_5),
 201 };
 202
 203 void __attribute__((constructor)) ao_setup(void) {
 204 #ifdef AO_BOOT_CHAIN
 205         if (ao_boot_check_chain()) {
 206 #ifdef AO_BOOT_PIN
 207                 if (ao_boot_check_pin())
 208 #endif
 209                 {
 210                         ao_boot_chain(AO_BOOT_APPLICATION_BASE);
 211                 }
 212         }
 213 #endif
 214         /* Set interrupt vector table offset */
 215         stm_nvic.vto = (uint32_t) &__interrupt_vector;
 216 }