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   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  17  */
  18
  19 #include "ao.h"
  20
  21 #define NUM_DMA 7
  22
  23 struct ao_dma_config {
  24         void            (*isr)(int index);
  25 };
  26
  27 uint8_t ao_dma_done[NUM_DMA];
  28
  29 static struct ao_dma_config ao_dma_config[NUM_DMA];
  30 static uint8_t ao_dma_allocated[NUM_DMA];
  31 static uint8_t ao_dma_mutex[NUM_DMA];
  32
  33 static void
  34 ao_dma_isr(uint8_t index) {
  35         /* Get channel interrupt bits */
  36         uint32_t        isr = stm_dma.isr & (STM_DMA_ISR_MASK <<
  37                                              STM_DMA_ISR(index));
  38
  39         /* Ack them */
  40         stm_dma.ifcr = isr;
  41         if (ao_dma_config[index].isr)
  42                 (*ao_dma_config[index].isr)(index);
  43         else {
  44                 ao_dma_done[index] = 1;
  45                 ao_wakeup(&ao_dma_done[index]);
  46         }
  47 }
  48
  49 void stm_dma1_channel1_isr(void) { ao_dma_isr(STM_DMA_INDEX(1)); }
  50 void stm_dma1_channel2_isr(void) { ao_dma_isr(STM_DMA_INDEX(2)); }
  51 #ifdef STM_DMA1_3_STOLEN
  52 #define LEAVE_DMA_ON
  53 #else
  54 void stm_dma1_channel3_isr(void) { ao_dma_isr(STM_DMA_INDEX(3)); }
  55 #endif
  56 void stm_dma1_channel4_isr(void) { ao_dma_isr(STM_DMA_INDEX(4)); }
  57 #ifdef STM_DMA1_5_STOLEN
  58 #define LEAVE_DMA_ON
  59 #else
  60 void stm_dma1_channel5_isr(void) { ao_dma_isr(STM_DMA_INDEX(5)); }
  61 #endif
  62 void stm_dma1_channel6_isr(void) { ao_dma_isr(STM_DMA_INDEX(6)); }
  63 void stm_dma1_channel7_isr(void) { ao_dma_isr(STM_DMA_INDEX(7)); }
  64
  65 #ifndef LEAVE_DMA_ON
  66 static uint8_t ao_dma_active;
  67 #endif
  68
  69 void
  70 ao_dma_mutex_get(uint8_t index)
  71 {
  72         if (ao_dma_allocated[index]) {
  73                 if (ao_dma_mutex[index])
  74                         ao_panic(AO_PANIC_DMA);
  75                 ao_dma_mutex[index] = 0xff;
  76         } else
  77                 ao_mutex_get(&ao_dma_mutex[index]);
  78 }
  79
  80 void
  81 ao_dma_mutex_put(uint8_t index)
  82 {
  83         if (ao_dma_allocated[index])
  84                 ao_dma_mutex[index] = 0;
  85         else
  86                 ao_mutex_put(&ao_dma_mutex[index]);
  87 }
  88
  89
  90 void
  91 ao_dma_set_transfer(uint8_t             index,
  92                     volatile void       *peripheral,
  93                     void                *memory,
  94                     uint16_t            count,
  95                     uint32_t            ccr)
  96 {
  97         if (ao_dma_allocated[index]) {
  98                 if (ao_dma_mutex[index])
  99                         ao_panic(AO_PANIC_DMA);
 100                 ao_dma_mutex[index] = 0xff;
 101         } else
 102                 ao_mutex_get(&ao_dma_mutex[index]);
 103 #ifndef LEAVE_DMA_ON
 104         ao_arch_critical(
 105                 if (ao_dma_active++ == 0)
 106                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
 107                 );
 108 #endif
 109         stm_dma.channel[index].ccr = ccr | (1 << STM_DMA_CCR_TCIE);
 110         stm_dma.channel[index].cndtr = count;
 111         stm_dma.channel[index].cpar = peripheral;
 112         stm_dma.channel[index].cmar = memory;
 113         ao_dma_config[index].isr = NULL;
 114 }
 115
 116 void
 117 ao_dma_set_isr(uint8_t index, void (*isr)(int))
 118 {
 119         ao_dma_config[index].isr = isr;
 120 }
 121
 122 void
 123 ao_dma_start(uint8_t index)
 124 {
 125         ao_dma_done[index] = 0;
 126         stm_dma.channel[index].ccr |= (1UL << STM_DMA_CCR_EN);
 127 }
 128
 129 void
 130 ao_dma_done_transfer(uint8_t index)
 131 {
 132         stm_dma.channel[index].ccr &= ~(1UL << STM_DMA_CCR_EN);
 133 #ifndef LEAVE_DMA_ON
 134         ao_arch_critical(
 135                 if (--ao_dma_active == 0)
 136                         stm_rcc.ahbenr &= ~(1UL << STM_RCC_AHBENR_DMA1EN);
 137                 );
 138 #endif
 139         if (ao_dma_allocated[index])
 140                 ao_dma_mutex[index] = 0;
 141         else
 142                 ao_mutex_put(&ao_dma_mutex[index]);
 143 }
 144
 145 void
 146 ao_dma_alloc(uint8_t index)
 147 {
 148         if (ao_dma_allocated[index])
 149                 ao_panic(AO_PANIC_DMA);
 150         ao_dma_allocated[index] = 1;
 151 }
 152
 153 #if DEBUG
 154 void
 155 ao_dma_dump_cmd(void)
 156 {
 157         int i;
 158
 159 #ifndef LEAVE_DMA_ON
 160         ao_arch_critical(
 161                 if (ao_dma_active++ == 0)
 162                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
 163                 );
 164 #endif
 165         printf ("isr %08x ifcr%08x\n", stm_dma.isr, stm_dma.ifcr);
 166         for (i = 0; i < NUM_DMA; i++)
 167                 printf("%d: done %d allocated %d mutex %2d ccr %04x cndtr %04x cpar %08x cmar %08x isr %08x\n",
 168                        i,
 169                        ao_dma_done[i],
 170                        ao_dma_allocated[i],
 171                        ao_dma_mutex[i],
 172                        stm_dma.channel[i].ccr,
 173                        stm_dma.channel[i].cndtr,
 174                        stm_dma.channel[i].cpar,
 175                        stm_dma.channel[i].cmar,
 176                        ao_dma_config[i].isr);
 177 #ifndef LEAVE_DMA_ON
 178         ao_arch_critical(
 179                 if (--ao_dma_active == 0)
 180                         stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
 181                 );
 182 #endif
 183 }
 184
 185 static const struct ao_cmds ao_dma_cmds[] = {
 186         { ao_dma_dump_cmd,      "D\0Dump DMA status" },
 187         { 0, NULL }
 188 };
 189 #endif
 190
 191 void
 192 ao_dma_init(void)
 193 {
 194         int     index;
 195
 196 #ifdef LEAVE_DMA_ON
 197         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
 198 #endif
 199         for (index = 0; index < STM_NUM_DMA; index++) {
 200 #if STM_DMA1_5_STOLEN
 201                 if (index == STM_DMA_INDEX(5)) {
 202                         ao_dma_allocated[index] = 1;
 203                         ao_dma_mutex[index] = 0xff;
 204                         continue;
 205                 }
 206 #endif
 207 #if STM_DMA1_3_STOLEN
 208                 if (index == STM_DMA_INDEX(3)) {
 209                         ao_dma_allocated[index] = 1;
 210                         ao_dma_mutex[index] = 0xff;
 211                         continue;
 212                 }
 213 #endif
 214                 stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
 215                 stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index,
 216                                       AO_STM_NVIC_MED_PRIORITY);
 217                 ao_dma_allocated[index] = 0;
 218                 ao_dma_mutex[index] = 0;
 219         }
 220 #if DEBUG
 221         ao_cmd_register(&ao_dma_cmds[0]);
 222 #endif
 223 }