git.gag.com Git - fw/altos/blob - src/stm/ao_serial_stm.c

   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include <ao.h>
  19
  20 void
  21 ao_debug_out(char c)
  22 {
  23         if (c == '\n')
  24                 ao_debug_out('\r');
  25         while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
  26         stm_usart1.dr = c;
  27 }
  28
  29 static void
  30 _ao_usart_tx_start(struct ao_stm_usart *usart)
  31 {
  32         if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
  33         {
  34                 usart->tx_started = 1;
  35                 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
  36         }
  37 }
  38
  39 static void
  40 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
  41 {
  42         uint32_t        sr;
  43
  44         sr = usart->reg->sr;
  45         usart->reg->sr = 0;
  46
  47         if (sr & (1 << STM_USART_SR_RXNE)) {
  48                 char c = usart->reg->dr;
  49                 if (!ao_fifo_full(usart->rx_fifo))
  50                         ao_fifo_insert(usart->rx_fifo, c);
  51                 ao_wakeup(&usart->rx_fifo);
  52                 if (stdin)
  53                         ao_wakeup(&ao_stdin_ready);
  54         }
  55         if (sr & (1 << STM_USART_SR_TC)) {
  56                 usart->tx_started = 0;
  57                 _ao_usart_tx_start(usart);
  58                 ao_wakeup(&usart->tx_fifo);
  59         }
  60 }
  61
  62 int
  63 _ao_usart_pollchar(struct ao_stm_usart *usart)
  64 {
  65         int     c;
  66
  67         if (ao_fifo_empty(usart->rx_fifo))
  68                 c = AO_READ_AGAIN;
  69         else {
  70                 uint8_t u;
  71                 ao_fifo_remove(usart->rx_fifo,u);
  72                 c = u;
  73                 ao_usb_putchar(c); ao_usb_flush();
  74         }
  75         return c;
  76 }
  77
  78 char
  79 ao_usart_getchar(struct ao_stm_usart *usart)
  80 {
  81         int c;
  82         ao_arch_block_interrupts();
  83         while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
  84                 ao_sleep(&usart->rx_fifo);
  85         ao_arch_release_interrupts();
  86         ao_usb_putchar(c); ao_usb_flush();
  87         return (char) c;
  88 }
  89
  90 static inline uint8_t
  91 _ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
  92 {
  93         return ao_sleep_for(&usart->rx_fifo, timeout);
  94 }
  95
  96 void
  97 ao_usart_putchar(struct ao_stm_usart *usart, char c)
  98 {
  99         ao_usb_putchar(c); ao_usb_flush();
 100         ao_arch_block_interrupts();
 101         while (ao_fifo_full(usart->tx_fifo))
 102                 ao_sleep(&usart->tx_fifo);
 103         ao_fifo_insert(usart->tx_fifo, c);
 104         _ao_usart_tx_start(usart);
 105         ao_arch_release_interrupts();
 106 }
 107
 108 void
 109 ao_usart_drain(struct ao_stm_usart *usart)
 110 {
 111         ao_arch_block_interrupts();
 112         while (!ao_fifo_empty(usart->tx_fifo))
 113                 ao_sleep(&usart->tx_fifo);
 114         ao_arch_release_interrupts();
 115 }
 116
 117 static const struct {
 118         uint32_t brr;
 119 } ao_usart_speeds[] = {
 120         [AO_SERIAL_SPEED_4800] = {
 121                 AO_PCLK1 / 4800
 122         },
 123         [AO_SERIAL_SPEED_9600] = {
 124                 AO_PCLK1 / 9600
 125         },
 126         [AO_SERIAL_SPEED_19200] = {
 127                 AO_PCLK1 / 19200
 128         },
 129         [AO_SERIAL_SPEED_57600] = {
 130                 AO_PCLK1 / 57600
 131         },
 132         [AO_SERIAL_SPEED_115200] = {
 133                 AO_PCLK1 / 115200
 134         },
 135 };
 136
 137 void
 138 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
 139 {
 140         if (speed > AO_SERIAL_SPEED_115200)
 141                 return;
 142         usart->reg->brr = ao_usart_speeds[speed].brr;
 143 }
 144
 145 void
 146 ao_usart_init(struct ao_stm_usart *usart)
 147 {
 148         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
 149                           (1 << STM_USART_CR1_UE) |
 150                           (0 << STM_USART_CR1_M) |
 151                           (0 << STM_USART_CR1_WAKE) |
 152                           (0 << STM_USART_CR1_PCE) |
 153                           (0 << STM_USART_CR1_PS) |
 154                           (0 << STM_USART_CR1_PEIE) |
 155                           (0 << STM_USART_CR1_TXEIE) |
 156                           (1 << STM_USART_CR1_TCIE) |
 157                           (1 << STM_USART_CR1_RXNEIE) |
 158                           (0 << STM_USART_CR1_IDLEIE) |
 159                           (1 << STM_USART_CR1_TE) |
 160                           (1 << STM_USART_CR1_RE) |
 161                           (0 << STM_USART_CR1_RWU) |
 162                           (0 << STM_USART_CR1_SBK));
 163
 164         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
 165                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
 166                           (0 << STM_USART_CR2_CLKEN) |
 167                           (0 << STM_USART_CR2_CPOL) |
 168                           (0 << STM_USART_CR2_CPHA) |
 169                           (0 << STM_USART_CR2_LBCL) |
 170                           (0 << STM_USART_CR2_LBDIE) |
 171                           (0 << STM_USART_CR2_LBDL) |
 172                           (0 << STM_USART_CR2_ADD));
 173
 174         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
 175                           (0 << STM_USART_CR3_CTSIE) |
 176                           (0 << STM_USART_CR3_CTSE) |
 177                           (0 << STM_USART_CR3_RTSE) |
 178                           (0 << STM_USART_CR3_DMAT) |
 179                           (0 << STM_USART_CR3_DMAR) |
 180                           (0 << STM_USART_CR3_SCEN) |
 181                           (0 << STM_USART_CR3_NACK) |
 182                           (0 << STM_USART_CR3_HDSEL) |
 183                           (0 << STM_USART_CR3_IRLP) |
 184                           (0 << STM_USART_CR3_IREN) |
 185                           (0 << STM_USART_CR3_EIE));
 186
 187         /* Pick a 9600 baud rate */
 188         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
 189 }
 190
 191 void
 192 ao_usart_set_flow(struct ao_stm_usart *usart)
 193 {
 194         usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
 195                             (1 << STM_USART_CR3_RTSE));
 196 }
 197
 198 #if HAS_SERIAL_1
 199
 200 struct ao_stm_usart ao_stm_usart1;
 201
 202 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
 203
 204 char
 205 ao_serial1_getchar(void)
 206 {
 207         return ao_usart_getchar(&ao_stm_usart1);
 208 }
 209
 210 void
 211 ao_serial1_putchar(char c)
 212 {
 213         ao_usart_putchar(&ao_stm_usart1, c);
 214 }
 215
 216 int
 217 _ao_serial1_pollchar(void)
 218 {
 219         return _ao_usart_pollchar(&ao_stm_usart1);
 220 }
 221
 222 uint8_t
 223 _ao_serial1_sleep_for(uint16_t timeout)
 224 {
 225         return _ao_usart_sleep_for(&ao_stm_usart1, timeout);
 226 }
 227
 228 void
 229 ao_serial1_drain(void)
 230 {
 231         ao_usart_drain(&ao_stm_usart1);
 232 }
 233
 234 void
 235 ao_serial1_set_speed(uint8_t speed)
 236 {
 237         ao_usart_set_speed(&ao_stm_usart1, speed);
 238 }
 239 #endif  /* HAS_SERIAL_1 */
 240
 241 #if HAS_SERIAL_2
 242
 243 struct ao_stm_usart ao_stm_usart2;
 244
 245 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
 246
 247 char
 248 ao_serial2_getchar(void)
 249 {
 250         return ao_usart_getchar(&ao_stm_usart2);
 251 }
 252
 253 void
 254 ao_serial2_putchar(char c)
 255 {
 256         ao_usart_putchar(&ao_stm_usart2, c);
 257 }
 258
 259 int
 260 _ao_serial2_pollchar(void)
 261 {
 262         return _ao_usart_pollchar(&ao_stm_usart2);
 263 }
 264
 265 uint8_t
 266 _ao_serial2_sleep_for(uint16_t timeout)
 267 {
 268         return _ao_usart_sleep_for(&ao_stm_usart2, timeout);
 269 }
 270
 271 void
 272 ao_serial2_drain(void)
 273 {
 274         ao_usart_drain(&ao_stm_usart2);
 275 }
 276
 277 void
 278 ao_serial2_set_speed(uint8_t speed)
 279 {
 280         ao_usart_set_speed(&ao_stm_usart2, speed);
 281 }
 282 #endif  /* HAS_SERIAL_2 */
 283
 284 #if HAS_SERIAL_3
 285
 286 struct ao_stm_usart ao_stm_usart3;
 287
 288 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
 289
 290 char
 291 ao_serial3_getchar(void)
 292 {
 293         return ao_usart_getchar(&ao_stm_usart3);
 294 }
 295
 296 void
 297 ao_serial3_putchar(char c)
 298 {
 299         ao_usart_putchar(&ao_stm_usart3, c);
 300 }
 301
 302 int
 303 _ao_serial3_pollchar(void)
 304 {
 305         return _ao_usart_pollchar(&ao_stm_usart3);
 306 }
 307
 308 uint8_t
 309 _ao_serial3_sleep_for(uint16_t timeout)
 310 {
 311         return _ao_usart_sleep_for(&ao_stm_usart3, timeout);
 312 }
 313
 314 void
 315 ao_serial3_set_speed(uint8_t speed)
 316 {
 317         ao_usart_set_speed(&ao_stm_usart3, speed);
 318 }
 319 #endif  /* HAS_SERIAL_3 */
 320
 321 void
 322 ao_serial_init(void)
 323 {
 324 #if HAS_SERIAL_1
 325         /*
 326          *      TX      RX
 327          *      PA9     PA10
 328          *      PB6     PB7     *
 329          */
 330
 331 #if SERIAL_1_PA9_PA10
 332         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 333
 334         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
 335         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
 336 #else
 337 #if SERIAL_1_PB6_PB7
 338         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 339
 340         stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
 341         stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
 342 #else
 343 #error "No SERIAL_1 port configuration specified"
 344 #endif
 345 #endif
 346         /* Enable USART */
 347         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
 348
 349         ao_stm_usart1.reg = &stm_usart1;
 350         ao_usart_init(&ao_stm_usart1);
 351
 352         stm_nvic_set_enable(STM_ISR_USART1_POS);
 353         stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
 354 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
 355         ao_add_stdio(_ao_serial1_pollchar,
 356                      ao_serial1_putchar,
 357                      NULL);
 358 #endif
 359 #endif
 360
 361 #if HAS_SERIAL_2
 362         /*
 363          *      TX      RX
 364          *      PA2     PA3
 365          *      PD5     PD6
 366          */
 367
 368 #if SERIAL_2_PA2_PA3
 369         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 370
 371         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
 372         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
 373 #if USE_SERIAL_2_FLOW
 374         stm_afr_set(&stm_gpioa, 0, STM_AFR_AF7);
 375         stm_afr_set(&stm_gpioa, 1, STM_AFR_AF7);
 376 #endif
 377 #else
 378 #if SERIAL_2_PD5_PD6
 379         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
 380
 381         stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
 382         stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
 383 #if USE_SERIAL_2_FLOW
 384 #error "Don't know how to set flowcontrol for serial 2 on PD"
 385 #endif
 386 #else
 387 #error "No SERIAL_2 port configuration specified"
 388 #endif
 389 #endif
 390         /* Enable USART */
 391         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
 392
 393         ao_stm_usart2.reg = &stm_usart2;
 394         ao_usart_init(&ao_stm_usart2);
 395 #if USE_SERIAL_2_FLOW
 396         ao_usart_set_flow(&ao_stm_usart2);
 397 #endif
 398
 399         stm_nvic_set_enable(STM_ISR_USART2_POS);
 400         stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
 401 #if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
 402         ao_add_stdio(_ao_serial2_pollchar,
 403                      ao_serial2_putchar,
 404                      NULL);
 405 #endif
 406 #endif
 407
 408 #if HAS_SERIAL_3
 409         /*
 410          *      TX      RX
 411          *      PB10    PB11
 412          *      PC10    PC11
 413          *      PD8     PD9
 414          */
 415 #if SERIAL_3_PB10_PB11
 416         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 417
 418         stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
 419         stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
 420 #else
 421 #if SERIAL_3_PC10_PC11
 422         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
 423
 424         stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
 425         stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
 426 #else
 427 #if SERIAL_3_PD8_PD9
 428         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
 429
 430         stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
 431         stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
 432 #else
 433 #error "No SERIAL_3 port configuration specified"
 434 #endif
 435 #endif
 436 #endif
 437         /* Enable USART */
 438         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
 439
 440         ao_stm_usart3.reg = &stm_usart3;
 441         ao_usart_init(&ao_stm_usart3);
 442
 443         stm_nvic_set_enable(STM_ISR_USART3_POS);
 444         stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
 445 #if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
 446         ao_add_stdio(_ao_serial3_pollchar,
 447                      ao_serial3_putchar,
 448                      NULL);
 449 #endif
 450 #endif
 451 }