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   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  17  */
  18
  19 #include "ao.h"
  20
  21 #define NUM_DMA 7
  22
  23 struct ao_dma_config {
  24         void            (*isr)(int index);
  25 };
  26
  27 uint8_t ao_dma_done[NUM_DMA];
  28
  29 static struct ao_dma_config ao_dma_config[NUM_DMA];
  30 static uint8_t ao_dma_allocated[NUM_DMA];
  31 static uint8_t ao_dma_mutex[NUM_DMA];
  32
  33 static void
  34 ao_dma_isr(uint8_t index) {
  35         /* Get channel interrupt bits */
  36         uint32_t        isr = stm_dma.isr & (STM_DMA_ISR_MASK <<
  37                                              STM_DMA_ISR(index));
  38
  39         /* Ack them */
  40         stm_dma.ifcr = isr;
  41         if (ao_dma_config[index].isr)
  42                 (*ao_dma_config[index].isr)(index);
  43         else {
  44                 ao_dma_done[index] = 1;
  45                 ao_wakeup(&ao_dma_done[index]);
  46         }
  47 }
  48
  49 void stm_dma1_channel1_isr(void) { ao_dma_isr(STM_DMA_INDEX(1)); }
  50 void stm_dma1_channel2_isr(void) { ao_dma_isr(STM_DMA_INDEX(2)); }
  51 void stm_dma1_channel3_isr(void) { ao_dma_isr(STM_DMA_INDEX(3)); }
  52 void stm_dma1_channel4_isr(void) { ao_dma_isr(STM_DMA_INDEX(4)); }
  53 #ifdef STM_DMA1_5_STOLEN
  54 #define LEAVE_DMA_ON
  55 #else
  56 void stm_dma1_channel5_isr(void) { ao_dma_isr(STM_DMA_INDEX(5)); }
  57 #endif
  58 void stm_dma1_channel6_isr(void) { ao_dma_isr(STM_DMA_INDEX(6)); }
  59 void stm_dma1_channel7_isr(void) { ao_dma_isr(STM_DMA_INDEX(7)); }
  60
  61 #ifndef LEAVE_DMA_ON
  62 static uint8_t ao_dma_active;
  63 #endif
  64
  65 void
  66 ao_dma_set_transfer(uint8_t             index,
  67                     volatile void       *peripheral,
  68                     void                *memory,
  69                     uint16_t            count,
  70                     uint32_t            ccr)
  71 {
  72         if (ao_dma_allocated[index]) {
  73                 if (ao_dma_mutex[index])
  74                         ao_panic(AO_PANIC_DMA);
  75                 ao_dma_mutex[index] = 0xff;
  76         } else
  77                 ao_mutex_get(&ao_dma_mutex[index]);
  78 #ifndef LEAVE_DMA_ON
  79         ao_arch_critical(
  80                 if (ao_dma_active++ == 0)
  81                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
  82                 );
  83 #endif
  84         stm_dma.channel[index].ccr = ccr | (1 << STM_DMA_CCR_TCIE);
  85         stm_dma.channel[index].cndtr = count;
  86         stm_dma.channel[index].cpar = peripheral;
  87         stm_dma.channel[index].cmar = memory;
  88         ao_dma_config[index].isr = NULL;
  89 }
  90
  91 void
  92 ao_dma_set_isr(uint8_t index, void (*isr)(int))
  93 {
  94         ao_dma_config[index].isr = isr;
  95 }
  96
  97 void
  98 ao_dma_start(uint8_t index)
  99 {
 100         ao_dma_done[index] = 0;
 101         stm_dma.channel[index].ccr |= (1 << STM_DMA_CCR_EN);
 102 }
 103
 104 void
 105 ao_dma_done_transfer(uint8_t index)
 106 {
 107         stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
 108 #ifndef LEAVE_DMA_ON
 109         ao_arch_critical(
 110                 if (--ao_dma_active == 0)
 111                         stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
 112                 );
 113 #endif
 114         if (ao_dma_allocated[index])
 115                 ao_dma_mutex[index] = 0;
 116         else
 117                 ao_mutex_put(&ao_dma_mutex[index]);
 118 }
 119
 120 void
 121 ao_dma_alloc(uint8_t index)
 122 {
 123         if (ao_dma_allocated[index])
 124                 ao_panic(AO_PANIC_DMA);
 125         ao_dma_allocated[index] = 1;
 126 }
 127
 128 #if DEBUG
 129 void
 130 ao_dma_dump_cmd(void)
 131 {
 132         int i;
 133
 134 #ifndef LEAVE_DMA_ON
 135         ao_arch_critical(
 136                 if (ao_dma_active++ == 0)
 137                         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
 138                 );
 139 #endif
 140         printf ("isr %08x ifcr%08x\n", stm_dma.isr, stm_dma.ifcr);
 141         for (i = 0; i < NUM_DMA; i++)
 142                 printf("%d: done %d allocated %d mutex %2d ccr %04x cndtr %04x cpar %08x cmar %08x isr %08x\n",
 143                        i,
 144                        ao_dma_done[i],
 145                        ao_dma_allocated[i],
 146                        ao_dma_mutex[i],
 147                        stm_dma.channel[i].ccr,
 148                        stm_dma.channel[i].cndtr,
 149                        stm_dma.channel[i].cpar,
 150                        stm_dma.channel[i].cmar,
 151                        ao_dma_config[i].isr);
 152 #ifndef LEAVE_DMA_ON
 153         ao_arch_critical(
 154                 if (--ao_dma_active == 0)
 155                         stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
 156                 );
 157 #endif
 158 }
 159
 160 static const struct ao_cmds ao_dma_cmds[] = {
 161         { ao_dma_dump_cmd,      "D\0Dump DMA status" },
 162         { 0, NULL }
 163 };
 164 #endif
 165
 166 void
 167 ao_dma_init(void)
 168 {
 169         int     index;
 170
 171 #ifdef LEAVE_DMA_ON
 172         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
 173 #endif
 174         for (index = 0; index < STM_NUM_DMA; index++) {
 175 #if STM_DMA1_5_STOLEN
 176                 if (index == STM_DMA_INDEX(5)) {
 177                         ao_dma_allocated[index] = 1;
 178                         ao_dma_mutex[index] = 0xff;
 179                         continue;
 180                 }
 181 #endif
 182                 stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
 183                 stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index, 4);
 184                 ao_dma_allocated[index] = 0;
 185                 ao_dma_mutex[index] = 0;
 186         }
 187 #if DEBUG
 188         ao_cmd_register(&ao_dma_cmds[0]);
 189 #endif
 190 }