projects / hw / telenano / history
| 2010-11-03 | Bdale Garbee | add an explicit outline layer | blob | commitdiff | raw |
| 2010-11-03 | Bdale Garbee | no drc errors, refdes turned off in the silkscreen | blob | commitdiff | raw | diff to current |
| 2010-11-03 | Bdale Garbee | added mounting holes, cleaned up back-side silk (produc... | blob | commitdiff | raw | diff to current |
| 2010-11-03 | Bdale Garbee | down to desired board outline size | blob | commitdiff | raw | diff to current |
| 2010-11-03 | Bdale Garbee | bottom layer pulled back into new board boundary, silk... | blob | commitdiff | raw | diff to current |
| 2010-11-03 | Bdale Garbee | fully routed | blob | commitdiff | raw | diff to current |
| 2010-11-03 | Bdale Garbee | whoa! getting there! | blob | commitdiff | raw | diff to current |
| 2010-11-03 | Bdale Garbee | rename for consistency with tele* structure | blob | commitdiff | raw | diff to current |