make sure all silk elements are within board outline
authorBdale Garbee <bdale@gag.com>
Tue, 23 Nov 2010 06:18:17 +0000 (23:18 -0700)
committerBdale Garbee <bdale@gag.com>
Tue, 23 Nov 2010 06:18:17 +0000 (23:18 -0700)
commit41ef8d5e5bdc1129ae201d37c87a3b9b49dc312b
tree90927e5dde4c1e9b594594465efd39de993b5418
parentc467c2ff4b39807282961bab023d57325bcd15d4
make sure all silk elements are within board outline
telemini.pcb