Add bypass caps to all STM32L power leads

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/telelco.pcb b/telelco.pcb
index 642008ab66cd58c4def07183e5e1071c91da28dc..5a00b1d194af1999f2edf54ffbb734eac0581cd1 100644 (file)
--- a/telelco.pcb
+++ b/telelco.pcb
@@ -6,7 +6,7 @@ FileVersion[20070407]
 PCB["TeleLco" 450000 375000]
 
 Grid[100.0 0 0 0]
-Cursor[82300 124200 0.000000]
+Cursor[144700 158200 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[500 1000 500 500 1500 650]
@@ -898,7 +898,6 @@ Via[283000 291400 3000 2000 0 1500 "" ""]
 Via[251000 291500 3000 2000 0 1500 "" "thermal(1S)"]
 Via[282900 296500 3000 2000 0 1500 "" ""]
 Via[183600 164400 3000 2000 0 1500 "" ""]
-Via[179500 163200 3000 2000 0 1500 "" "thermal(1S)"]
 Via[160600 143600 3000 2000 0 1500 "" "thermal(1S)"]
 Via[152700 150300 3000 2000 0 1500 "" ""]
 Via[152700 163800 3000 2000 0 1500 "" ""]
@@ -923,7 +922,6 @@ Via[190300 123600 3000 2000 0 1500 "" ""]
 Via[183900 153200 3000 2000 0 1500 "" ""]
 Via[200500 99300 3000 2000 0 1500 "" ""]
 Via[196900 99300 3000 2000 0 1500 "" ""]
-Via[218400 119900 3000 2000 0 1500 "" "thermal(1S)"]
 Via[224600 104600 3000 2000 0 1500 "" ""]
 Via[224600 119800 3000 2000 0 1500 "" ""]
 Via[272900 120300 3000 2000 0 1500 "" ""]
@@ -984,6 +982,8 @@ Via[81100 117400 3000 2000 0 1500 "" ""]
 Via[112300 156100 3000 2000 0 1500 "" "thermal(1S)"]
 Via[81755 147688 3000 2000 0 1500 "" "thermal(0+,1S)"]
 Via[95500 160900 3000 2000 0 1500 "" "thermal(1S)"]
+Via[180200 168200 3000 2000 0 1500 "" "thermal(1S)"]
+Via[219700 122600 3000 2000 0 1500 "" "thermal(1S)"]
 
 Element["" "TDK_PS12" "U8" "TDK_PS12" 225000 277558 -4600 -3632 0 100 ""]
 (
@@ -1377,10 +1377,10 @@ Element["" "0402" "C602" "0.1uF" 152400 144774 2146 -15728 3 100 ""]
 
        )
 
-Element["" "0402" "L600" "bead" 172226 162200 -15798 -3050 0 100 ""]
+Element["" "0402" "L600" "bead" 167200 156726 -4150 -10098 3 100 ""]
 (
-       Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
-       Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+       Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
+       Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
 
        )
 
@@ -1619,7 +1619,7 @@ Element["" "0402" "C36" "0.1uF" 133174 76100 -3898 -7750 0 100 ""]
 
        )
 
-Element["" "lqfp64" "U7" "unknown" 191316 136064 17420 20352 0 100 ""]
+Element["" "lqfp64" "U7" "unknown" 191316 136064 21268 15552 0 100 ""]
 (
        Pad[-24408 14763 -20865 14763 1181 787 1811 "PA2/USART2_TX/ADC_IN2/TIM2_CH3/TIM9_CH1/SEG1" "16" "square"]
        Pad[20866 14763 24409 14763 1181 787 1811 "PB12/SPI2_NSS/I2C2_SMBA/USART3_CKI/ADC_IN18/TIM10_CH1/SEG12" "33" "square,edge2"]
@@ -2103,6 +2103,34 @@ Element["" "0402" "C108" "47pF" 100126 160900 -6050 7250 0 100 ""]
        Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
        Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
 
+       )
+
+Element["" "0402" "C604" "0.1uF" 178500 165000 3676 -3350 0 100 ""]
+(
+       Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+       Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "0402" "C605" "0.1uF" 209300 161374 3082 -3004 0 100 ""]
+(
+       Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
+       Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "0402" "C606" "0.1uF" 219600 118400 -3424 -8750 0 100 ""]
+(
+       Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "square"]
+       Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "square"]
+
+       )
+
+Element["" "0402" "C607" "0.1uF" 173100 109726 -12698 -9176 0 100 ""]
+(
+       Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"]
+       Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"]
+
        )
 Layer(1 "top")
 (
@@ -2505,8 +2533,6 @@ Layer(1 "top")
        Line[180200 228000 180200 226500 1000 2000 "clearline"]
        Line[180200 226500 182200 224500 1000 2000 "clearline"]
        Line[182200 224500 182200 174100 1000 2000 "clearline"]
-       Line[178522 158700 178522 162222 1000 2000 "clearline"]
-       Line[178522 162222 179500 163200 1000 2000 "clearline"]
        Line[204111 158700 204111 169011 1000 2000 "clearline"]
        Line[204111 169011 204700 169600 1000 2000 "clearline"]
        Line[198206 158700 198206 169594 1000 2000 "clearline"]
@@ -2519,13 +2545,9 @@ Layer(1 "top")
        Line[207200 150900 206000 152100 2500 2000 "clearline"]
        Line[206080 158700 206080 152020 1000 2000 "clearline"]
        Line[206080 152020 206100 152000 1000 2000 "clearline"]
-       Line[213954 121300 207200 121300 1000 2000 "clearline"]
        Line[207200 121300 206650 120750 1000 2000 "clearline"]
        Line[176553 113427 176553 120247 1000 2000 "clearline"]
        Line[176553 120247 176150 120650 1000 2000 "clearline"]
-       Line[170652 162200 170652 157148 1000 2000 "clearline"]
-       Line[170652 157148 175200 152600 1000 2000 "clearline"]
-       Line[175200 152600 175200 146700 1000 2000 "clearline"]
        Line[175200 146700 173400 144900 1000 2000 "clearline"]
        Line[173400 144900 168700 144900 1000 2000 "clearline"]
        Line[168700 144900 168680 144921 1000 2000 "clearline"]
@@ -2553,8 +2575,6 @@ Layer(1 "top")
        Line[152700 163800 156600 163800 1000 2000 "clearline"]
        Line[174000 181200 156600 163800 1000 2000 "clearline"]
        Line[168680 121300 163100 121300 1000 2000 "clearline"]
-       Line[176553 158700 176553 167953 1000 2000 "clearline"]
-       Line[176553 167953 182200 173600 1000 2000 "clearline"]
        Line[182200 173600 182200 174400 1000 2000 "clearline"]
        Line[194900 173500 204500 173500 1000 2000 "clearline"]
        Line[204500 173500 218000 160000 1000 2000 "clearline"]
@@ -2581,9 +2601,6 @@ Layer(1 "top")
        Line[180600 120300 180600 152600 2500 2000 "clearline"]
        Line[180490 158700 180490 152810 1000 2000 "clearline"]
        Line[180490 152810 180600 152700 1000 2000 "clearline"]
-       Line[173800 162200 173800 156400 1000 2000 "clearline"]
-       Line[173800 156400 177600 152600 1000 2000 "clearline"]
-       Line[177600 152600 180600 152600 1000 2000 "clearline"]
        Line[238000 113000 214000 113000 1000 2000 "clearline"]
        Line[214000 113000 210900 109900 1000 2000 "clearline"]
        Line[210900 109900 202143 109900 1000 2000 "clearline"]
@@ -2671,14 +2688,8 @@ Layer(1 "top")
        Line[192700 97500 193700 96500 1000 2000 "clearline"]
        Line[193700 96500 193700 87700 1000 2000 "clearline"]
        Line[193700 87700 194400 87000 1000 2000 "clearline"]
-       Line[218400 119900 218400 122200 1000 2000 "clearline"]
-       Line[218400 122200 217400 123200 1000 2000 "clearline"]
-       Line[217400 123200 214022 123200 1000 2000 "clearline"]
-       Line[214022 123200 213954 123269 1000 2000 "clearline"]
        Line[216700 105600 223600 105600 1000 2000 "clearline"]
        Line[223600 105600 224600 104600 1000 2000 "clearline"]
-       Line[213954 125237 219163 125237 1000 2000 "clearline"]
-       Line[219163 125237 224600 119800 1000 2000 "clearline"]
        Line[213954 127206 221094 127206 1000 2000 "clearline"]
        Line[221094 127206 229400 118900 1000 2000 "clearline"]
        Line[213954 129174 221526 129174 1000 2000 "clearline"]
@@ -3047,6 +3058,49 @@ Layer(1 "top")
        Line[129100 163800 127400 165500 1000 2000 "clearline"]
        Line[127400 165500 78800 165500 1000 2000 "clearline"]
        Line[61200 147900 78800 165500 1000 2000 "clearline"]
+       Line[177000 165074 176926 165000 1000 2000 "clearline"]
+       Line[176926 165000 176926 163674 1000 2000 "clearline"]
+       Line[176926 163674 178500 162100 1000 2000 "clearline"]
+       Line[178500 162100 178500 158722 1000 2000 "clearline"]
+       Line[178500 158722 178522 158700 1000 2000 "clearline"]
+       Line[180490 158690 180490 164584 1000 2000 "clearline"]
+       Line[180490 164584 180074 165000 1000 2000 "clearline"]
+       Line[180200 168200 177600 168200 1000 2000 "clearline"]
+       Line[177600 168200 176900 167500 1000 2000 "clearline"]
+       Line[176900 167500 176900 165026 1000 2000 "clearline"]
+       Line[176900 165026 176926 165000 1000 2000 "clearline"]
+       Line[182200 173600 179500 170900 1000 2000 "clearline"]
+       Line[179500 170900 177600 170900 1000 2000 "clearline"]
+       Line[177600 170900 174800 168100 1000 2000 "clearline"]
+       Line[174800 168100 174800 163000 1000 2000 "clearline"]
+       Line[174800 163000 176500 161300 1000 2000 "clearline"]
+       Line[176500 161300 176500 158754 1000 2000 "clearline"]
+       Line[176500 158754 176553 158700 1000 2000 "clearline"]
+       Line[167200 158300 171100 158300 1000 2000 "clearline"]
+       Line[171100 158300 176800 152600 1000 2000 "clearline"]
+       Line[176800 152600 180700 152600 1000 2000 "clearline"]
+       Line[167200 155152 170848 155152 1000 2000 "clearline"]
+       Line[170848 155152 175200 150800 1000 2000 "clearline"]
+       Line[175200 150800 175200 146700 1000 2000 "clearline"]
+       Line[204600 169600 209300 164900 1000 2000 "clearline"]
+       Line[209300 164900 209300 162948 1000 2000 "clearline"]
+       Line[209300 159800 206780 159800 1000 2000 "clearline"]
+       Line[206780 159800 206080 159100 1000 2000 "clearline"]
+       Line[176553 113500 176553 112153 1000 2000 "clearline"]
+       Line[176553 112153 175700 111300 1000 2000 "clearline"]
+       Line[175700 111300 173100 111300 1000 2000 "clearline"]
+       Line[173100 108152 177952 108152 1000 2000 "clearline"]
+       Line[177952 108152 178500 108700 1000 2000 "clearline"]
+       Line[213954 125237 220763 125237 1000 2000 "clearline"]
+       Line[220763 125237 224600 121400 1000 2000 "clearline"]
+       Line[224600 121400 224600 119800 1000 2000 "clearline"]
+       Line[213954 123269 219031 123269 1000 2000 "clearline"]
+       Line[219031 123269 219700 122600 1000 2000 "clearline"]
+       Line[219700 122600 219700 120074 1000 2000 "clearline"]
+       Line[219700 120074 219600 119974 1000 2000 "clearline"]
+       Line[213954 121300 215600 121300 1000 2000 "clearline"]
+       Line[215600 121300 217000 119900 1000 2000 "clearline"]
+       Line[217000 119900 217000 116500 1000 2000 "clearline"]
 )
 Layer(2 "bottom")
 (
@@ -3225,6 +3279,10 @@ NetList()
                Connect("C29-1")
                Connect("C36-2")
                Connect("C37-2")
+               Connect("C604-2")
+               Connect("C605-2")
+               Connect("C606-2")
+               Connect("C607-2")
                Connect("L600-1")
                Connect("R2-2")
                Connect("R3-2")
@@ -3353,6 +3411,10 @@ NetList()
                Connect("C601-2")
                Connect("C602-2")
                Connect("C603-1")
+               Connect("C604-1")
+               Connect("C605-1")
+               Connect("C606-1")
+               Connect("C607-1")
                Connect("C610-1")
                Connect("D1-2")
                Connect("D2-2")

diff --git a/telelco.sch b/telelco.sch
index 4cd196a6e75d1ed25f0ef4316d6d64c2aae76979..d1ea981ccd257753f4e13fe94031fc298bcf635e 100644 (file)
--- a/telelco.sch
+++ b/telelco.sch
@@ -274,7 +274,7 @@ T 57700 78400 5 10 0 1 0 0 1
 loadstatus=smt
 }
 N 58400 77500 58400 77600 4
-N 57700 78500 57200 78500 4
+N 55200 78500 57700 78500 4
 N 58600 78500 59800 78500 4
 {
 T 58700 78600 5 10 1 1 0 0 1
@@ -2433,3 +2433,57 @@ N 65300 71100 65800 71100 4
 T 65300 70900 5 10 1 1 0 0 1
 netname=radio_int
 }
+C 56900 77600 1 90 0 capacitor.sym
+{
+T 56200 77800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 56700 78300 5 10 1 1 180 0 1
+refdes=C607
+T 56000 77800 5 10 0 0 90 0 1
+symversion=0.1
+T 56900 77600 5 10 0 0 0 0 1
+footprint=0402
+T 56200 77800 5 10 1 1 0 0 1
+value=0.1uF
+}
+C 56400 77600 1 90 0 capacitor.sym
+{
+T 55700 77800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 56200 78300 5 10 1 1 180 0 1
+refdes=C606
+T 55500 77800 5 10 0 0 90 0 1
+symversion=0.1
+T 56400 77600 5 10 0 0 0 0 1
+footprint=0402
+T 55700 77800 5 10 1 1 0 0 1
+value=0.1uF
+}
+C 55900 77600 1 90 0 capacitor.sym
+{
+T 55200 77800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 55700 78300 5 10 1 1 180 0 1
+refdes=C605
+T 55000 77800 5 10 0 0 90 0 1
+symversion=0.1
+T 55900 77600 5 10 0 0 0 0 1
+footprint=0402
+T 55200 77800 5 10 1 1 0 0 1
+value=0.1uF
+}
+C 55400 77600 1 90 0 capacitor.sym
+{
+T 54700 77800 5 10 0 0 90 0 1
+device=CAPACITOR
+T 55200 78300 5 10 1 1 180 0 1
+refdes=C604
+T 54500 77800 5 10 0 0 90 0 1
+symversion=0.1
+T 55400 77600 5 10 0 0 0 0 1
+footprint=0402
+T 54700 77800 5 10 1 1 0 0 1
+value=0.1uF
+}
+N 56700 77600 55200 77600 4
+C 56600 77300 1 0 0 gnd.sym