# intentionally want to rebuild drc and bom on every invocation
all: drc partslist partslist.csv pcb
-drc: megadaughter.sch Makefile
- -gnetlist -g drc2 megadaughter.sch -o megadaughter.drc
-
-partslist: megadaughter.sch Makefile
- gnetlist -g bom -o megadaughter.unsorted megadaughter.sch
- head -n1 megadaughter.unsorted > partslist
- tail -n+2 megadaughter.unsorted | sort >> partslist
- rm -f megadaughter.unsorted
-
-partslist.csv: megadaughter.sch Makefile
- gnetlist -g partslistgag -o megadaughter.unsorted megadaughter.sch
- head -n1 megadaughter.unsorted > partslist.csv
- tail -n+2 megadaughter.unsorted | sort -t \, -k 8 >> partslist.csv
- rm -f megadaughter.unsorted
-
-pcb: megadaughter.sch project Makefile
+drc: megaaccel.sch Makefile
+ -gnetlist -g drc2 megaaccel.sch -o megaaccel.drc
+
+partslist: megaaccel.sch Makefile
+ gnetlist -g bom -o megaaccel.unsorted megaaccel.sch
+ head -n1 megaaccel.unsorted > partslist
+ tail -n+2 megaaccel.unsorted | sort >> partslist
+ rm -f megaaccel.unsorted
+
+partslist.csv: megaaccel.sch Makefile
+ gnetlist -g partslistgag -o megaaccel.unsorted megaaccel.sch
+ head -n1 megaaccel.unsorted > partslist.csv
+ tail -n+2 megaaccel.unsorted | sort -t \, -k 8 >> partslist.csv
+ rm -f megaaccel.unsorted
+
+pcb: megaaccel.sch project Makefile
gsch2pcb project
# note that 'gschlas -e foo.sch' will embed all symbols in the schematic, this
push:
git push --mirror
-megadaughter.xy: megadaughter.pcb
- pcb -x bom megadaughter.pcb
+megaaccel.xy: megaaccel.pcb
+ pcb -x bom megaaccel.pcb
-megadaughter.bottom.gbr: megadaughter.pcb
- pcb -x gerber megadaughter.pcb
+megaaccel.bottom.gbr: megaaccel.pcb
+ pcb -x gerber megaaccel.pcb
-zip: megadaughter.bottom.gbr megadaughter.bottommask.gbr megadaughter.fab.gbr megadaughter.top.gbr megadaughter.topmask.gbr megadaughter.toppaste.gbr megadaughter.topsilk.gbr megadaughter.plated-drill.cnc megadaughter.xy Makefile # megadaughter.xls
- zip megadaughter.zip megadaughter.*.gbr megadaughter.*.cnc megadaughter.xy # megadaughter.xls
+zip: megaaccel.bottom.gbr megaaccel.bottommask.gbr megaaccel.fab.gbr megaaccel.top.gbr megaaccel.topmask.gbr megaaccel.toppaste.gbr megaaccel.topsilk.gbr megaaccel.plated-drill.cnc megaaccel.xy Makefile # megaaccel.xls
+ zip megaaccel.zip megaaccel.*.gbr megaaccel.*.cnc megaaccel.xy # megaaccel.xls
clean:
- rm -f *.bom *.drc *.log *~ megadaughter.ps *.gbr *.cnc *bak* *- *.zip
+ rm -f *.bom *.drc *.log *~ megaaccel.ps *.gbr *.cnc *bak* *- *.zip
rm -f *.net *.xy *.cmd *.png partslist partslist.csv
- rm -f *.partslist *.new.pcb *.unsorted megadaughter.xls
+ rm -f *.partslist *.new.pcb *.unsorted megaaccel.xls
--- /dev/null
+# release: pcb 20110918
+
+# To read pcb files, the pcb version (or the git source date) must be >= the file version
+FileVersion[20070407]
+
+PCB["MegaAccel" 125000 125000]
+
+Grid[100.0 0 0 0]
+Cursor[1000 900 0.000000]
+PolyArea[200000000.000000]
+Thermal[0.500000]
+DRC[600 1000 600 500 1500 700]
+Flags("nameonpcb,clearnew,snappin,liveroute,hidenames")
+Groups("1,c:2,s:3")
+Styles["Signal,1000,3100,1500,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
+
+Symbol[' ' 1800]
+(
+)
+Symbol['!' 1200]
+(
+ SymbolLine[0 4500 0 5000 800]
+ SymbolLine[0 1000 0 3500 800]
+)
+Symbol['"' 1200]
+(
+ SymbolLine[0 1000 0 2000 800]
+ SymbolLine[1000 1000 1000 2000 800]
+)
+Symbol['#' 1200]
+(
+ SymbolLine[0 3500 2000 3500 800]
+ SymbolLine[0 2500 2000 2500 800]
+ SymbolLine[1500 2000 1500 4000 800]
+ SymbolLine[500 2000 500 4000 800]
+)
+Symbol['$' 1200]
+(
+ SymbolLine[1500 1500 2000 2000 800]
+ SymbolLine[500 1500 1500 1500 800]
+ SymbolLine[0 2000 500 1500 800]
+ SymbolLine[0 2000 0 2500 800]
+ SymbolLine[0 2500 500 3000 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 2000 4000 800]
+ SymbolLine[1500 4500 2000 4000 800]
+ SymbolLine[500 4500 1500 4500 800]
+ SymbolLine[0 4000 500 4500 800]
+ SymbolLine[1000 1000 1000 5000 800]
+)
+Symbol['%' 1200]
+(
+ SymbolLine[0 1500 0 2000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1000 1000 800]
+ SymbolLine[1000 1000 1500 1500 800]
+ SymbolLine[1500 1500 1500 2000 800]
+ SymbolLine[1000 2500 1500 2000 800]
+ SymbolLine[500 2500 1000 2500 800]
+ SymbolLine[0 2000 500 2500 800]
+ SymbolLine[0 5000 4000 1000 800]
+ SymbolLine[3500 5000 4000 4500 800]
+ SymbolLine[4000 4000 4000 4500 800]
+ SymbolLine[3500 3500 4000 4000 800]
+ SymbolLine[3000 3500 3500 3500 800]
+ SymbolLine[2500 4000 3000 3500 800]
+ SymbolLine[2500 4000 2500 4500 800]
+ SymbolLine[2500 4500 3000 5000 800]
+ SymbolLine[3000 5000 3500 5000 800]
+)
+Symbol['&' 1200]
+(
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 1500 0 2500 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[0 3500 1500 2000 800]
+ SymbolLine[500 5000 1000 5000 800]
+ SymbolLine[1000 5000 2000 4000 800]
+ SymbolLine[0 2500 2500 5000 800]
+ SymbolLine[500 1000 1000 1000 800]
+ SymbolLine[1000 1000 1500 1500 800]
+ SymbolLine[1500 1500 1500 2000 800]
+ SymbolLine[0 3500 0 4500 800]
+)
+Symbol[''' 1200]
+(
+ SymbolLine[0 2000 1000 1000 800]
+)
+Symbol['(' 1200]
+(
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[0 1500 0 4500 800]
+)
+Symbol[')' 1200]
+(
+ SymbolLine[0 1000 500 1500 800]
+ SymbolLine[500 1500 500 4500 800]
+ SymbolLine[0 5000 500 4500 800]
+)
+Symbol['*' 1200]
+(
+ SymbolLine[0 2000 2000 4000 800]
+ SymbolLine[0 4000 2000 2000 800]
+ SymbolLine[0 3000 2000 3000 800]
+ SymbolLine[1000 2000 1000 4000 800]
+)
+Symbol['+' 1200]
+(
+ SymbolLine[0 3000 2000 3000 800]
+ SymbolLine[1000 2000 1000 4000 800]
+)
+Symbol[',' 1200]
+(
+ SymbolLine[0 6000 1000 5000 800]
+)
+Symbol['-' 1200]
+(
+ SymbolLine[0 3000 2000 3000 800]
+)
+Symbol['.' 1200]
+(
+ SymbolLine[0 5000 500 5000 800]
+)
+Symbol['/' 1200]
+(
+ SymbolLine[0 4500 3000 1500 800]
+)
+Symbol['0' 1200]
+(
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 1500 0 4500 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[2000 1500 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4000 2000 2000 800]
+)
+Symbol['1' 1200]
+(
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1000 1000 1000 5000 800]
+ SymbolLine[0 2000 1000 1000 800]
+)
+Symbol['2' 1200]
+(
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 2000 1000 800]
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[2500 1500 2500 2500 800]
+ SymbolLine[0 5000 2500 2500 800]
+ SymbolLine[0 5000 2500 5000 800]
+)
+Symbol['3' 1200]
+(
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[2000 1500 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 3000 2000 3000 800]
+)
+Symbol['4' 1200]
+(
+ SymbolLine[0 3000 2000 1000 800]
+ SymbolLine[0 3000 2500 3000 800]
+ SymbolLine[2000 1000 2000 5000 800]
+)
+Symbol['5' 1200]
+(
+ SymbolLine[0 1000 2000 1000 800]
+ SymbolLine[0 1000 0 3000 800]
+ SymbolLine[0 3000 500 2500 800]
+ SymbolLine[500 2500 1500 2500 800]
+ SymbolLine[1500 2500 2000 3000 800]
+ SymbolLine[2000 3000 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['6' 1200]
+(
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[0 1500 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[0 3000 1500 3000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[2000 3500 2000 4500 800]
+)
+Symbol['7' 1200]
+(
+ SymbolLine[0 5000 2500 2500 800]
+ SymbolLine[2500 1000 2500 2500 800]
+ SymbolLine[0 1000 2500 1000 800]
+)
+Symbol['8' 1200]
+(
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 2500 500 3000 800]
+ SymbolLine[0 1500 0 2500 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[2000 1500 2000 2500 800]
+ SymbolLine[1500 3000 2000 2500 800]
+)
+Symbol['9' 1200]
+(
+ SymbolLine[0 5000 2000 3000 800]
+ SymbolLine[2000 1500 2000 3000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[0 1500 0 2500 800]
+ SymbolLine[0 2500 500 3000 800]
+ SymbolLine[500 3000 2000 3000 800]
+)
+Symbol[':' 1200]
+(
+ SymbolLine[0 2500 500 2500 800]
+ SymbolLine[0 3500 500 3500 800]
+)
+Symbol[';' 1200]
+(
+ SymbolLine[0 5000 1000 4000 800]
+ SymbolLine[1000 2500 1000 3000 800]
+)
+Symbol['<' 1200]
+(
+ SymbolLine[0 3000 1000 2000 800]
+ SymbolLine[0 3000 1000 4000 800]
+)
+Symbol['=' 1200]
+(
+ SymbolLine[0 2500 2000 2500 800]
+ SymbolLine[0 3500 2000 3500 800]
+)
+Symbol['>' 1200]
+(
+ SymbolLine[0 2000 1000 3000 800]
+ SymbolLine[0 4000 1000 3000 800]
+)
+Symbol['?' 1200]
+(
+ SymbolLine[1000 3000 1000 3500 800]
+ SymbolLine[1000 4500 1000 5000 800]
+ SymbolLine[0 1500 0 2000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[2000 1500 2000 2000 800]
+ SymbolLine[1000 3000 2000 2000 800]
+)
+Symbol['@' 1200]
+(
+ SymbolLine[0 1000 0 4000 800]
+ SymbolLine[0 4000 1000 5000 800]
+ SymbolLine[1000 5000 4000 5000 800]
+ SymbolLine[5000 3500 5000 1000 800]
+ SymbolLine[5000 1000 4000 0 800]
+ SymbolLine[4000 0 1000 0 800]
+ SymbolLine[1000 0 0 1000 800]
+ SymbolLine[1500 2000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 3000 3500 800]
+ SymbolLine[3000 3500 3500 3000 800]
+ SymbolLine[3500 3000 4000 3500 800]
+ SymbolLine[3500 3000 3500 1500 800]
+ SymbolLine[3500 2000 3000 1500 800]
+ SymbolLine[2000 1500 3000 1500 800]
+ SymbolLine[2000 1500 1500 2000 800]
+ SymbolLine[4000 3500 5000 3500 800]
+)
+Symbol['A' 1200]
+(
+ SymbolLine[0 1500 0 5000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 2000 1000 800]
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[2500 1500 2500 5000 800]
+ SymbolLine[0 3000 2500 3000 800]
+)
+Symbol['B' 1200]
+(
+ SymbolLine[0 5000 2000 5000 800]
+ SymbolLine[2000 5000 2500 4500 800]
+ SymbolLine[2500 3500 2500 4500 800]
+ SymbolLine[2000 3000 2500 3500 800]
+ SymbolLine[500 3000 2000 3000 800]
+ SymbolLine[500 1000 500 5000 800]
+ SymbolLine[0 1000 2000 1000 800]
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[2500 1500 2500 2500 800]
+ SymbolLine[2000 3000 2500 2500 800]
+)
+Symbol['C' 1200]
+(
+ SymbolLine[500 5000 2000 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 1500 0 4500 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 2000 1000 800]
+)
+Symbol['D' 1200]
+(
+ SymbolLine[500 1000 500 5000 800]
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[2500 1500 2500 4500 800]
+ SymbolLine[2000 5000 2500 4500 800]
+ SymbolLine[0 5000 2000 5000 800]
+ SymbolLine[0 1000 2000 1000 800]
+)
+Symbol['E' 1200]
+(
+ SymbolLine[0 3000 1500 3000 800]
+ SymbolLine[0 5000 2000 5000 800]
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 1000 2000 1000 800]
+)
+Symbol['F' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 1000 2000 1000 800]
+ SymbolLine[0 3000 1500 3000 800]
+)
+Symbol['G' 1200]
+(
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[500 1000 2000 1000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[0 1500 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 2000 5000 800]
+ SymbolLine[2000 5000 2500 4500 800]
+ SymbolLine[2500 3500 2500 4500 800]
+ SymbolLine[2000 3000 2500 3500 800]
+ SymbolLine[1000 3000 2000 3000 800]
+)
+Symbol['H' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[2500 1000 2500 5000 800]
+ SymbolLine[0 3000 2500 3000 800]
+)
+Symbol['I' 1200]
+(
+ SymbolLine[0 1000 1000 1000 800]
+ SymbolLine[500 1000 500 5000 800]
+ SymbolLine[0 5000 1000 5000 800]
+)
+Symbol['J' 1200]
+(
+ SymbolLine[0 1000 1500 1000 800]
+ SymbolLine[1500 1000 1500 4500 800]
+ SymbolLine[1000 5000 1500 4500 800]
+ SymbolLine[500 5000 1000 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['K' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 3000 2000 1000 800]
+ SymbolLine[0 3000 2000 5000 800]
+)
+Symbol['L' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['M' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 1000 1500 2500 800]
+ SymbolLine[1500 2500 3000 1000 800]
+ SymbolLine[3000 1000 3000 5000 800]
+)
+Symbol['N' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 1000 0 1500 800]
+ SymbolLine[0 1500 2500 4000 800]
+ SymbolLine[2500 1000 2500 5000 800]
+)
+Symbol['O' 1200]
+(
+ SymbolLine[0 1500 0 4500 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[2000 1500 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['P' 1200]
+(
+ SymbolLine[500 1000 500 5000 800]
+ SymbolLine[0 1000 2000 1000 800]
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[2500 1500 2500 2500 800]
+ SymbolLine[2000 3000 2500 2500 800]
+ SymbolLine[500 3000 2000 3000 800]
+)
+Symbol['Q' 1200]
+(
+ SymbolLine[0 1500 0 4500 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1500 1000 800]
+ SymbolLine[1500 1000 2000 1500 800]
+ SymbolLine[2000 1500 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[1000 4000 2000 5000 800]
+)
+Symbol['R' 1200]
+(
+ SymbolLine[0 1000 2000 1000 800]
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[2500 1500 2500 2500 800]
+ SymbolLine[2000 3000 2500 2500 800]
+ SymbolLine[500 3000 2000 3000 800]
+ SymbolLine[500 1000 500 5000 800]
+ SymbolLine[500 3000 2500 5000 800]
+)
+Symbol['S' 1200]
+(
+ SymbolLine[2000 1000 2500 1500 800]
+ SymbolLine[500 1000 2000 1000 800]
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[0 1500 0 2500 800]
+ SymbolLine[0 2500 500 3000 800]
+ SymbolLine[500 3000 2000 3000 800]
+ SymbolLine[2000 3000 2500 3500 800]
+ SymbolLine[2500 3500 2500 4500 800]
+ SymbolLine[2000 5000 2500 4500 800]
+ SymbolLine[500 5000 2000 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['T' 1200]
+(
+ SymbolLine[0 1000 2000 1000 800]
+ SymbolLine[1000 1000 1000 5000 800]
+)
+Symbol['U' 1200]
+(
+ SymbolLine[0 1000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[2000 1000 2000 4500 800]
+)
+Symbol['V' 1200]
+(
+ SymbolLine[0 1000 0 4000 800]
+ SymbolLine[0 4000 1000 5000 800]
+ SymbolLine[1000 5000 2000 4000 800]
+ SymbolLine[2000 1000 2000 4000 800]
+)
+Symbol['W' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 5000 1500 3500 800]
+ SymbolLine[1500 3500 3000 5000 800]
+ SymbolLine[3000 1000 3000 5000 800]
+)
+Symbol['X' 1200]
+(
+ SymbolLine[0 1000 0 1500 800]
+ SymbolLine[0 1500 2500 4000 800]
+ SymbolLine[2500 4000 2500 5000 800]
+ SymbolLine[0 4000 0 5000 800]
+ SymbolLine[0 4000 2500 1500 800]
+ SymbolLine[2500 1000 2500 1500 800]
+)
+Symbol['Y' 1200]
+(
+ SymbolLine[0 1000 0 1500 800]
+ SymbolLine[0 1500 1000 2500 800]
+ SymbolLine[1000 2500 2000 1500 800]
+ SymbolLine[2000 1000 2000 1500 800]
+ SymbolLine[1000 2500 1000 5000 800]
+)
+Symbol['Z' 1200]
+(
+ SymbolLine[0 1000 2500 1000 800]
+ SymbolLine[2500 1000 2500 1500 800]
+ SymbolLine[0 4000 2500 1500 800]
+ SymbolLine[0 4000 0 5000 800]
+ SymbolLine[0 5000 2500 5000 800]
+)
+Symbol['[' 1200]
+(
+ SymbolLine[0 1000 500 1000 800]
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 5000 500 5000 800]
+)
+Symbol['\' 1200]
+(
+ SymbolLine[0 1500 3000 4500 800]
+)
+Symbol[']' 1200]
+(
+ SymbolLine[0 1000 500 1000 800]
+ SymbolLine[500 1000 500 5000 800]
+ SymbolLine[0 5000 500 5000 800]
+)
+Symbol['^' 1200]
+(
+ SymbolLine[0 1500 500 1000 800]
+ SymbolLine[500 1000 1000 1500 800]
+)
+Symbol['_' 1200]
+(
+ SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['`' 1200]
+(
+ SymbolLine[5000 0 6500 1500 800]
+ SymbolLine[6500 5000 5000 6500 800]
+ SymbolLine[5000 6500 1500 6500 800]
+ SymbolLine[1500 6500 0 5000 800]
+ SymbolLine[0 5000 0 1500 800]
+ SymbolLine[0 1500 1500 0 800]
+ SymbolLine[1500 0 5000 0 800]
+ SymbolLine[6500 1500 6500 5000 800]
+ SymbolLine[2500 2500 4000 2500 800]
+ SymbolLine[2000 3000 2500 2500 800]
+ SymbolLine[2000 3000 2000 4000 800]
+ SymbolLine[2000 4000 2500 4500 800]
+ SymbolLine[2500 4500 4000 4500 800]
+)
+Symbol['a' 1200]
+(
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[2000 3000 2000 4500 800]
+ SymbolLine[2000 4500 2500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['b' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[2000 3500 2000 4500 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[0 3500 500 3000 800]
+)
+Symbol['c' 1200]
+(
+ SymbolLine[500 3000 2000 3000 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 2000 5000 800]
+)
+Symbol['d' 1200]
+(
+ SymbolLine[2000 1000 2000 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+)
+Symbol['e' 1200]
+(
+ SymbolLine[500 5000 2000 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[0 4000 2000 4000 800]
+ SymbolLine[2000 4000 2000 3500 800]
+)
+Symbol['f' 1000]
+(
+ SymbolLine[500 1500 500 5000 800]
+ SymbolLine[500 1500 1000 1000 800]
+ SymbolLine[1000 1000 1500 1000 800]
+ SymbolLine[0 3000 1000 3000 800]
+)
+Symbol['g' 1200]
+(
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[0 6000 500 6500 800]
+ SymbolLine[500 6500 1500 6500 800]
+ SymbolLine[1500 6500 2000 6000 800]
+ SymbolLine[2000 3000 2000 6000 800]
+)
+Symbol['h' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 2000 5000 800]
+)
+Symbol['i' 1000]
+(
+ SymbolLine[0 2000 0 2500 800]
+ SymbolLine[0 3500 0 5000 800]
+)
+Symbol['j' 1000]
+(
+ SymbolLine[500 2000 500 2500 800]
+ SymbolLine[500 3500 500 6000 800]
+ SymbolLine[0 6500 500 6000 800]
+)
+Symbol['k' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+ SymbolLine[0 3500 1500 5000 800]
+ SymbolLine[0 3500 1000 2500 800]
+)
+Symbol['l' 1000]
+(
+ SymbolLine[0 1000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['m' 1200]
+(
+ SymbolLine[500 3500 500 5000 800]
+ SymbolLine[500 3500 1000 3000 800]
+ SymbolLine[1000 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 2000 5000 800]
+ SymbolLine[2000 3500 2500 3000 800]
+ SymbolLine[2500 3000 3000 3000 800]
+ SymbolLine[3000 3000 3500 3500 800]
+ SymbolLine[3500 3500 3500 5000 800]
+ SymbolLine[0 3000 500 3500 800]
+)
+Symbol['n' 1200]
+(
+ SymbolLine[500 3500 500 5000 800]
+ SymbolLine[500 3500 1000 3000 800]
+ SymbolLine[1000 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 2000 5000 800]
+ SymbolLine[0 3000 500 3500 800]
+)
+Symbol['o' 1200]
+(
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[2000 3500 2000 4500 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['p' 1200]
+(
+ SymbolLine[500 3500 500 6500 800]
+ SymbolLine[0 3000 500 3500 800]
+ SymbolLine[500 3500 1000 3000 800]
+ SymbolLine[1000 3000 2000 3000 800]
+ SymbolLine[2000 3000 2500 3500 800]
+ SymbolLine[2500 3500 2500 4500 800]
+ SymbolLine[2000 5000 2500 4500 800]
+ SymbolLine[1000 5000 2000 5000 800]
+ SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['q' 1200]
+(
+ SymbolLine[2000 3500 2000 6500 800]
+ SymbolLine[1500 3000 2000 3500 800]
+ SymbolLine[500 3000 1500 3000 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[0 3500 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['r' 1200]
+(
+ SymbolLine[500 3500 500 5000 800]
+ SymbolLine[500 3500 1000 3000 800]
+ SymbolLine[1000 3000 2000 3000 800]
+ SymbolLine[0 3000 500 3500 800]
+)
+Symbol['s' 1200]
+(
+ SymbolLine[500 5000 2000 5000 800]
+ SymbolLine[2000 5000 2500 4500 800]
+ SymbolLine[2000 4000 2500 4500 800]
+ SymbolLine[500 4000 2000 4000 800]
+ SymbolLine[0 3500 500 4000 800]
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 2000 3000 800]
+ SymbolLine[2000 3000 2500 3500 800]
+ SymbolLine[0 4500 500 5000 800]
+)
+Symbol['t' 1000]
+(
+ SymbolLine[500 1000 500 4500 800]
+ SymbolLine[500 4500 1000 5000 800]
+ SymbolLine[0 2500 1000 2500 800]
+)
+Symbol['u' 1200]
+(
+ SymbolLine[0 3000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+ SymbolLine[2000 3000 2000 4500 800]
+)
+Symbol['v' 1200]
+(
+ SymbolLine[0 3000 0 4000 800]
+ SymbolLine[0 4000 1000 5000 800]
+ SymbolLine[1000 5000 2000 4000 800]
+ SymbolLine[2000 3000 2000 4000 800]
+)
+Symbol['w' 1200]
+(
+ SymbolLine[0 3000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[500 5000 1000 5000 800]
+ SymbolLine[1000 5000 1500 4500 800]
+ SymbolLine[1500 3000 1500 4500 800]
+ SymbolLine[1500 4500 2000 5000 800]
+ SymbolLine[2000 5000 2500 5000 800]
+ SymbolLine[2500 5000 3000 4500 800]
+ SymbolLine[3000 3000 3000 4500 800]
+)
+Symbol['x' 1200]
+(
+ SymbolLine[0 3000 2000 5000 800]
+ SymbolLine[0 5000 2000 3000 800]
+)
+Symbol['y' 1200]
+(
+ SymbolLine[0 3000 0 4500 800]
+ SymbolLine[0 4500 500 5000 800]
+ SymbolLine[2000 3000 2000 6000 800]
+ SymbolLine[1500 6500 2000 6000 800]
+ SymbolLine[500 6500 1500 6500 800]
+ SymbolLine[0 6000 500 6500 800]
+ SymbolLine[500 5000 1500 5000 800]
+ SymbolLine[1500 5000 2000 4500 800]
+)
+Symbol['z' 1200]
+(
+ SymbolLine[0 3000 2000 3000 800]
+ SymbolLine[0 5000 2000 3000 800]
+ SymbolLine[0 5000 2000 5000 800]
+)
+Symbol['{' 1200]
+(
+ SymbolLine[500 1500 1000 1000 800]
+ SymbolLine[500 1500 500 2500 800]
+ SymbolLine[0 3000 500 2500 800]
+ SymbolLine[0 3000 500 3500 800]
+ SymbolLine[500 3500 500 4500 800]
+ SymbolLine[500 4500 1000 5000 800]
+)
+Symbol['|' 1200]
+(
+ SymbolLine[0 1000 0 5000 800]
+)
+Symbol['}' 1200]
+(
+ SymbolLine[0 1000 500 1500 800]
+ SymbolLine[500 1500 500 2500 800]
+ SymbolLine[500 2500 1000 3000 800]
+ SymbolLine[500 3500 1000 3000 800]
+ SymbolLine[500 3500 500 4500 800]
+ SymbolLine[0 5000 500 4500 800]
+)
+Symbol['~' 1200]
+(
+ SymbolLine[0 3500 500 3000 800]
+ SymbolLine[500 3000 1000 3000 800]
+ SymbolLine[1000 3000 1500 3500 800]
+ SymbolLine[1500 3500 2000 3500 800]
+ SymbolLine[2000 3500 2500 3000 800]
+)
+Attribute("PCB::grid::unit" "mil")
+Via[64000 32100 3100 2000 0 1500 "" "thermal(1S)"]
+Via[69800 63000 3100 2000 0 1500 "" "thermal(1S)"]
+Via[94700 27900 3100 2000 0 1500 "" "thermal(1S)"]
+Via[100200 81400 3100 2000 0 1500 "" "thermal(1S)"]
+
+Element["hidename" "0-338068-8" "J9" "Companion" 112500 117500 0 0 2 100 ""]
+(
+ Pin[0 -10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(0X,1X)"]
+ Pin[-5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
+ Pin[-10000 -10000 6299 1200 7299 3150 "3" "3" "edge2"]
+ Pin[-15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
+ Pin[-20000 -10000 6299 1200 7299 3150 "5" "5" "edge2"]
+ Pin[-25000 0 6299 1200 7299 3150 "6" "6" "edge2"]
+ Pin[-30000 -10000 6299 1200 7299 3150 "7" "7" "edge2"]
+ Pin[-35000 0 6299 1200 7299 3150 "8" "8" "edge2"]
+ Pin[5511 -2913 7306 1400 7906 5906 "mnt" "0" "edge2"]
+ ElementLine [11593 5038 11593 -15039 600]
+ ElementLine [-46594 -15039 11593 -15039 600]
+ ElementLine [-46594 5038 -46594 -15039 600]
+ ElementLine [-46594 5038 11593 5038 600]
+
+ )
+
+Element["hidename" "1-338068-6" "J20" "misc" 112500 17500 0 0 2 100 ""]
+(
+ Pin[0 -10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"]
+ Pin[-5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
+ Pin[-10000 -10000 6299 1200 7299 3150 "3" "3" "edge2"]
+ Pin[-15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
+ Pin[-20000 -10000 6299 1200 7299 3150 "5" "5" "edge2"]
+ Pin[-25000 0 6299 1200 7299 3150 "6" "6" "edge2,thermal(2X)"]
+ Pin[-30000 -10000 6299 1200 7299 3150 "7" "7" "edge2,thermal(1X)"]
+ Pin[-35000 0 6299 1200 7299 3150 "8" "8" "edge2"]
+ Pin[-40000 -10000 6299 1200 7299 3150 "9" "9" "edge2"]
+ Pin[-45000 0 6299 1200 7299 3150 "10" "10" "edge2"]
+ Pin[-50000 -10000 6299 1200 7299 3150 "11" "11" "edge2"]
+ Pin[-55000 0 6299 1200 7299 3150 "12" "12" "edge2"]
+ Pin[-60000 -10000 6299 1200 7299 3150 "13" "13" "edge2"]
+ Pin[-65000 0 6299 1200 7299 3150 "14" "14" "edge2"]
+ Pin[-70000 -10000 6299 1200 7299 3150 "15" "15" "edge2"]
+ Pin[-75000 0 6299 1200 7299 3150 "16" "16" "edge2"]
+ Pin[5511 -2913 7306 1400 7906 5906 "mnt" "0" "edge2"]
+ ElementLine [11593 5038 11593 -15039 600]
+ ElementLine [-86594 -15039 11593 -15039 600]
+ ElementLine [-86594 5038 -86594 -15039 600]
+ ElementLine [-86594 5038 11593 5038 600]
+
+ )
+
+Element["" "ADXL78" "U3" "ADXL78" 79600 40500 12011 -10161 3 100 ""]
+(
+ Pad[4999 -12499 4999 -5412 3150 1850 3750 "pin1" "1" "square"]
+ Pad[4999 5413 4999 12500 3150 1850 3750 "VDD" "7" "square,edge2"]
+ Pad[0 -12499 0 -5412 3150 1850 3750 "pin2" "2" "square"]
+ Pad[0 5413 0 12500 3150 1850 3750 "VOUT" "6" "square,edge2"]
+ Pad[-5000 -12499 -5000 -5412 3150 1850 3750 "VSS" "3" "square"]
+ Pad[-5000 5413 -5000 12500 3150 1850 3750 "pin5" "5" "square,edge2"]
+ Pad[-12500 0 -5413 0 3150 1850 3750 "ST" "4" "square"]
+ Pad[5412 0 12499 0 3150 1850 3750 "VDD2" "8" "square,edge2"]
+ ElementLine [-9843 -9842 9842 -9842 1000]
+ ElementLine [-9843 9843 -9843 -9842 1000]
+ ElementLine [-9843 9843 9842 9843 1000]
+ ElementLine [9842 9843 9842 -9842 1000]
+ ElementArc [8857 -11810 500 500 270 360 1000]
+
+ )
+
+Element["" "SO8" "U4" "LTC1682-5" 79900 81350 -10300 -2600 3 100 ""]
+(
+ Pad[7500 -13500 7500 -7000 2000 1000 3000 "OUT" "1" "square"]
+ Pad[2500 -13500 2500 -7000 2000 1000 3000 "SHDN" "2" "square"]
+ Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "FILT" "3" "square"]
+ Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "GND" "4" "square"]
+ Pad[-7500 7000 -7500 13500 2000 1000 3000 "C-" "5" "square,edge2"]
+ Pad[-2500 7000 -2500 13500 2000 1000 3000 "IN" "6" "square,edge2"]
+ Pad[2500 7000 2500 13500 2000 1000 3000 "C+" "7" "square,edge2"]
+ Pad[7500 7000 7500 13500 2000 1000 3000 "CPO" "8" "square,edge2"]
+ ElementLine [-9500 -15500 9500 -15500 1000]
+ ElementLine [-9500 -15500 -9500 15500 1000]
+ ElementLine [-9500 15500 9500 15500 1000]
+ ElementLine [9500 -15500 9500 -2500 1000]
+ ElementLine [9500 2500 9500 15500 1000]
+ ElementArc [9500 0 2500 2500 270 180 1000]
+
+ )
+
+Element["" "0402" "C15" "0.22uF" 77474 99700 3176 -2950 0 100 ""]
+(
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "C8" "0.001uF" 74974 63000 3824 -3350 0 100 ""]
+(
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "R11" "10k" 58926 34400 4150 7550 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "C14" "4.7uF" 94500 85500 21450 5250 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "C16" "4.7uF" 94526 81400 22150 3550 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "R26" "10k" 63426 63000 -30828 -1750 0 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "R25" "5.6k" 63326 59100 -21350 2750 2 100 ""]
+(
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "C7" "4.7uF" 94500 77200 20350 2250 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "C13" "0.1uF" 58926 29500 4450 -1050 2 100 ""]
+(
+ Pad[1574 -393 1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "R10" "5k" 63300 55000 -4150 -7050 0 100 ""]
+(
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "0402" "C6" "0.1uF" 94700 32926 8650 -2876 3 100 ""]
+(
+ Pad[-393 -1574 393 -1574 1968 2000 2568 "1" "1" "square"]
+ Pad[-393 1574 393 1574 1968 2000 2568 "2" "2" "square"]
+
+ )
+Layer(1 "top")
+(
+ Line[87400 71100 87400 59000 1000 2000 "clearline"]
+ Line[87400 59000 84800 56400 1000 2000 "clearline"]
+ Line[84800 56400 84800 49658 1000 2000 "clearline"]
+ Line[84800 49658 84599 49456 1000 2000 "clearline"]
+ Line[87400 58800 87400 58700 1000 2000 "clearline"]
+ Line[87400 58700 94700 51400 1000 2000 "clearline"]
+ Line[94700 40800 94400 40500 1000 2000 "clearline"]
+ Line[94400 40500 88556 40500 1000 2000 "clearline"]
+ Line[77500 91700 77400 91600 1000 2000 "clearline"]
+ Line[77400 91600 77400 83900 1000 2000 "clearline"]
+ Line[77400 83900 82400 78900 1000 2000 "clearline"]
+ Line[82400 78900 82400 71100 1000 2000 "clearline"]
+ Line[60500 29500 61400 29500 1000 2000 "clearline"]
+ Line[61400 29500 64000 32100 1000 2000 "clearline"]
+ Line[60500 34400 61700 34400 1000 2000 "clearline"]
+ Line[70644 40500 65000 40500 1000 2000 "clearline"]
+ Line[65000 40500 64000 39500 1000 2000 "clearline"]
+ Line[64000 39500 64000 32100 1000 2000 "clearline"]
+ Line[74600 31544 74600 25600 1000 2000 "clearline"]
+ Line[74600 25600 74000 25000 1000 2000 "clearline"]
+ Line[74000 25000 71100 25000 1000 2000 "clearline"]
+ Line[61700 34400 71100 25000 1000 2000 "clearline"]
+ Line[57352 34400 55600 34400 1000 2000 "clearline"]
+ Line[55600 34400 54900 33700 1000 2000 "clearline"]
+ Line[54900 33700 54900 30300 1000 2000 "clearline"]
+ Line[57352 29500 55700 29500 1000 2000 "clearline"]
+ Line[55700 29500 54900 30300 1000 2000 "clearline"]
+ Line[42500 7500 47300 12300 1000 2000 "clearline"]
+ Line[47300 12300 50400 12300 1000 2000 "clearline"]
+ Line[50400 12300 52500 14400 1000 2000 "clearline"]
+ Line[52500 14400 52500 27900 1000 2000 "clearline"]
+ Line[52500 27900 54900 30300 1000 2000 "clearline"]
+ Line[72400 91600 72400 98300 1000 2000 "clearline"]
+ Line[72400 98300 73800 99700 1000 2000 "clearline"]
+ Line[73800 99700 75900 99700 1000 2000 "clearline"]
+ Line[82400 91600 82400 98600 1000 2000 "clearline"]
+ Line[82400 98600 81300 99700 1000 2000 "clearline"]
+ Line[81300 99700 79048 99700 1000 2000 "clearline"]
+ Line[72400 71100 72400 64000 1000 2000 "clearline"]
+ Line[72400 64000 73400 63000 1000 2000 "clearline"]
+ Line[77400 71100 77400 63852 1000 2000 "clearline"]
+ Line[77400 63852 76548 63000 1000 2000 "clearline"]
+ Line[73400 63000 65000 63000 1000 2000 "clearline"]
+ Line[61752 59100 59900 59100 1000 2000 "clearline"]
+ Line[59900 59100 59500 59500 1000 2000 "clearline"]
+ Line[59500 59500 59500 62500 1000 2000 "clearline"]
+ Line[59500 62500 60000 63000 1000 2000 "clearline"]
+ Line[60000 63000 61852 63000 1000 2000 "clearline"]
+ Line[79600 49456 79600 55800 1000 2000 "clearline"]
+ Line[79600 55800 78700 56700 1000 2000 "clearline"]
+ Line[78700 56700 70400 56700 1000 2000 "clearline"]
+ Line[70400 56700 68700 55000 1000 2000 "clearline"]
+ Line[68700 55000 64874 55000 1000 2000 "clearline"]
+ Line[61726 55000 60200 55000 1000 2000 "clearline"]
+ Line[60200 55000 59600 54400 1000 2000 "clearline"]
+ Line[59600 54400 59600 41400 1000 2000 "clearline"]
+ Line[59600 41400 54900 36700 1000 2000 "clearline"]
+ Line[54900 36700 54900 32900 1000 2000 "clearline"]
+ Line[37500 17500 43600 23600 1000 2000 "clearline"]
+ Line[43600 23600 46800 23600 1000 2000 "clearline"]
+ Line[46800 23600 49000 25800 1000 2000 "clearline"]
+ Line[49000 25800 49000 35900 1000 2000 "clearline"]
+ Line[49000 35900 56300 43200 1000 2000 "clearline"]
+ Line[56300 43200 56300 55700 1000 2000 "clearline"]
+ Line[56300 55700 59700 59100 1000 2000 "clearline"]
+ Line[94700 51400 94700 34500 1000 2000 "clearline"]
+ Line[94700 31352 94700 27900 1000 2000 "clearline"]
+ Line[77500 117500 67500 107500 1000 2000 "clearline"]
+ Line[67500 107500 67500 85900 1000 2000 "clearline"]
+ Line[67500 85900 69600 83800 1000 2000 "clearline"]
+ Line[69600 83800 77500 83800 1000 2000 "clearline"]
+ Line[96100 81400 100200 81400 1000 2000 "clearline"]
+ Line[96074 77200 98200 77200 1000 2000 "clearline"]
+ Line[98200 77200 100200 79200 1000 2000 "clearline"]
+ Line[100200 79200 100200 81300 1000 2000 "clearline"]
+ Line[100200 81300 100300 81400 1000 2000 "clearline"]
+ Line[96074 85500 98200 85500 1000 2000 "clearline"]
+ Line[98200 85500 100200 83500 1000 2000 "clearline"]
+ Line[100200 83500 100200 81400 1000 2000 "clearline"]
+ Line[92952 81400 85000 81400 1000 2000 "clearline"]
+ Line[85000 81400 82450 78850 1000 2000 "clearline"]
+ Line[92926 77200 88400 77200 1000 2000 "clearline"]
+ Line[88400 77200 87500 76300 1000 2000 "clearline"]
+ Line[87500 76300 87500 71200 1000 2000 "clearline"]
+ Line[87500 71200 87400 71100 1000 2000 "clearline"]
+ Line[92926 85500 88300 85500 1000 2000 "clearline"]
+ Line[88300 85500 87400 86400 1000 2000 "clearline"]
+ Line[87400 86400 87400 91600 1000 2000 "clearline"]
+ Line[64900 59100 82300 59100 1000 2000 "clearline"]
+ Line[82300 59100 84900 56500 1000 2000 "clearline"]
+ Text[111649 24263 3 100 "` 2012 Bdale Garbee KB0G" ""]
+ Text[123200 32100 3 150 "MegaAccel v0.1" "clearline"]
+)
+Layer(2 "bottom")
+(
+ Polygon("clearpoly")
+ (
+ [21000 1000] [124000 1000] [124000 124000] [46000 124000] [46000 26500]
+ [21000 26500]
+ )
+)
+Layer(3 "outline")
+(
+ Attribute("PCB::skip-drc" "1")
+ Line[0 0 125000 0 1000 2000 "lock"]
+ Line[125000 0 125000 125000 1000 2000 "lock"]
+ Line[125000 125000 0 125000 1000 2000 "lock"]
+ Line[0 125000 0 0 1000 2000 "lock"]
+)
+Layer(4 "silk")
+(
+)
+Layer(5 "silk")
+(
+)
+NetList()
+(
+ Net("+5V" "(unknown)")
+ (
+ Connect("C6-2")
+ Connect("C7-2")
+ Connect("R25-2")
+ Connect("U3-7")
+ Connect("U3-8")
+ Connect("U4-1")
+ )
+ Net("accel" "(unknown)")
+ (
+ Connect("C13-2")
+ Connect("J20-15")
+ Connect("R10-1")
+ Connect("R11-2")
+ )
+ Net("accel_ref" "(unknown)")
+ (
+ Connect("J20-16")
+ Connect("R25-1")
+ Connect("R26-2")
+ )
+ Net("GND" "(unknown)")
+ (
+ Connect("C6-1")
+ Connect("C7-1")
+ Connect("C8-1")
+ Connect("C13-1")
+ Connect("C14-1")
+ Connect("C16-1")
+ Connect("J9-1")
+ Connect("J20-1")
+ Connect("J20-7")
+ Connect("R11-1")
+ Connect("R26-1")
+ Connect("U3-3")
+ Connect("U3-4")
+ Connect("U4-4")
+ )
+ Net("unnamed_net1" "(unknown)")
+ (
+ Connect("R10-2")
+ Connect("U3-6")
+ )
+ Net("unnamed_net2" "(unknown)")
+ (
+ Connect("C8-2")
+ Connect("U4-3")
+ )
+ Net("unnamed_net3" "(unknown)")
+ (
+ Connect("C15-1")
+ Connect("U4-5")
+ )
+ Net("unnamed_net4" "(unknown)")
+ (
+ Connect("C15-2")
+ Connect("U4-7")
+ )
+ Net("unnamed_net5" "(unknown)")
+ (
+ Connect("C14-2")
+ Connect("U4-8")
+ )
+ Net("v_lipo" "(unknown)")
+ (
+ Connect("C16-2")
+ Connect("J9-8")
+ Connect("U4-2")
+ Connect("U4-6")
+ )
+)
--- /dev/null
+v 20110115 2
+C 40000 40000 0 0 0 title-C-bdale.sym
+T 40000 40000 8 10 1 1 0 0 1
+value=270
+T 40000 40000 8 10 1 1 0 0 1
+netname=3.3V
+T 54700 41800 9 30 1 0 0 0 1
+MegaMetrum Accel Daughter
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T 60400 40400 9 10 1 0 0 0 1
+0.1
+T 58000 40400 9 10 1 0 0 0 1
+1
+T 58600 40400 9 10 1 0 0 0 1
+1
+T 55700 40400 9 10 1 0 0 0 1
+megaaccel.sch
+T 55700 40100 9 10 1 0 0 0 1
+http://altusmetrum.com/
+C 54400 51600 1 0 0 gnd.sym
+C 57300 51800 1 90 0 capacitor.sym
+{
+T 56600 52000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 57500 52500 5 10 1 1 180 0 1
+refdes=C13
+T 56400 52000 5 10 0 0 90 0 1
+symversion=0.1
+T 57200 52000 5 10 1 1 0 0 1
+value=0.1uF
+T 57300 51800 5 10 0 1 0 0 1
+vendor_part_number=399-3027-1-ND
+T 57300 51800 5 10 0 0 0 0 1
+footprint=0402
+T 57300 51800 5 10 0 0 0 0 1
+vendor=digikey
+T 57300 51800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 57000 51500 1 0 0 gnd.sym
+N 55300 53600 56000 53600 4
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T 13300 -8600 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+C 50100 51800 1 90 0 capacitor.sym
+{
+T 49400 52000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 50600 52600 5 10 1 1 180 0 1
+refdes=C7
+T 49200 52000 5 10 0 0 90 0 1
+symversion=0.1
+T 50100 51795 5 10 0 1 90 0 1
+footprint=0402
+T 50100 51900 5 10 1 1 0 0 1
+value=4.7uF
+T 50100 51800 5 10 0 1 0 0 1
+vendor_part_number=490-5408-1-ND
+T 50100 51800 5 10 0 0 0 0 1
+vendor=digikey
+T 50100 51800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 49900 53600 49900 52700 4
+C 49700 53600 1 0 0 5V-plus.sym
+C 56100 52700 1 90 0 resistor.sym
+{
+T 55700 53000 5 10 0 0 90 0 1
+device=RESISTOR
+T 56700 53400 5 10 1 1 180 0 1
+refdes=R10
+T 56100 52695 5 10 0 1 90 0 1
+footprint=0402
+T 56200 52900 5 10 1 1 0 0 1
+value=5k
+T 56100 52700 5 10 0 1 0 0 1
+vendor_part_number=311-5.10KLRCT-ND
+T 56100 52700 5 10 0 0 0 0 1
+vendor=digikey
+T 56100 52700 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 56100 51800 1 90 0 resistor.sym
+{
+T 55700 52100 5 10 0 0 90 0 1
+device=RESISTOR
+T 56700 52500 5 10 1 1 180 0 1
+refdes=R11
+T 56100 51795 5 10 0 1 90 0 1
+footprint=0402
+T 56200 52000 5 10 1 1 0 0 1
+value=10k
+T 56100 51800 5 10 0 1 0 0 1
+vendor_part_number=RMCF1/16S10K1%RCT-ND
+T 56100 51800 5 10 0 0 0 0 1
+vendor=digikey
+T 56100 51800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 56000 52700 58200 52700 4
+{
+T 57700 52800 5 10 1 1 0 0 1
+netname=accel
+}
+C 55900 51500 1 0 0 gnd.sym
+C 48100 51800 1 90 0 capacitor.sym
+{
+T 47400 52000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 48600 52600 5 10 1 1 180 0 1
+refdes=C8
+T 47200 52000 5 10 0 0 90 0 1
+symversion=0.1
+T 48100 51795 5 10 0 1 90 0 1
+footprint=0402
+T 48100 51900 5 10 1 1 0 0 1
+value=0.001uF
+T 48100 51800 5 10 0 1 0 0 1
+vendor_part_number=445-2651-1-ND
+T 48100 51800 5 10 0 0 0 0 1
+vendor=digikey
+T 48100 51800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 45900 54700 1 0 0 capacitor.sym
+{
+T 46100 55400 5 10 0 0 0 0 1
+device=CAPACITOR
+T 45700 55100 5 10 1 1 0 0 1
+refdes=C15
+T 46100 55600 5 10 0 0 0 0 1
+symversion=0.1
+T 45895 54700 5 10 0 1 0 0 1
+footprint=0402
+T 46500 55100 5 10 1 1 0 0 1
+value=0.22uF
+T 45900 54700 5 10 0 1 0 0 1
+vendor_part_number=587-1228-1-ND
+T 45900 54700 5 10 0 0 0 0 1
+vendor=digikey
+T 45900 54700 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 44800 51800 1 90 0 capacitor.sym
+{
+T 44100 52000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 44400 52600 5 10 1 1 180 0 1
+refdes=C16
+T 43900 52000 5 10 0 0 90 0 1
+symversion=0.1
+T 44800 51795 5 10 0 1 90 0 1
+footprint=0402
+T 43900 51900 5 10 1 1 0 0 1
+value=4.7uF
+T 44800 51800 5 10 0 1 0 0 1
+vendor_part_number=490-5408-1-ND
+T 44800 51800 5 10 0 0 0 0 1
+vendor=digikey
+T 44800 51800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 47800 53600 53000 53600 4
+N 45800 54500 45800 54900 4
+N 47000 54500 47000 54900 4
+C 46100 51300 1 0 0 gnd.sym
+N 46200 51600 46200 52300 4
+N 45000 53200 44600 53200 4
+N 44600 52700 44600 53600 4
+T 55900 54100 9 10 1 0 0 0 2
+Accelerometer runs on 5V,
+divider to match ADC range.
+C 45000 52300 1 0 0 LTC1682-5.sym
+{
+T 45395 54295 5 10 1 1 0 0 1
+refdes=U4
+T 45795 53495 5 10 0 1 0 0 1
+device=IC
+T 44995 52295 5 10 0 1 0 0 1
+footprint=SO8
+T 45000 52300 5 10 0 1 0 0 1
+vendor_part_number=LTC1682CS8-5#PBF-ND
+T 45000 52300 5 10 0 0 0 0 1
+vendor=digikey
+T 45800 53700 5 10 1 1 0 0 1
+value=LTC1682-5
+T 45000 52300 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 45800 54900 45900 54900 4
+N 46800 54900 47000 54900 4
+N 47900 51800 47900 51700 4
+N 47800 52800 47900 52800 4
+N 47900 52800 47900 52700 4
+C 49100 51800 1 90 0 capacitor.sym
+{
+T 48400 52000 5 10 0 0 90 0 1
+device=CAPACITOR
+T 49600 52600 5 10 1 1 180 0 1
+refdes=C14
+T 48200 52000 5 10 0 0 90 0 1
+symversion=0.1
+T 49100 51795 5 10 0 1 90 0 1
+footprint=0402
+T 49100 51900 5 10 1 1 0 0 1
+value=4.7uF
+T 49100 51800 5 10 0 1 0 0 1
+vendor_part_number=490-5408-1-ND
+T 49100 51800 5 10 0 0 0 0 1
+vendor=digikey
+T 49100 51800 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 47800 53200 48900 53200 4
+N 48900 53200 48900 52700 4
+N 48900 51700 48900 51800 4
+N 46200 51700 49900 51700 4
+N 49900 51700 49900 51800 4
+N 44600 51800 44600 51700 4
+N 44600 51700 46200 51700 4
+C 51700 52200 1 90 0 capacitor.sym
+{
+T 51000 52400 5 10 0 0 90 0 1
+device=CAPACITOR
+T 51300 52900 5 10 1 1 180 0 1
+refdes=C6
+T 50800 52400 5 10 0 0 90 0 1
+symversion=0.1
+T 50900 52300 5 10 1 1 0 0 1
+value=0.1uF
+T 51700 52200 5 10 0 0 0 0 1
+footprint=0402
+T 51700 52200 5 10 0 0 0 0 1
+vendor_part_number=399-3027-1-ND
+T 51700 52200 5 10 0 0 0 0 1
+vendor=digikey
+T 51700 52200 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 51500 53100 51500 53600 4
+C 51400 51900 1 0 0 gnd.sym
+N 43700 53600 45000 53600 4
+{
+T 43700 53700 5 10 1 1 0 0 1
+netname=v_lipo
+}
+N 53000 52400 52700 52400 4
+N 52700 52400 52700 51900 4
+N 52700 51900 54500 51900 4
+C 56100 50000 1 90 0 resistor.sym
+{
+T 55700 50300 5 10 0 0 90 0 1
+device=RESISTOR
+T 56700 50700 5 10 1 1 180 0 1
+refdes=R25
+T 56100 49995 5 10 0 1 90 0 1
+footprint=0402
+T 56200 50200 5 10 1 1 0 0 1
+value=5.6k
+T 56100 50000 5 10 0 1 0 0 1
+vendor_part_number=P5.60KLCT-ND
+T 56100 50000 5 10 0 0 0 0 1
+vendor=digikey
+T 56100 50000 5 10 0 1 0 0 1
+loadstatus=smt
+}
+C 56100 49100 1 90 0 resistor.sym
+{
+T 55700 49400 5 10 0 0 90 0 1
+device=RESISTOR
+T 56700 49800 5 10 1 1 180 0 1
+refdes=R26
+T 56100 49095 5 10 0 1 90 0 1
+footprint=0402
+T 56200 49300 5 10 1 1 0 0 1
+value=10k
+T 56100 49100 5 10 0 1 0 0 1
+vendor_part_number=RMCF1/16S10K1%RCT-ND
+T 56100 49100 5 10 0 0 0 0 1
+vendor=digikey
+T 56100 49100 5 10 0 1 0 0 1
+loadstatus=smt
+}
+N 56000 50000 57600 50000 4
+{
+T 56800 50100 5 10 1 1 0 0 1
+netname=accel_ref
+}
+C 55900 48800 1 0 0 gnd.sym
+N 52200 53600 52200 50900 4
+N 52200 50900 56000 50900 4
+C 53000 51900 1 0 0 ADXL78.sym
+{
+T 53795 53895 5 10 0 1 0 0 1
+device=IC
+T 53295 54195 5 10 1 1 0 0 1
+refdes=U3
+T 52995 51895 5 10 0 1 0 0 1
+footprint=ADXL78
+T 53000 51900 5 10 0 0 0 0 1
+loadstatus=smt
+T 53000 51900 5 10 0 0 0 0 1
+vendor=digikey
+T 53000 51900 5 10 0 1 0 0 1
+vendor_part_number=AD22281-R2CT-ND
+T 54300 54200 5 10 1 1 0 0 1
+value=ADXL78
+}
+N 53000 53200 52700 53200 4
+N 52700 53200 52700 53600 4
+T -36300 -60600 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -36300 -60600 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -36300 -60600 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -36300 -60600 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+C 50300 46400 1 0 0 gnd.sym
+N 50700 43900 49000 43900 4
+{
+T 49000 44000 5 10 1 1 0 0 1
+netname=v_lipo
+}
+N 50400 46700 50700 46700 4
+C 45000 47800 1 0 0 gnd.sym
+C 50700 43800 1 0 0 conn-8.sym
+{
+T 51055 46895 5 10 1 1 0 0 1
+refdes=J9
+T 50600 43600 5 10 1 1 0 0 1
+value=Companion
+T 50700 43800 5 10 0 0 0 0 1
+loadstatus=throughhole
+T 50700 43800 5 10 0 0 0 0 1
+vendor=digikey
+T 50700 43800 5 10 0 0 0 0 1
+vendor_part_number=A99436CT-ND
+T 50700 43800 5 10 0 0 0 0 1
+footprint=0-338068-8
+T 50700 43800 5 10 0 1 0 0 1
+device=CONNECTOR
+}
+T 44200 46800 9 10 1 0 90 0 2
+bootloader
+ support
+L 44300 46300 43800 46300 3 0 0 0 -1 -1
+C 45300 45400 1 0 0 gnd.sym
+L 44300 43500 43800 43500 3 0 0 0 -1 -1
+T 44100 44500 9 10 1 0 90 0 1
+JTAG
+N 45400 45700 45100 45700 4
+C 45100 42000 1 0 1 conn-16.sym
+{
+T 44745 48295 5 10 1 1 0 6 1
+refdes=J20
+T 44400 41800 5 10 1 1 0 0 1
+value=misc
+T 45100 42000 5 10 0 1 0 0 1
+device=CONNECTOR
+T 45100 42000 5 10 0 1 0 0 1
+footprint=1-338068-6
+T 45100 42000 5 10 0 1 0 0 1
+loadstatus=throughhole
+T 45100 42000 5 10 0 1 0 0 1
+vendor=digikey
+T 45100 42000 5 10 0 1 0 0 1
+vendor_part_number=A99501CT-ND
+}
+T 44100 43000 9 10 1 0 90 0 1
+i2c
+T 44100 42100 9 10 1 0 90 0 1
+gpio
+L 44300 42700 43800 42700 3 0 0 0 -1 -1
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -27500 -48700 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -76800 -99800 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -76800 -99800 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -76800 -99800 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -76800 -99800 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -52500 -75800 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -52500 -75800 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+T -52500 -75800 8 10 0 1 0 0 1
+vendor_part_number=MMA7260QT-ND
+T -52500 -75800 8 10 0 1 0 0 1
+vendor_part_number=MCP9700-E/TO-ND
+N 45100 42100 46500 42100 4
+{
+T 45700 42200 5 10 1 1 0 0 1
+netname=accel_ref
+}
+N 45100 42500 46500 42500 4
+{
+T 46000 42600 5 10 1 1 0 0 1
+netname=accel
+}
+++ /dev/null
-# release: pcb 20110918
-
-# To read pcb files, the pcb version (or the git source date) must be >= the file version
-FileVersion[20070407]
-
-PCB["MegaMetrum" 125000 125000]
-
-Grid[100.0 0 0 0]
-Cursor[500 21300 0.000000]
-PolyArea[200000000.000000]
-Thermal[0.500000]
-DRC[600 1000 600 500 1500 700]
-Flags("nameonpcb,clearnew,snappin,liveroute,hidenames")
-Groups("1,c:2,s:3")
-Styles["Signal,1000,3100,1500,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
-
-Symbol[' ' 1800]
-(
-)
-Symbol['!' 1200]
-(
- SymbolLine[0 4500 0 5000 800]
- SymbolLine[0 1000 0 3500 800]
-)
-Symbol['"' 1200]
-(
- SymbolLine[0 1000 0 2000 800]
- SymbolLine[1000 1000 1000 2000 800]
-)
-Symbol['#' 1200]
-(
- SymbolLine[0 3500 2000 3500 800]
- SymbolLine[0 2500 2000 2500 800]
- SymbolLine[1500 2000 1500 4000 800]
- SymbolLine[500 2000 500 4000 800]
-)
-Symbol['$' 1200]
-(
- SymbolLine[1500 1500 2000 2000 800]
- SymbolLine[500 1500 1500 1500 800]
- SymbolLine[0 2000 500 1500 800]
- SymbolLine[0 2000 0 2500 800]
- SymbolLine[0 2500 500 3000 800]
- SymbolLine[500 3000 1500 3000 800]
- SymbolLine[1500 3000 2000 3500 800]
- SymbolLine[2000 3500 2000 4000 800]
- SymbolLine[1500 4500 2000 4000 800]
- SymbolLine[500 4500 1500 4500 800]
- SymbolLine[0 4000 500 4500 800]
- SymbolLine[1000 1000 1000 5000 800]
-)
-Symbol['%' 1200]
-(
- SymbolLine[0 1500 0 2000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1000 1000 800]
- SymbolLine[1000 1000 1500 1500 800]
- SymbolLine[1500 1500 1500 2000 800]
- SymbolLine[1000 2500 1500 2000 800]
- SymbolLine[500 2500 1000 2500 800]
- SymbolLine[0 2000 500 2500 800]
- SymbolLine[0 5000 4000 1000 800]
- SymbolLine[3500 5000 4000 4500 800]
- SymbolLine[4000 4000 4000 4500 800]
- SymbolLine[3500 3500 4000 4000 800]
- SymbolLine[3000 3500 3500 3500 800]
- SymbolLine[2500 4000 3000 3500 800]
- SymbolLine[2500 4000 2500 4500 800]
- SymbolLine[2500 4500 3000 5000 800]
- SymbolLine[3000 5000 3500 5000 800]
-)
-Symbol['&' 1200]
-(
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[0 1500 0 2500 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[0 3500 1500 2000 800]
- SymbolLine[500 5000 1000 5000 800]
- SymbolLine[1000 5000 2000 4000 800]
- SymbolLine[0 2500 2500 5000 800]
- SymbolLine[500 1000 1000 1000 800]
- SymbolLine[1000 1000 1500 1500 800]
- SymbolLine[1500 1500 1500 2000 800]
- SymbolLine[0 3500 0 4500 800]
-)
-Symbol[''' 1200]
-(
- SymbolLine[0 2000 1000 1000 800]
-)
-Symbol['(' 1200]
-(
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[0 1500 0 4500 800]
-)
-Symbol[')' 1200]
-(
- SymbolLine[0 1000 500 1500 800]
- SymbolLine[500 1500 500 4500 800]
- SymbolLine[0 5000 500 4500 800]
-)
-Symbol['*' 1200]
-(
- SymbolLine[0 2000 2000 4000 800]
- SymbolLine[0 4000 2000 2000 800]
- SymbolLine[0 3000 2000 3000 800]
- SymbolLine[1000 2000 1000 4000 800]
-)
-Symbol['+' 1200]
-(
- SymbolLine[0 3000 2000 3000 800]
- SymbolLine[1000 2000 1000 4000 800]
-)
-Symbol[',' 1200]
-(
- SymbolLine[0 6000 1000 5000 800]
-)
-Symbol['-' 1200]
-(
- SymbolLine[0 3000 2000 3000 800]
-)
-Symbol['.' 1200]
-(
- SymbolLine[0 5000 500 5000 800]
-)
-Symbol['/' 1200]
-(
- SymbolLine[0 4500 3000 1500 800]
-)
-Symbol['0' 1200]
-(
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[0 1500 0 4500 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[2000 1500 2000 4500 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[0 4000 2000 2000 800]
-)
-Symbol['1' 1200]
-(
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[1000 1000 1000 5000 800]
- SymbolLine[0 2000 1000 1000 800]
-)
-Symbol['2' 1200]
-(
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 2000 1000 800]
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[2500 1500 2500 2500 800]
- SymbolLine[0 5000 2500 2500 800]
- SymbolLine[0 5000 2500 5000 800]
-)
-Symbol['3' 1200]
-(
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[2000 1500 2000 4500 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[500 3000 2000 3000 800]
-)
-Symbol['4' 1200]
-(
- SymbolLine[0 3000 2000 1000 800]
- SymbolLine[0 3000 2500 3000 800]
- SymbolLine[2000 1000 2000 5000 800]
-)
-Symbol['5' 1200]
-(
- SymbolLine[0 1000 2000 1000 800]
- SymbolLine[0 1000 0 3000 800]
- SymbolLine[0 3000 500 2500 800]
- SymbolLine[500 2500 1500 2500 800]
- SymbolLine[1500 2500 2000 3000 800]
- SymbolLine[2000 3000 2000 4500 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[0 4500 500 5000 800]
-)
-Symbol['6' 1200]
-(
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[0 1500 0 4500 800]
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[1500 3000 2000 3500 800]
- SymbolLine[0 3000 1500 3000 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[2000 3500 2000 4500 800]
-)
-Symbol['7' 1200]
-(
- SymbolLine[0 5000 2500 2500 800]
- SymbolLine[2500 1000 2500 2500 800]
- SymbolLine[0 1000 2500 1000 800]
-)
-Symbol['8' 1200]
-(
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[0 3500 0 4500 800]
- SymbolLine[0 3500 500 3000 800]
- SymbolLine[500 3000 1500 3000 800]
- SymbolLine[1500 3000 2000 3500 800]
- SymbolLine[2000 3500 2000 4500 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[0 2500 500 3000 800]
- SymbolLine[0 1500 0 2500 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[2000 1500 2000 2500 800]
- SymbolLine[1500 3000 2000 2500 800]
-)
-Symbol['9' 1200]
-(
- SymbolLine[0 5000 2000 3000 800]
- SymbolLine[2000 1500 2000 3000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[0 1500 0 2500 800]
- SymbolLine[0 2500 500 3000 800]
- SymbolLine[500 3000 2000 3000 800]
-)
-Symbol[':' 1200]
-(
- SymbolLine[0 2500 500 2500 800]
- SymbolLine[0 3500 500 3500 800]
-)
-Symbol[';' 1200]
-(
- SymbolLine[0 5000 1000 4000 800]
- SymbolLine[1000 2500 1000 3000 800]
-)
-Symbol['<' 1200]
-(
- SymbolLine[0 3000 1000 2000 800]
- SymbolLine[0 3000 1000 4000 800]
-)
-Symbol['=' 1200]
-(
- SymbolLine[0 2500 2000 2500 800]
- SymbolLine[0 3500 2000 3500 800]
-)
-Symbol['>' 1200]
-(
- SymbolLine[0 2000 1000 3000 800]
- SymbolLine[0 4000 1000 3000 800]
-)
-Symbol['?' 1200]
-(
- SymbolLine[1000 3000 1000 3500 800]
- SymbolLine[1000 4500 1000 5000 800]
- SymbolLine[0 1500 0 2000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[2000 1500 2000 2000 800]
- SymbolLine[1000 3000 2000 2000 800]
-)
-Symbol['@' 1200]
-(
- SymbolLine[0 1000 0 4000 800]
- SymbolLine[0 4000 1000 5000 800]
- SymbolLine[1000 5000 4000 5000 800]
- SymbolLine[5000 3500 5000 1000 800]
- SymbolLine[5000 1000 4000 0 800]
- SymbolLine[4000 0 1000 0 800]
- SymbolLine[1000 0 0 1000 800]
- SymbolLine[1500 2000 1500 3000 800]
- SymbolLine[1500 3000 2000 3500 800]
- SymbolLine[2000 3500 3000 3500 800]
- SymbolLine[3000 3500 3500 3000 800]
- SymbolLine[3500 3000 4000 3500 800]
- SymbolLine[3500 3000 3500 1500 800]
- SymbolLine[3500 2000 3000 1500 800]
- SymbolLine[2000 1500 3000 1500 800]
- SymbolLine[2000 1500 1500 2000 800]
- SymbolLine[4000 3500 5000 3500 800]
-)
-Symbol['A' 1200]
-(
- SymbolLine[0 1500 0 5000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 2000 1000 800]
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[2500 1500 2500 5000 800]
- SymbolLine[0 3000 2500 3000 800]
-)
-Symbol['B' 1200]
-(
- SymbolLine[0 5000 2000 5000 800]
- SymbolLine[2000 5000 2500 4500 800]
- SymbolLine[2500 3500 2500 4500 800]
- SymbolLine[2000 3000 2500 3500 800]
- SymbolLine[500 3000 2000 3000 800]
- SymbolLine[500 1000 500 5000 800]
- SymbolLine[0 1000 2000 1000 800]
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[2500 1500 2500 2500 800]
- SymbolLine[2000 3000 2500 2500 800]
-)
-Symbol['C' 1200]
-(
- SymbolLine[500 5000 2000 5000 800]
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[0 1500 0 4500 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 2000 1000 800]
-)
-Symbol['D' 1200]
-(
- SymbolLine[500 1000 500 5000 800]
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[2500 1500 2500 4500 800]
- SymbolLine[2000 5000 2500 4500 800]
- SymbolLine[0 5000 2000 5000 800]
- SymbolLine[0 1000 2000 1000 800]
-)
-Symbol['E' 1200]
-(
- SymbolLine[0 3000 1500 3000 800]
- SymbolLine[0 5000 2000 5000 800]
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[0 1000 2000 1000 800]
-)
-Symbol['F' 1200]
-(
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[0 1000 2000 1000 800]
- SymbolLine[0 3000 1500 3000 800]
-)
-Symbol['G' 1200]
-(
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[500 1000 2000 1000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[0 1500 0 4500 800]
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[500 5000 2000 5000 800]
- SymbolLine[2000 5000 2500 4500 800]
- SymbolLine[2500 3500 2500 4500 800]
- SymbolLine[2000 3000 2500 3500 800]
- SymbolLine[1000 3000 2000 3000 800]
-)
-Symbol['H' 1200]
-(
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[2500 1000 2500 5000 800]
- SymbolLine[0 3000 2500 3000 800]
-)
-Symbol['I' 1200]
-(
- SymbolLine[0 1000 1000 1000 800]
- SymbolLine[500 1000 500 5000 800]
- SymbolLine[0 5000 1000 5000 800]
-)
-Symbol['J' 1200]
-(
- SymbolLine[0 1000 1500 1000 800]
- SymbolLine[1500 1000 1500 4500 800]
- SymbolLine[1000 5000 1500 4500 800]
- SymbolLine[500 5000 1000 5000 800]
- SymbolLine[0 4500 500 5000 800]
-)
-Symbol['K' 1200]
-(
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[0 3000 2000 1000 800]
- SymbolLine[0 3000 2000 5000 800]
-)
-Symbol['L' 1200]
-(
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[0 5000 2000 5000 800]
-)
-Symbol['M' 1200]
-(
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[0 1000 1500 2500 800]
- SymbolLine[1500 2500 3000 1000 800]
- SymbolLine[3000 1000 3000 5000 800]
-)
-Symbol['N' 1200]
-(
- SymbolLine[0 1000 0 5000 800]
- SymbolLine[0 1000 0 1500 800]
- SymbolLine[0 1500 2500 4000 800]
- SymbolLine[2500 1000 2500 5000 800]
-)
-Symbol['O' 1200]
-(
- SymbolLine[0 1500 0 4500 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[2000 1500 2000 4500 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[0 4500 500 5000 800]
-)
-Symbol['P' 1200]
-(
- SymbolLine[500 1000 500 5000 800]
- SymbolLine[0 1000 2000 1000 800]
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[2500 1500 2500 2500 800]
- SymbolLine[2000 3000 2500 2500 800]
- SymbolLine[500 3000 2000 3000 800]
-)
-Symbol['Q' 1200]
-(
- SymbolLine[0 1500 0 4500 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[500 1000 1500 1000 800]
- SymbolLine[1500 1000 2000 1500 800]
- SymbolLine[2000 1500 2000 4500 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[1000 4000 2000 5000 800]
-)
-Symbol['R' 1200]
-(
- SymbolLine[0 1000 2000 1000 800]
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[2500 1500 2500 2500 800]
- SymbolLine[2000 3000 2500 2500 800]
- SymbolLine[500 3000 2000 3000 800]
- SymbolLine[500 1000 500 5000 800]
- SymbolLine[500 3000 2500 5000 800]
-)
-Symbol['S' 1200]
-(
- SymbolLine[2000 1000 2500 1500 800]
- SymbolLine[500 1000 2000 1000 800]
- SymbolLine[0 1500 500 1000 800]
- SymbolLine[0 1500 0 2500 800]
- SymbolLine[0 2500 500 3000 800]
- SymbolLine[500 3000 2000 3000 800]
- SymbolLine[2000 3000 2500 3500 800]
- SymbolLine[2500 3500 2500 4500 800]
- SymbolLine[2000 5000 2500 4500 800]
- SymbolLine[500 5000 2000 5000 800]
- SymbolLine[0 4500 500 5000 800]
-)
-Symbol['T' 1200]
-(
- SymbolLine[0 1000 2000 1000 800]
- SymbolLine[1000 1000 1000 5000 800]
-)
-Symbol['U' 1200]
-(
- SymbolLine[0 1000 0 4500 800]
- SymbolLine[0 4500 500 5000 800]
- SymbolLine[500 5000 1500 5000 800]
- SymbolLine[1500 5000 2000 4500 800]
- SymbolLine[2000 1000 2000 4500 800]
-)
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- Polygon("clearpoly")
- (
- [21000 1000] [124000 1000] [124000 124000] [46000 124000] [46000 26500]
- [21000 26500]
- )
-)
-Layer(3 "outline")
-(
- Attribute("PCB::skip-drc" "1")
- Line[0 0 125000 0 1000 2000 "lock"]
- Line[125000 0 125000 125000 1000 2000 "lock"]
- Line[125000 125000 0 125000 1000 2000 "lock"]
- Line[0 125000 0 0 1000 2000 "lock"]
-)
-Layer(4 "silk")
-(
-)
-Layer(5 "silk")
-(
-)
-NetList()
-(
- Net("+5V" "(unknown)")
- (
- Connect("C6-2")
- Connect("C7-2")
- Connect("R25-2")
- Connect("U3-7")
- Connect("U3-8")
- Connect("U4-1")
- )
- Net("accel" "(unknown)")
- (
- Connect("C13-2")
- Connect("J20-15")
- Connect("R10-1")
- Connect("R11-2")
- )
- Net("accel_ref" "(unknown)")
- (
- Connect("J20-16")
- Connect("R25-1")
- Connect("R26-2")
- )
- Net("GND" "(unknown)")
- (
- Connect("C6-1")
- Connect("C7-1")
- Connect("C8-1")
- Connect("C13-1")
- Connect("C14-1")
- Connect("C16-1")
- Connect("J9-1")
- Connect("J20-1")
- Connect("J20-7")
- Connect("R11-1")
- Connect("R26-1")
- Connect("U3-3")
- Connect("U3-4")
- Connect("U4-4")
- )
- Net("unnamed_net1" "(unknown)")
- (
- Connect("R10-2")
- Connect("U3-6")
- )
- Net("unnamed_net2" "(unknown)")
- (
- Connect("C8-2")
- Connect("U4-3")
- )
- Net("unnamed_net3" "(unknown)")
- (
- Connect("C15-1")
- Connect("U4-5")
- )
- Net("unnamed_net4" "(unknown)")
- (
- Connect("C15-2")
- Connect("U4-7")
- )
- Net("unnamed_net5" "(unknown)")
- (
- Connect("C14-2")
- Connect("U4-8")
- )
- Net("v_lipo" "(unknown)")
- (
- Connect("C16-2")
- Connect("J9-8")
- Connect("U4-2")
- Connect("U4-6")
- )
-)
+++ /dev/null
-v 20110115 2
-C 40000 40000 0 0 0 title-C-bdale.sym
-T 40000 40000 8 10 1 1 0 0 1
-value=270
-T 40000 40000 8 10 1 1 0 0 1
-netname=3.3V
-T 54700 41800 9 30 1 0 0 0 1
-MegaMetrum Accel Daughter
-T 13300 -8600 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T 13300 -8600 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T 60400 40400 9 10 1 0 0 0 1
-0.1
-T 58000 40400 9 10 1 0 0 0 1
-1
-T 58600 40400 9 10 1 0 0 0 1
-1
-T 55700 40400 9 10 1 0 0 0 1
-megadaughter.sch
-T 55700 40100 9 10 1 0 0 0 1
-http://altusmetrum.com/
-C 54400 51600 1 0 0 gnd.sym
-C 57300 51800 1 90 0 capacitor.sym
-{
-T 56600 52000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 57500 52500 5 10 1 1 180 0 1
-refdes=C13
-T 56400 52000 5 10 0 0 90 0 1
-symversion=0.1
-T 57200 52000 5 10 1 1 0 0 1
-value=0.1uF
-T 57300 51800 5 10 0 1 0 0 1
-vendor_part_number=399-3027-1-ND
-T 57300 51800 5 10 0 0 0 0 1
-footprint=0402
-T 57300 51800 5 10 0 0 0 0 1
-vendor=digikey
-T 57300 51800 5 10 0 1 0 0 1
-loadstatus=smt
-}
-C 57000 51500 1 0 0 gnd.sym
-N 55300 53600 56000 53600 4
-T 13300 -8600 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T 13300 -8600 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-C 50100 51800 1 90 0 capacitor.sym
-{
-T 49400 52000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 50600 52600 5 10 1 1 180 0 1
-refdes=C7
-T 49200 52000 5 10 0 0 90 0 1
-symversion=0.1
-T 50100 51795 5 10 0 1 90 0 1
-footprint=0402
-T 50100 51900 5 10 1 1 0 0 1
-value=4.7uF
-T 50100 51800 5 10 0 1 0 0 1
-vendor_part_number=490-5408-1-ND
-T 50100 51800 5 10 0 0 0 0 1
-vendor=digikey
-T 50100 51800 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 49900 53600 49900 52700 4
-C 49700 53600 1 0 0 5V-plus.sym
-C 56100 52700 1 90 0 resistor.sym
-{
-T 55700 53000 5 10 0 0 90 0 1
-device=RESISTOR
-T 56700 53400 5 10 1 1 180 0 1
-refdes=R10
-T 56100 52695 5 10 0 1 90 0 1
-footprint=0402
-T 56200 52900 5 10 1 1 0 0 1
-value=5k
-T 56100 52700 5 10 0 1 0 0 1
-vendor_part_number=311-5.10KLRCT-ND
-T 56100 52700 5 10 0 0 0 0 1
-vendor=digikey
-T 56100 52700 5 10 0 1 0 0 1
-loadstatus=smt
-}
-C 56100 51800 1 90 0 resistor.sym
-{
-T 55700 52100 5 10 0 0 90 0 1
-device=RESISTOR
-T 56700 52500 5 10 1 1 180 0 1
-refdes=R11
-T 56100 51795 5 10 0 1 90 0 1
-footprint=0402
-T 56200 52000 5 10 1 1 0 0 1
-value=10k
-T 56100 51800 5 10 0 1 0 0 1
-vendor_part_number=RMCF1/16S10K1%RCT-ND
-T 56100 51800 5 10 0 0 0 0 1
-vendor=digikey
-T 56100 51800 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 56000 52700 58200 52700 4
-{
-T 57700 52800 5 10 1 1 0 0 1
-netname=accel
-}
-C 55900 51500 1 0 0 gnd.sym
-C 48100 51800 1 90 0 capacitor.sym
-{
-T 47400 52000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 48600 52600 5 10 1 1 180 0 1
-refdes=C8
-T 47200 52000 5 10 0 0 90 0 1
-symversion=0.1
-T 48100 51795 5 10 0 1 90 0 1
-footprint=0402
-T 48100 51900 5 10 1 1 0 0 1
-value=0.001uF
-T 48100 51800 5 10 0 1 0 0 1
-vendor_part_number=445-2651-1-ND
-T 48100 51800 5 10 0 0 0 0 1
-vendor=digikey
-T 48100 51800 5 10 0 1 0 0 1
-loadstatus=smt
-}
-C 45900 54700 1 0 0 capacitor.sym
-{
-T 46100 55400 5 10 0 0 0 0 1
-device=CAPACITOR
-T 45700 55100 5 10 1 1 0 0 1
-refdes=C15
-T 46100 55600 5 10 0 0 0 0 1
-symversion=0.1
-T 45895 54700 5 10 0 1 0 0 1
-footprint=0402
-T 46500 55100 5 10 1 1 0 0 1
-value=0.22uF
-T 45900 54700 5 10 0 1 0 0 1
-vendor_part_number=587-1228-1-ND
-T 45900 54700 5 10 0 0 0 0 1
-vendor=digikey
-T 45900 54700 5 10 0 1 0 0 1
-loadstatus=smt
-}
-C 44800 51800 1 90 0 capacitor.sym
-{
-T 44100 52000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 44400 52600 5 10 1 1 180 0 1
-refdes=C16
-T 43900 52000 5 10 0 0 90 0 1
-symversion=0.1
-T 44800 51795 5 10 0 1 90 0 1
-footprint=0402
-T 43900 51900 5 10 1 1 0 0 1
-value=4.7uF
-T 44800 51800 5 10 0 1 0 0 1
-vendor_part_number=490-5408-1-ND
-T 44800 51800 5 10 0 0 0 0 1
-vendor=digikey
-T 44800 51800 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 47800 53600 53000 53600 4
-N 45800 54500 45800 54900 4
-N 47000 54500 47000 54900 4
-C 46100 51300 1 0 0 gnd.sym
-N 46200 51600 46200 52300 4
-N 45000 53200 44600 53200 4
-N 44600 52700 44600 53600 4
-T 55900 54100 9 10 1 0 0 0 2
-Accelerometer runs on 5V,
-divider to match ADC range.
-C 45000 52300 1 0 0 LTC1682-5.sym
-{
-T 45395 54295 5 10 1 1 0 0 1
-refdes=U4
-T 45795 53495 5 10 0 1 0 0 1
-device=IC
-T 44995 52295 5 10 0 1 0 0 1
-footprint=SO8
-T 45000 52300 5 10 0 1 0 0 1
-vendor_part_number=LTC1682CS8-5#PBF-ND
-T 45000 52300 5 10 0 0 0 0 1
-vendor=digikey
-T 45800 53700 5 10 1 1 0 0 1
-value=LTC1682-5
-T 45000 52300 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 45800 54900 45900 54900 4
-N 46800 54900 47000 54900 4
-N 47900 51800 47900 51700 4
-N 47800 52800 47900 52800 4
-N 47900 52800 47900 52700 4
-C 49100 51800 1 90 0 capacitor.sym
-{
-T 48400 52000 5 10 0 0 90 0 1
-device=CAPACITOR
-T 49600 52600 5 10 1 1 180 0 1
-refdes=C14
-T 48200 52000 5 10 0 0 90 0 1
-symversion=0.1
-T 49100 51795 5 10 0 1 90 0 1
-footprint=0402
-T 49100 51900 5 10 1 1 0 0 1
-value=4.7uF
-T 49100 51800 5 10 0 1 0 0 1
-vendor_part_number=490-5408-1-ND
-T 49100 51800 5 10 0 0 0 0 1
-vendor=digikey
-T 49100 51800 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 47800 53200 48900 53200 4
-N 48900 53200 48900 52700 4
-N 48900 51700 48900 51800 4
-N 46200 51700 49900 51700 4
-N 49900 51700 49900 51800 4
-N 44600 51800 44600 51700 4
-N 44600 51700 46200 51700 4
-C 51700 52200 1 90 0 capacitor.sym
-{
-T 51000 52400 5 10 0 0 90 0 1
-device=CAPACITOR
-T 51300 52900 5 10 1 1 180 0 1
-refdes=C6
-T 50800 52400 5 10 0 0 90 0 1
-symversion=0.1
-T 50900 52300 5 10 1 1 0 0 1
-value=0.1uF
-T 51700 52200 5 10 0 0 0 0 1
-footprint=0402
-T 51700 52200 5 10 0 0 0 0 1
-vendor_part_number=399-3027-1-ND
-T 51700 52200 5 10 0 0 0 0 1
-vendor=digikey
-T 51700 52200 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 51500 53100 51500 53600 4
-C 51400 51900 1 0 0 gnd.sym
-N 43700 53600 45000 53600 4
-{
-T 43700 53700 5 10 1 1 0 0 1
-netname=v_lipo
-}
-N 53000 52400 52700 52400 4
-N 52700 52400 52700 51900 4
-N 52700 51900 54500 51900 4
-C 56100 50000 1 90 0 resistor.sym
-{
-T 55700 50300 5 10 0 0 90 0 1
-device=RESISTOR
-T 56700 50700 5 10 1 1 180 0 1
-refdes=R25
-T 56100 49995 5 10 0 1 90 0 1
-footprint=0402
-T 56200 50200 5 10 1 1 0 0 1
-value=5.6k
-T 56100 50000 5 10 0 1 0 0 1
-vendor_part_number=P5.60KLCT-ND
-T 56100 50000 5 10 0 0 0 0 1
-vendor=digikey
-T 56100 50000 5 10 0 1 0 0 1
-loadstatus=smt
-}
-C 56100 49100 1 90 0 resistor.sym
-{
-T 55700 49400 5 10 0 0 90 0 1
-device=RESISTOR
-T 56700 49800 5 10 1 1 180 0 1
-refdes=R26
-T 56100 49095 5 10 0 1 90 0 1
-footprint=0402
-T 56200 49300 5 10 1 1 0 0 1
-value=10k
-T 56100 49100 5 10 0 1 0 0 1
-vendor_part_number=RMCF1/16S10K1%RCT-ND
-T 56100 49100 5 10 0 0 0 0 1
-vendor=digikey
-T 56100 49100 5 10 0 1 0 0 1
-loadstatus=smt
-}
-N 56000 50000 57600 50000 4
-{
-T 56800 50100 5 10 1 1 0 0 1
-netname=accel_ref
-}
-C 55900 48800 1 0 0 gnd.sym
-N 52200 53600 52200 50900 4
-N 52200 50900 56000 50900 4
-C 53000 51900 1 0 0 ADXL78.sym
-{
-T 53795 53895 5 10 0 1 0 0 1
-device=IC
-T 53295 54195 5 10 1 1 0 0 1
-refdes=U3
-T 52995 51895 5 10 0 1 0 0 1
-footprint=ADXL78
-T 53000 51900 5 10 0 0 0 0 1
-loadstatus=smt
-T 53000 51900 5 10 0 0 0 0 1
-vendor=digikey
-T 53000 51900 5 10 0 1 0 0 1
-vendor_part_number=AD22281-R2CT-ND
-T 54300 54200 5 10 1 1 0 0 1
-value=ADXL78
-}
-N 53000 53200 52700 53200 4
-N 52700 53200 52700 53600 4
-T -36300 -60600 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -36300 -60600 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -36300 -60600 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -36300 -60600 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-C 50300 46400 1 0 0 gnd.sym
-N 50700 43900 49000 43900 4
-{
-T 49000 44000 5 10 1 1 0 0 1
-netname=v_lipo
-}
-N 50400 46700 50700 46700 4
-C 45000 47800 1 0 0 gnd.sym
-C 50700 43800 1 0 0 conn-8.sym
-{
-T 51055 46895 5 10 1 1 0 0 1
-refdes=J9
-T 50600 43600 5 10 1 1 0 0 1
-value=Companion
-T 50700 43800 5 10 0 0 0 0 1
-loadstatus=throughhole
-T 50700 43800 5 10 0 0 0 0 1
-vendor=digikey
-T 50700 43800 5 10 0 0 0 0 1
-vendor_part_number=A99436CT-ND
-T 50700 43800 5 10 0 0 0 0 1
-footprint=0-338068-8
-T 50700 43800 5 10 0 1 0 0 1
-device=CONNECTOR
-}
-T 44200 46800 9 10 1 0 90 0 2
-bootloader
- support
-L 44300 46300 43800 46300 3 0 0 0 -1 -1
-C 45300 45400 1 0 0 gnd.sym
-L 44300 43500 43800 43500 3 0 0 0 -1 -1
-T 44100 44500 9 10 1 0 90 0 1
-JTAG
-N 45400 45700 45100 45700 4
-C 45100 42000 1 0 1 conn-16.sym
-{
-T 44745 48295 5 10 1 1 0 6 1
-refdes=J20
-T 44400 41800 5 10 1 1 0 0 1
-value=misc
-T 45100 42000 5 10 0 1 0 0 1
-device=CONNECTOR
-T 45100 42000 5 10 0 1 0 0 1
-footprint=1-338068-6
-T 45100 42000 5 10 0 1 0 0 1
-loadstatus=throughhole
-T 45100 42000 5 10 0 1 0 0 1
-vendor=digikey
-T 45100 42000 5 10 0 1 0 0 1
-vendor_part_number=A99501CT-ND
-}
-T 44100 43000 9 10 1 0 90 0 1
-i2c
-T 44100 42100 9 10 1 0 90 0 1
-gpio
-L 44300 42700 43800 42700 3 0 0 0 -1 -1
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -27500 -48700 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -76800 -99800 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -76800 -99800 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -76800 -99800 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -76800 -99800 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -52500 -75800 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -52500 -75800 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-T -52500 -75800 8 10 0 1 0 0 1
-vendor_part_number=MMA7260QT-ND
-T -52500 -75800 8 10 0 1 0 0 1
-vendor_part_number=MCP9700-E/TO-ND
-N 45100 42100 46500 42100 4
-{
-T 45700 42200 5 10 1 1 0 0 1
-netname=accel_ref
-}
-N 45100 42500 46500 42500 4
-{
-T 46000 42600 5 10 1 1 0 0 1
-netname=accel
-}
# List all the schematics to be netlisted and laid out on the pc board
-schematics megadaughter.sch
+schematics megaaccel.sch
# for an output-name of foo, gsch2pcb generates files foo.net, foo.pcb,
# and foo.new.pcb. if there is no output name specified, the file names
# are derived from the first listed schematic...
-output-name megadaughter
+output-name megaaccel
elements-dir ../bdale/pkg
elements-dir /usr/share/pcb
projects / hw / megaaccel / commitdiff