From 37f4911a73c53a27de8e5efca9132a2c81734638 Mon Sep 17 00:00:00 2001 From: Bdale Garbee Date: Thu, 19 Apr 2012 22:38:13 -0600 Subject: [PATCH] change the name from MegaDaughter to MegaAccel --- Makefile | 48 +++++++++++++++---------------- megadaughter.pcb => megaaccel.pcb | 6 ++-- megadaughter.sch => megaaccel.sch | 2 +- project | 4 +-- 4 files changed, 30 insertions(+), 30 deletions(-) rename megadaughter.pcb => megaaccel.pcb (99%) rename megadaughter.sch => megaaccel.sch (99%) diff --git a/Makefile b/Makefile index b2d86b3..7b371f0 100644 --- a/Makefile +++ b/Makefile @@ -1,22 +1,22 @@ # intentionally want to rebuild drc and bom on every invocation all: drc partslist partslist.csv pcb -drc: megadaughter.sch Makefile - -gnetlist -g drc2 megadaughter.sch -o megadaughter.drc - -partslist: megadaughter.sch Makefile - gnetlist -g bom -o megadaughter.unsorted megadaughter.sch - head -n1 megadaughter.unsorted > partslist - tail -n+2 megadaughter.unsorted | sort >> partslist - rm -f megadaughter.unsorted - -partslist.csv: megadaughter.sch Makefile - gnetlist -g partslistgag -o megadaughter.unsorted megadaughter.sch - head -n1 megadaughter.unsorted > partslist.csv - tail -n+2 megadaughter.unsorted | sort -t \, -k 8 >> partslist.csv - rm -f megadaughter.unsorted - -pcb: megadaughter.sch project Makefile +drc: megaaccel.sch Makefile + -gnetlist -g drc2 megaaccel.sch -o megaaccel.drc + +partslist: megaaccel.sch Makefile + gnetlist -g bom -o megaaccel.unsorted megaaccel.sch + head -n1 megaaccel.unsorted > partslist + tail -n+2 megaaccel.unsorted | sort >> partslist + rm -f megaaccel.unsorted + +partslist.csv: megaaccel.sch Makefile + gnetlist -g partslistgag -o megaaccel.unsorted megaaccel.sch + head -n1 megaaccel.unsorted > partslist.csv + tail -n+2 megaaccel.unsorted | sort -t \, -k 8 >> partslist.csv + rm -f megaaccel.unsorted + +pcb: megaaccel.sch project Makefile gsch2pcb project # note that 'gschlas -e foo.sch' will embed all symbols in the schematic, this @@ -34,17 +34,17 @@ pcb: megadaughter.sch project Makefile push: git push --mirror -megadaughter.xy: megadaughter.pcb - pcb -x bom megadaughter.pcb +megaaccel.xy: megaaccel.pcb + pcb -x bom megaaccel.pcb -megadaughter.bottom.gbr: megadaughter.pcb - pcb -x gerber megadaughter.pcb +megaaccel.bottom.gbr: megaaccel.pcb + pcb -x gerber megaaccel.pcb -zip: megadaughter.bottom.gbr megadaughter.bottommask.gbr megadaughter.fab.gbr megadaughter.top.gbr megadaughter.topmask.gbr megadaughter.toppaste.gbr megadaughter.topsilk.gbr megadaughter.plated-drill.cnc megadaughter.xy Makefile # megadaughter.xls - zip megadaughter.zip megadaughter.*.gbr megadaughter.*.cnc megadaughter.xy # megadaughter.xls +zip: megaaccel.bottom.gbr megaaccel.bottommask.gbr megaaccel.fab.gbr megaaccel.top.gbr megaaccel.topmask.gbr megaaccel.toppaste.gbr megaaccel.topsilk.gbr megaaccel.plated-drill.cnc megaaccel.xy Makefile # megaaccel.xls + zip megaaccel.zip megaaccel.*.gbr megaaccel.*.cnc megaaccel.xy # megaaccel.xls clean: - rm -f *.bom *.drc *.log *~ megadaughter.ps *.gbr *.cnc *bak* *- *.zip + rm -f *.bom *.drc *.log *~ megaaccel.ps *.gbr *.cnc *bak* *- *.zip rm -f *.net *.xy *.cmd *.png partslist partslist.csv - rm -f *.partslist *.new.pcb *.unsorted megadaughter.xls + rm -f *.partslist *.new.pcb *.unsorted megaaccel.xls diff --git a/megadaughter.pcb b/megaaccel.pcb similarity index 99% rename from megadaughter.pcb rename to megaaccel.pcb index 1c55210..f1c9a1f 100644 --- a/megadaughter.pcb +++ b/megaaccel.pcb @@ -3,10 +3,10 @@ # To read pcb files, the pcb version (or the git source date) must be >= the file version FileVersion[20070407] -PCB["MegaMetrum" 125000 125000] +PCB["MegaAccel" 125000 125000] Grid[100.0 0 0 0] -Cursor[500 21300 0.000000] +Cursor[1000 900 0.000000] PolyArea[200000000.000000] Thermal[0.500000] DRC[600 1000 600 500 1500 700] @@ -1066,7 +1066,7 @@ Layer(1 "top") Line[64900 59100 82300 59100 1000 2000 "clearline"] Line[82300 59100 84900 56500 1000 2000 "clearline"] Text[111649 24263 3 100 "` 2012 Bdale Garbee KB0G" ""] - Text[123400 24400 3 150 "MegaDaughter v0.1" "clearline"] + Text[123200 32100 3 150 "MegaAccel v0.1" "clearline"] ) Layer(2 "bottom") ( diff --git a/megadaughter.sch b/megaaccel.sch similarity index 99% rename from megadaughter.sch rename to megaaccel.sch index 9f90d92..aa6ce54 100644 --- a/megadaughter.sch +++ b/megaaccel.sch @@ -17,7 +17,7 @@ T 58000 40400 9 10 1 0 0 0 1 T 58600 40400 9 10 1 0 0 0 1 1 T 55700 40400 9 10 1 0 0 0 1 -megadaughter.sch +megaaccel.sch T 55700 40100 9 10 1 0 0 0 1 http://altusmetrum.com/ C 54400 51600 1 0 0 gnd.sym diff --git a/project b/project index 7b99846..b737a60 100644 --- a/project +++ b/project @@ -1,10 +1,10 @@ # List all the schematics to be netlisted and laid out on the pc board -schematics megadaughter.sch +schematics megaaccel.sch # for an output-name of foo, gsch2pcb generates files foo.net, foo.pcb, # and foo.new.pcb. if there is no output name specified, the file names # are derived from the first listed schematic... -output-name megadaughter +output-name megaaccel elements-dir ../bdale/pkg elements-dir /usr/share/pcb -- 2.30.2