description2-channel timer with tilt limits
ownerBdale Garbee
last changeThu, 16 Mar 2023 17:50:49 +0000 (11:50 -0600)
2023-03-16 Bdale Garbeebe explicit about 5V pin on USB connector being a no... master fab-v2p2
2023-03-16 Bdale Garbeedeclare p2 in the silk, tweak copper to improve DRC... shift-spi0
2023-03-16 Keith PackardShift SPI0 pins to correct alignment
2023-03-06 Bdale Garbeeroute complete and drc clean-ish after reducing vias... fab-v2p1
2023-03-05 Bdale Garbeeeliminate vias under chips with bottom copper
2023-03-04 Bdale Garbeesnapshot before working on under-samd21 vias
2023-03-04 Bdale Garbeeadd explicit NC symbols on schematic, 'p1' in silk...
2023-03-03 Bdale Garbeeroute complete, could use copper tweaking
2023-02-23 Bdale Garbeework in progress
2023-02-21 Bdale Garbeeworking on layout .. much left to do
2023-02-07 Bdale Garbeefirst cut at pulling v2 parts together
2022-12-07 Bdale Garbeework in progress
2022-11-07 Bdale Garbeeforward annotate additional bypass caps, etc, to incomp...
2022-11-07 Bdale Garbeeadd bypass caps for 3.3V rail, and fix VDDCORE connection
2022-09-30 Bdale Garbeework in process
2022-07-03 Bdale Garbeeuse IMU parts we can actually get
8 months ago fab-v2p2
9 months ago fab-v2p1
3 years ago fab-v1
8 months ago master
8 months ago shift-spi0