FreeRTOS: Fix thread reg list for Cortex-M7
authorFrank Dischner <frank.dischner@gmail.com>
Thu, 21 Apr 2022 02:49:44 +0000 (21:49 -0500)
committerAntonio Borneo <borneo.antonio@gmail.com>
Tue, 13 Sep 2022 22:20:04 +0000 (22:20 +0000)
This updates the FreeRTOS module to use the M4F FPU stacking also for the
FPV5_SP and FPV5_DP FPUs, which are found on the Cortex-M7. The FPUs are
in fact different than the FPV4_SP found on the M4, but the register
stacking is the same.

Signed-off-by: Frank Dischner <frank.dischner@gmail.com>
Change-Id: I74c45d2cfb55f55e6c557f2450068ad3c2fe9497
Reviewed-on: https://review.openocd.org/c/openocd/+/6939
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/rtos/FreeRTOS.c

index afea9db90c89509be0cee9dadfa2abae01700e32..583e2f752e2c36613297bdcebbd0cea36af1b09c 100644 (file)
@@ -437,7 +437,8 @@ static int freertos_get_thread_reg_list(struct rtos *rtos, int64_t thread_id,
        int cm4_fpu_enabled = 0;
        struct armv7m_common *armv7m_target = target_to_armv7m(rtos->target);
        if (is_armv7m(armv7m_target)) {
-               if (armv7m_target->fp_feature == FPV4_SP) {
+               if ((armv7m_target->fp_feature == FPV4_SP) || (armv7m_target->fp_feature == FPV5_SP) ||
+                               (armv7m_target->fp_feature == FPV5_DP)) {
                        /* Found ARM v7m target which includes a FPU */
                        uint32_t cpacr;