The desired SPI mode comes in 'spi_index' and needs
to be split out before spi_index is used for pin configuration.
Signed-off-by: Keith Packard <keithp@keithp.com>
#define AO_SPI_INDEX(id) ((id) & AO_SPI_INDEX_MASK)
#define AO_SPI_CONFIG(id) ((id) & AO_SPI_CONFIG_MASK)
#define AO_SPI_INDEX(id) ((id) & AO_SPI_INDEX_MASK)
#define AO_SPI_CONFIG(id) ((id) & AO_SPI_CONFIG_MASK)
+#define AO_SPI_PIN_CONFIG(id) ((id) & (AO_SPI_INDEX_MASK | AO_SPI_CONFIG_MASK))
#define AO_SPI_CPOL_BIT 4
#define AO_SPI_CPHA_BIT 5
#define AO_SPI_CPOL_BIT 4
#define AO_SPI_CPHA_BIT 5
};
static uint8_t ao_spi_mutex[STM_NUM_SPI];
};
static uint8_t ao_spi_mutex[STM_NUM_SPI];
-static uint8_t ao_spi_index[STM_NUM_SPI];
+static uint8_t ao_spi_pin_config[STM_NUM_SPI];
static const struct ao_spi_stm_info ao_spi_stm_info[STM_NUM_SPI] = {
{
static const struct ao_spi_stm_info ao_spi_stm_info[STM_NUM_SPI] = {
{
-ao_spi_disable_index(uint8_t spi_index)
+ao_spi_disable_pin_config(uint8_t spi_pin_config)
- /* Disable current config
+ switch (spi_pin_config) {
case AO_SPI_1_PA5_PA6_PA7:
stm_gpio_set(&stm_gpioa, 5, 1);
stm_moder_set(&stm_gpioa, 5, STM_MODER_OUTPUT);
case AO_SPI_1_PA5_PA6_PA7:
stm_gpio_set(&stm_gpioa, 5, 1);
stm_moder_set(&stm_gpioa, 5, STM_MODER_OUTPUT);
-ao_spi_enable_index(uint8_t spi_index)
+ao_spi_enable_pin_config(uint8_t spi_pin_config)
+ /* Disable current config
+ */
+ switch (spi_pin_config) {
case AO_SPI_1_PA5_PA6_PA7:
stm_afr_set(&stm_gpioa, 5, STM_AFR_AF0);
stm_afr_set(&stm_gpioa, 6, STM_AFR_AF0);
case AO_SPI_1_PA5_PA6_PA7:
stm_afr_set(&stm_gpioa, 5, STM_AFR_AF0);
stm_afr_set(&stm_gpioa, 6, STM_AFR_AF0);
static void
ao_spi_config(uint8_t spi_index, uint32_t speed)
{
static void
ao_spi_config(uint8_t spi_index, uint32_t speed)
{
+ uint8_t spi_pin_config = AO_SPI_PIN_CONFIG(spi_index);
uint8_t id = AO_SPI_INDEX(spi_index);
struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi;
uint8_t id = AO_SPI_INDEX(spi_index);
struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi;
- if (spi_index != ao_spi_index[id]) {
+ if (spi_pin_config != ao_spi_pin_config[id]) {
- ao_spi_disable_index(ao_spi_index[id]);
+ ao_spi_disable_pin_config(ao_spi_pin_config[id]);
- ao_spi_enable_index(spi_index);
+ ao_spi_enable_pin_config(spi_pin_config);
/* Remember current config
*/
/* Remember current config
*/
- ao_spi_index[id] = spi_index;
+ ao_spi_pin_config[id] = spi_pin_config;
}
stm_spi->cr2 = SPI_CR2;
stm_spi->cr1 = ((0 << STM_SPI_CR1_BIDIMODE) | /* Three wire mode */
}
stm_spi->cr2 = SPI_CR2;
stm_spi->cr1 = ((0 << STM_SPI_CR1_BIDIMODE) | /* Three wire mode */
uint8_t id = AO_SPI_INDEX(spi_index);
struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi;
uint8_t id = AO_SPI_INDEX(spi_index);
struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi;
- ao_spi_disable_index(spi_index);
+ ao_spi_disable_pin_config(AO_SPI_PIN_CONFIG(spi_index));
stm_spi->cr1 = 0;
stm_spi->cr2 = SPI_CR2_SYNC;
stm_spi->cr1 = 0;
stm_spi->cr2 = SPI_CR2_SYNC;
stm_ospeedr_set(&stm_gpiob, 5, SPI_1_OSPEEDR);
# endif
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SPI1EN);
stm_ospeedr_set(&stm_gpiob, 5, SPI_1_OSPEEDR);
# endif
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SPI1EN);
- ao_spi_index[0] = AO_SPI_CONFIG_NONE;
+ ao_spi_pin_config[0] = AO_SPI_CONFIG_NONE;
ao_spi_channel_init(STM_SPI_INDEX(1));
#endif
ao_spi_channel_init(STM_SPI_INDEX(1));
#endif