altos/lpc: Add casts to reduce -Wconversion warnings
authorKeith Packard <keithp@keithp.com>
Thu, 17 Feb 2022 01:49:42 +0000 (17:49 -0800)
committerKeith Packard <keithp@keithp.com>
Thu, 17 Feb 2022 01:49:42 +0000 (17:49 -0800)
Most of these were caused by int/long mixes as uint32_t is 'long' on
arm for reasons, meaning that bare int constants need to be cast to
avoid a warning.

No bugs identified.

Signed-off-by: Keith Packard <keithp@keithp.com>
src/lpc/ao_adc_lpc.c
src/lpc/ao_arch_funcs.h
src/lpc/ao_beep_lpc.c
src/lpc/ao_exti_lpc.c
src/lpc/ao_flash_lpc.c
src/lpc/ao_serial_lpc.c
src/lpc/ao_spi_lpc.c
src/lpc/ao_timer_lpc.c
src/lpc/ao_usb_lpc.c
src/lpc/lpc.h

index 6324155977a7a4a538bf3cdbd051e274fae42a33..c5a703c23da26fd19cb4c747534c95b6f7849fec 100644 (file)
@@ -92,7 +92,7 @@ static const uint8_t  ao_adc_mask_seq[AO_ADC_NUM] = {
 #define sample(id)     (*out++ = (uint16_t) lpc_adc.dr[id] >> 1)
 
 static inline void lpc_adc_start(void) {
-       lpc_adc.cr = ((ao_adc_mask_seq[ao_adc_sequence] << LPC_ADC_CR_SEL) |
+       lpc_adc.cr = (((uint32_t) ao_adc_mask_seq[ao_adc_sequence] << LPC_ADC_CR_SEL) |
                      (AO_ADC_CLKDIV << LPC_ADC_CR_CLKDIV) |
                      (0 << LPC_ADC_CR_BURST) |
                      (LPC_ADC_CR_CLKS_11 << LPC_ADC_CR_CLKS) |
@@ -160,7 +160,7 @@ void
 ao_adc_init(void)
 {
        lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_ADC);
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_ADC_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_ADC_PD);
 
        /* Enable interrupt when channel is complete */
        lpc_adc.inten = (1 << LPC_ADC_INTEN_ADGINTEN);
index e0280e76466a2f6e4a1752478b828c743de33e6d..e88b0141f9ad7c37ea8785e448d9a59411b142f7 100644 (file)
@@ -23,7 +23,7 @@
 #define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,(1<<bit),bus)
 
 #define ao_enable_port(port) (lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
-#define ao_disable_port(port) (lpc_scb.sysahbclkctrl &= ~(1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
+#define ao_disable_port(port) (lpc_scb.sysahbclkctrl &= ~(1UL << LPC_SCB_SYSAHBCLKCTRL_GPIO))
 
 #define lpc_all_bit(port,bit)  (((port) << 5) | (bit))
 
@@ -65,7 +65,7 @@ static inline void lpc_set_gpio(int port, int bit) {
 #define ao_enable_input(port,bit,mode) do {                            \
                ao_enable_port(port);                                   \
                lpc_set_gpio(port,bit);                                 \
-               lpc_gpio.dir[port] &= ~(1 << bit);                      \
+               lpc_gpio.dir[port] &= ~(1UL << bit);                    \
                ao_gpio_set_mode(port,bit,mode);                        \
        } while (0)
 
@@ -80,7 +80,7 @@ static inline void lpc_set_gpio(int port, int bit) {
 
 #define ao_enable_analog(port,bit,id) do {                             \
                ao_enable_port(port);                                   \
-               lpc_gpio.dir[port] &= ~(1 << bit);                      \
+               lpc_gpio.dir[port] &= ~(1UL << bit);                    \
                lpc_ioconf.analog_reg(port,bit) = ((analog_func(id) << LPC_IOCONF_FUNC) | \
                                                   (0 << LPC_IOCONF_ADMODE)); \
        } while (0)
index ab06ef48776be45260add4fe20242114b1ba5f6c..13aa337445e9f74b0c90e63c68f47f60c5ee95d7 100644 (file)
@@ -24,7 +24,7 @@ ao_beep(uint8_t beep)
        if (beep == 0) {
                lpc_ct32b1.tcr = ((0 << LPC_CT32B_TCR_CEN) |
                                  (1 << LPC_CT32B_TCR_CRST));
-               lpc_scb.sysahbclkctrl &= ~(1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
+               lpc_scb.sysahbclkctrl &= ~(1UL << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
        } else {
                lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
 
index 12016072f7037e625c5006708fc4c39f507ee88f..5722e17d2b887400ae83df7db76de08d9d38d802 100644 (file)
@@ -53,7 +53,7 @@ pin_isr(5)
 pin_isr(6)
 pin_isr(7)
 
-#define pin_id(port,pin)       ((port) * 24 + (pin));
+#define pin_id(port,pin)       ((uint8_t) ((port) * 24 + (pin)))
 
 static void
 _ao_exti_set_enable(uint8_t pint)
@@ -83,7 +83,7 @@ void
 ao_exti_setup (uint8_t port, uint8_t pin, uint8_t mode, void (*callback)(void)) {
        uint8_t         id = pin_id(port,pin);
        uint8_t         pint;
-       uint32_t        mask;
+       uint8_t         mask;
        uint8_t         prio;
 
        for (pint = 0; pint < LPC_NUM_PINT; pint++)
@@ -98,7 +98,7 @@ ao_exti_setup (uint8_t port, uint8_t pin, uint8_t mode, void (*callback)(void))
        ao_arch_block_interrupts();
        mask = (1 << pint);
        ao_pint_inuse |= mask;
-       ao_pint_enabled &= ~mask;
+       ao_pint_enabled &= (uint8_t) ~mask;
 
        ao_pint_map[id] = pint;
        ao_exti_callback[pint] = callback;
@@ -109,7 +109,7 @@ ao_exti_setup (uint8_t port, uint8_t pin, uint8_t mode, void (*callback)(void))
        /* Set edge triggered */
        lpc_gpio_pin.isel &= ~mask;
 
-       ao_pint_enabled &= ~mask;
+       ao_pint_enabled &= (uint8_t) ~mask;
        ao_pint_mode[pint] = mode;
        _ao_exti_set_enable(pint);
 
@@ -167,7 +167,7 @@ ao_exti_disable(uint8_t port, uint8_t pin) {
        uint8_t         mask = 1 << pint;
 
        ao_arch_block_interrupts();
-       ao_pint_enabled &= ~mask;
+       ao_pint_enabled &= (uint8_t) ~mask;
        _ao_exti_set_enable(pint);
        ao_arch_release_interrupts();
 }
index cb1a060668a173ba6e1c4634c26b8ba887924065..37913091ae7f50796eaf04ae105ef07528b87766 100644 (file)
@@ -76,7 +76,7 @@ static uint32_t       iap_in[5], iap_out[5];
 static uint32_t
 ao_lpc_addr_to_sector(uint8_t *addr)
 {
-       uint32_t        off = addr - LPC_FLASH_BASE;
+       uint32_t        off = (uint32_t) (addr - LPC_FLASH_BASE);
 
        return off >> LPC_FLASH_SECTOR_SHIFT;
 }
@@ -84,7 +84,7 @@ ao_lpc_addr_to_sector(uint8_t *addr)
 static uint8_t
 ao_lpc_addr_is_sector_aligned(uint8_t *addr)
 {
-       uint32_t        off = addr - LPC_FLASH_BASE;
+       uint32_t        off = (uint32_t) (addr - LPC_FLASH_BASE);
        return          (off & LPC_FLASH_SECTOR_MASK) == 0;
 }
 
index d5cf930af949076bf2829c489f69ee2ea001178b..db0e0b0c55a3f2e22513439a4acf2a8a961b239c 100644 (file)
@@ -54,7 +54,7 @@ lpc_usart_isr(void)
        (void) lpc_usart.iir_fcr;
 
        while (lpc_usart.lsr & (1 << LPC_USART_LSR_RDR)) {
-               char c = lpc_usart.rbr_thr;
+               char c = (char) lpc_usart.rbr_thr;
                if (!ao_fifo_full(ao_usart_rx_fifo))
                        ao_fifo_insert(ao_usart_rx_fifo, c);
                wake_input = 1;
@@ -135,11 +135,11 @@ ao_serial0_set_speed(uint8_t speed)
        /* DL MSB */
        lpc_usart.ier = (ao_usart_speeds[speed].dl >> 8) & 0xff;
 
-       lpc_usart.fdr = ((ao_usart_speeds[speed].divaddval << LPC_USART_FDR_DIVADDVAL) |
-                        (ao_usart_speeds[speed].mulval << LPC_USART_FDR_MULVAL));
+       lpc_usart.fdr = (((uint32_t) ao_usart_speeds[speed].divaddval << LPC_USART_FDR_DIVADDVAL) |
+                        ((uint32_t) ao_usart_speeds[speed].mulval << LPC_USART_FDR_MULVAL));
 
        /* Turn access to divisor latches back off */
-       lpc_usart.lcr &= ~(1 << LPC_USART_LCR_DLAB);
+       lpc_usart.lcr &= ~(1UL << LPC_USART_LCR_DLAB);
 }
 
 void
index a8d4cda9229b32d176c480916ff39c55988af6ed..ec48e95c386eeec40a1f90b936606aa22193fede 100644 (file)
@@ -30,7 +30,7 @@ static struct lpc_ssp * const ao_lpc_ssp[LPC_NUM_SPI] = { &lpc_ssp0, &lpc_ssp1 }
                        while ((lpc_ssp->sr & (1 << LPC_SSP_SR_RNE)) == 0) \
                                ;                                       \
                        /* receive a byte */                            \
-                       get lpc_ssp->dr;                                \
+                       get (uint8_t) lpc_ssp->dr;                      \
                }                                                       \
                /* Wait for the SSP to go idle (it already should be) */ \
                while (lpc_ssp->sr & (1 << LPC_SSP_SR_BSY));            \
@@ -147,7 +147,7 @@ ao_spi_init(void)
        lpc_scb.ssp0clkdiv = 1;
 
        /* Reset the device */
-       lpc_scb.presetctrl &= ~(1 << LPC_SCB_PRESETCTRL_SSP0_RST_N);
+       lpc_scb.presetctrl &= ~(1UL << LPC_SCB_PRESETCTRL_SSP0_RST_N);
        lpc_scb.presetctrl |= (1 << LPC_SCB_PRESETCTRL_SSP0_RST_N);
        ao_spi_channel_init(0);
 #endif
@@ -197,7 +197,7 @@ ao_spi_init(void)
        lpc_scb.ssp1clkdiv = 1;
 
        /* Reset the device */
-       lpc_scb.presetctrl &= ~(1 << LPC_SCB_PRESETCTRL_SSP1_RST_N);
+       lpc_scb.presetctrl &= ~(1UL << LPC_SCB_PRESETCTRL_SSP1_RST_N);
        lpc_scb.presetctrl |= (1 << LPC_SCB_PRESETCTRL_SSP1_RST_N);
        ao_spi_channel_init(1);
 #endif /* HAS_SPI_1 */
index a334ee0d286f8b78fa57ed5a80720545d52e795c..7bd56445e8ba0599d4e92f9a0d309696ac5127d2 100644 (file)
@@ -121,13 +121,13 @@ ao_clock_init(void)
         * make sure the flash part remains happy
         */
 
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_BOD_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_BOD_PD);
        lpc_scb.bodctrl = ((LPC_SCB_BOD_BODRSTLEV_2_63 << LPC_SCB_BOD_BODRSTLEV) |
                           (LPC_SCB_BOD_BODINTVAL_RESERVED << LPC_SCB_BOD_BODINTVAL) |
                           (1 << LPC_SCB_BOD_BODRSTENA));
 
        /* Turn the IRC clock back on */
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_IRC_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_IRC_PD);
        ao_clock_delay();
 
        /* Switch to the IRC clock */
@@ -158,7 +158,7 @@ ao_clock_init(void)
 
        /* Set PLL divider values */
        lpc_scb.syspllctrl = ((AO_LPC_M << LPC_SCB_SYSPLLCTRL_MSEL) |
-                             (p << LPC_SCB_SYSPLLCTRL_PSEL));
+                             ((uint32_t) p << LPC_SCB_SYSPLLCTRL_PSEL));
 
        /* Turn off the external crystal clock */
        lpc_scb.pdruncfg |= (1 << LPC_SCB_PDRUNCFG_SYSOSC_PD);
@@ -169,7 +169,7 @@ ao_clock_init(void)
                              ((AO_LPC_CLKIN > 15000000) << LPC_SCB_SYSOSCCTRL_FREQRANGE));/* set range */
 
        /* Turn on the external crystal clock */
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_SYSOSC_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_SYSOSC_PD);
        ao_clock_delay();
 
        /* Select crystal as PLL input */
@@ -182,7 +182,7 @@ ao_clock_init(void)
                ;
 
        /* Turn on the PLL */
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_SYSPLL_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_SYSPLL_PD);
 
        /* Wait for it to lock */
 
index 9e94de12b1db05e8d3c4927eb6700a65103e028c..044699168bae42aac3858a8d2f6105ff4035de45 100644 (file)
@@ -133,7 +133,7 @@ static void
 ao_usb_set_address(uint8_t address)
 {
        debug("ao_usb_set_address %02x\n", address);
-       lpc_usb.devcmdstat = ((address << LPC_USB_DEVCMDSTAT_DEV_ADDR) |
+       lpc_usb.devcmdstat = (((uint32_t) address << LPC_USB_DEVCMDSTAT_DEV_ADDR) |
                              (1 << LPC_USB_DEVCMDSTAT_DEV_EN) |
                              (0 << LPC_USB_DEVCMDSTAT_SETUP) |
                              (0 << LPC_USB_DEVCMDSTAT_PLL_ON) |
@@ -196,14 +196,14 @@ ao_usb_sram_offset(uint8_t *addr)
 static void
 ao_usb_set_ep(vuint32_t *ep, uint8_t *addr, uint16_t nbytes)
 {
-       *ep = ((ao_usb_sram_offset(addr) << LPC_USB_EP_OFFSET) |
-              (nbytes << LPC_USB_EP_NBYTES) |
+       *ep = (((uint32_t) ao_usb_sram_offset(addr) << LPC_USB_EP_OFFSET) |
+              ((uint32_t) nbytes << LPC_USB_EP_NBYTES) |
               (0 << LPC_USB_EP_ENDPOINT_ISO) |
               (0 << LPC_USB_EP_RATE_FEEDBACK) |
               (0 << LPC_USB_EP_TOGGLE_RESET) |
               (0 << LPC_USB_EP_STALL) |
               (0 << LPC_USB_EP_DISABLED) |
-              (1 << LPC_USB_EP_ACTIVE));
+              (1UL << LPC_USB_EP_ACTIVE));
 }
 
 static inline uint16_t
@@ -326,7 +326,7 @@ ao_usb_reset(void)
 static void
 ao_usb_set_ep0(void)
 {
-       int                     e;
+       uint8_t e;
 
        /* Everything is single buffered for now */
        lpc_usb.epbufcfg = 0;
@@ -425,7 +425,7 @@ ao_usb_ep0_fill(void)
 
        if (len > ao_usb_ep0_out_len)
                len = ao_usb_ep0_out_len;
-       ao_usb_ep0_out_len -= len;
+       ao_usb_ep0_out_len -= (uint8_t) len;
 
        debug_data ("Fill EP0 len %d:", len);
        memcpy(ao_usb_ep0_out_data, rx_buffer, len);
@@ -471,7 +471,7 @@ ao_usb_ep0_in_start(uint16_t max)
        ao_usb_ep0_in_max = max;
        /* Don't send more than asked for */
        if (ao_usb_ep0_in_len > max)
-               ao_usb_ep0_in_len = max;
+               ao_usb_ep0_in_len = (uint8_t) max;
        ao_usb_ep0_flush();
 }
 
@@ -483,8 +483,8 @@ static void
 ao_usb_get_descriptor(uint16_t value, uint16_t length)
 {
        const uint8_t           *descriptor;
-       uint8_t         type = value >> 8;
-       uint8_t         index = value;
+       uint8_t         type = (uint8_t) (value >> 8);
+       uint8_t         index = (uint8_t) value;
 
        descriptor = ao_usb_descriptors;
        while (descriptor[0] != 0) {
@@ -495,7 +495,7 @@ ao_usb_get_descriptor(uint16_t value, uint16_t length)
                        else
                                len = descriptor[0];
                        if (len > length)
-                               len = length;
+                               len = (uint8_t) length;
                        ao_usb_ep0_in_set(descriptor, len);
                        break;
                }
@@ -535,7 +535,7 @@ ao_usb_ep0_setup(void)
                                break;
                        case AO_USB_REQ_SET_ADDRESS:
                                debug ("set address %d\n", ao_usb_setup.value);
-                               ao_usb_address = ao_usb_setup.value;
+                               ao_usb_address = (uint8_t) ao_usb_setup.value;
                                ao_usb_address_pending = 1;
                                break;
                        case AO_USB_REQ_GET_DESCRIPTOR:
@@ -547,7 +547,7 @@ ao_usb_ep0_setup(void)
                                ao_usb_ep0_in_queue_byte(ao_usb_configuration);
                                break;
                        case AO_USB_REQ_SET_CONFIGURATION:
-                               ao_usb_configuration = ao_usb_setup.value;
+                               ao_usb_configuration = (uint8_t) ao_usb_setup.value;
                                debug ("set configuration %d\n", ao_usb_configuration);
                                ao_usb_set_configuration();
                                break;
@@ -704,7 +704,7 @@ lpc_usb_irq_isr(void)
        }
 
        /* Check for reset */
-       if (intstat & (1 << LPC_USB_INT_DEV)) {
+       if (intstat & (1UL << LPC_USB_INT_DEV)) {
                if (lpc_usb.devcmdstat & (1 << LPC_USB_DEVCMDSTAT_DRES_C))
                {
                        lpc_usb.devcmdstat |= (1 << LPC_USB_DEVCMDSTAT_DRES_C);
@@ -799,7 +799,7 @@ _ao_usb_out_recv(void)
        _rx_dbg0("out_recv top");
        ao_usb_out_avail = 0;
 
-       ao_usb_rx_count = AO_USB_OUT_SIZE - ao_usb_epn_out_count(AO_USB_OUT_EP);
+       ao_usb_rx_count = (uint8_t) (AO_USB_OUT_SIZE - ao_usb_epn_out_count(AO_USB_OUT_EP));
 
        _rx_dbg1("out_recv count", ao_usb_rx_count);
        debug ("recv %d\n", ao_usb_rx_count);
@@ -846,7 +846,7 @@ ao_usb_getchar(void)
        while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
                ao_sleep(AO_USB_OUT_SLEEP_ADDR);
        ao_arch_release_interrupts();
-       return c;
+       return (char) c;
 }
 
 void
@@ -873,8 +873,8 @@ ao_usb_disable(void)
                             (1 << LPC_SCB_PDRUNCFG_USBPLL_PD));
 
        /* Disable USB registers and RAM */
-       lpc_scb.sysahbclkctrl &= ~((1 << LPC_SCB_SYSAHBCLKCTRL_USB) |
-                                  (1 << LPC_SCB_SYSAHBCLKCTRL_USBRAM));
+       lpc_scb.sysahbclkctrl &= ~((1UL << LPC_SCB_SYSAHBCLKCTRL_USB) |
+                                  (1UL << LPC_SCB_SYSAHBCLKCTRL_USBRAM));
 
        ao_arch_release_interrupts();
 }
@@ -906,10 +906,10 @@ ao_usb_enable(void)
                                  (1 << LPC_SCB_SYSAHBCLKCTRL_USBRAM));
 
        /* Enable USB PHY */
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_USBPAD_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_USBPAD_PD);
 
        /* Turn on USB PLL */
-       lpc_scb.pdruncfg &= ~(1 << LPC_SCB_PDRUNCFG_USBPLL_PD);
+       lpc_scb.pdruncfg &= ~(1UL << LPC_SCB_PDRUNCFG_USBPLL_PD);
 
        lpc_scb.usbpllclksel = (LPC_SCB_SYSPLLCLKSEL_SEL_SYSOSC << LPC_SCB_SYSPLLCLKSEL_SEL);
        lpc_scb.usbpllclkuen = (0 << LPC_SCB_USBPLLCLKUEN_ENA);
@@ -946,12 +946,12 @@ ao_usb_enable(void)
        debug ("ao_usb_enable\n");
 
        /* Enable interrupts */
-       lpc_usb.inten = ((1 << LPC_USB_INT_EPOUT(0)) |
-                        (1 << LPC_USB_INT_EPIN(0)) |
-                        (1 << LPC_USB_INT_EPIN(AO_USB_INT_EP)) |
-                        (1 << LPC_USB_INT_EPOUT(AO_USB_OUT_EP)) |
-                        (1 << LPC_USB_INT_EPIN(AO_USB_IN_EP)) |
-                        (1 << LPC_USB_INT_DEV));
+       lpc_usb.inten = ((1UL << LPC_USB_INT_EPOUT(0)) |
+                        (1UL << LPC_USB_INT_EPIN(0)) |
+                        (1UL << LPC_USB_INT_EPIN(AO_USB_INT_EP)) |
+                        (1UL << LPC_USB_INT_EPOUT(AO_USB_OUT_EP)) |
+                        (1UL << LPC_USB_INT_EPIN(AO_USB_IN_EP)) |
+                        (1UL << LPC_USB_INT_DEV));
 
        ao_arch_release_interrupts();
 
index 1cf35dad2e6846fc35d7cfa45846c4b475d7de88..fbf529c941d494d6ed4499ac896b75cebecf7148 100644 (file)
@@ -359,7 +359,7 @@ extern struct lpc_ioconf lpc_ioconf;
 /* PIO1_31 */
 #define  LPC_IOCONF_FUNC_PIO1_31       0
 
-#define  LPC_IOCONF_FUNC_MASK          0x7
+#define  LPC_IOCONF_FUNC_MASK          0x7UL
 
 #define ao_lpc_alternate(func) (((func) << LPC_IOCONF_FUNC) | \
                                (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) | \
@@ -373,7 +373,7 @@ extern struct lpc_ioconf lpc_ioconf;
 #define  LPC_IOCONF_MODE_PULL_DOWN             1
 #define  LPC_IOCONF_MODE_PULL_UP               2
 #define  LPC_IOCONF_MODE_REPEATER              3
-#define  LPC_IOCONF_MODE_MASK                  3
+#define  LPC_IOCONF_MODE_MASK                  3UL
 
 #define LPC_IOCONF_HYS                 5
 
@@ -504,7 +504,7 @@ extern struct lpc_scb lpc_scb;
 #define  LPC_SCB_SYSPLLCTRL_PSEL_2             1
 #define  LPC_SCB_SYSPLLCTRL_PSEL_4             2
 #define  LPC_SCB_SYSPLLCTRL_PSEL_8             3
-#define  LPC_SCB_SYSPLLCTRL_PSEL_MASK          3
+#define  LPC_SCB_SYSPLLCTRL_PSEL_MASK          3UL
 
 #define LPC_SCB_SYSPLLSTAT_LOCK                0
 
@@ -514,7 +514,7 @@ extern struct lpc_scb lpc_scb;
 #define  LPC_SCB_USBPLLCTRL_PSEL_2             1
 #define  LPC_SCB_USBPLLCTRL_PSEL_4             2
 #define  LPC_SCB_USBPLLCTRL_PSEL_8             3
-#define  LPC_SCB_USBPLLCTRL_PSEL_MASK          3
+#define  LPC_SCB_USBPLLCTRL_PSEL_MASK          3UL
 
 #define LPC_SCB_USBPLLSTAT_LOCK                0
 
@@ -524,7 +524,7 @@ extern struct lpc_scb lpc_scb;
 #define  LPC_SCB_SYSOSCCTRL_FREQRANGE_15_25    1
 
 #define LPC_SCB_WDTOSCCTRL_DIVSEL              0
-#define  LPC_SCB_WDTOSCCTRL_DIVSEL_MASK                        0x1f
+#define  LPC_SCB_WDTOSCCTRL_DIVSEL_MASK                        0x1fUL
 #define LPC_SCB_WDTOSCCTRL_FREQSEL             5
 #define  LPC_SCB_WDTOSCCTRL_FREQSEL_0_6                        1
 #define  LPC_SCB_WDTOSCCTRL_FREQSEL_1_05               2
@@ -541,7 +541,7 @@ extern struct lpc_scb lpc_scb;
 #define  LPC_SCB_WDTOSCCTRL_FREQSEL_4_2                        0x0d
 #define  LPC_SCB_WDTOSCCTRL_FREQSEL_4_4                        0x0e
 #define  LPC_SCB_WDTOSCCTRL_FREQSEL_4_6                        0x0f
-#define  LPC_SCB_WDTOSCCTRL_FREQSEL_MASK               0x0f
+#define  LPC_SCB_WDTOSCCTRL_FREQSEL_MASK               0x0fUL
 
 #define LPC_SCB_SYSRSTSTAT_POR         0
 #define LPC_SCB_SYSRSTSTAT_EXTRST      1
@@ -552,14 +552,14 @@ extern struct lpc_scb lpc_scb;
 #define LPC_SCB_SYSPLLCLKSEL_SEL       0
 #define  LPC_SCB_SYSPLLCLKSEL_SEL_IRC          0
 #define  LPC_SCB_SYSPLLCLKSEL_SEL_SYSOSC       1
-#define  LPC_SCB_SYSPLLCLKSEL_SEL_MASK         3
+#define  LPC_SCB_SYSPLLCLKSEL_SEL_MASK         3UL
 
 #define LPC_SCB_SYSPLLCLKUEN_ENA       0
 
 #define LPC_SCB_USBPLLCLKSEL_SEL       0
 #define  LPC_SCB_USBPLLCLKSEL_SEL_IRC          0
 #define  LPC_SCB_USBPLLCLKSEL_SEL_SYSOSC       1
-#define  LPC_SCB_USBPLLCLKSEL_SEL_MASK         3
+#define  LPC_SCB_USBPLLCLKSEL_SEL_MASK         3UL
 
 #define LPC_SCB_USBPLLCLKUEN_ENA       0
 
@@ -568,7 +568,7 @@ extern struct lpc_scb lpc_scb;
 #define  LPC_SCB_MAINCLKSEL_SEL_PLL_INPUT      1
 #define  LPC_SCB_MAINCLKSEL_SEL_WATCHDOG       2
 #define  LPC_SCB_MAINCLKSEL_SEL_PLL_OUTPUT     3
-#define  LPC_SCB_MAINCLKSEL_SEL_MASK           3
+#define  LPC_SCB_MAINCLKSEL_SEL_MASK           3UL
 
 #define LPC_SCB_MAINCLKUEN_ENA         0
 
@@ -777,7 +777,7 @@ extern struct lpc_usart lpc_usart;
 #define LPC_USART_IIR_INTID_CTI                        6
 #define LPC_USART_IIR_INTID_THRE               1
 #define LPC_USART_IIR_INTID_MS                 0
-#define LPC_USART_IIR_INTID_MASK               7
+#define LPC_USART_IIR_INTID_MASK               7UL
 #define LPC_USART_IIR_FIFOEN           6
 #define LPC_USART_IIR_ABEOINT          8
 #define LPC_USART_IIR_ABTOINT          9
@@ -796,18 +796,18 @@ extern struct lpc_usart lpc_usart;
 #define LPC_USART_LCR_WLS_6            1
 #define LPC_USART_LCR_WLS_7            2
 #define LPC_USART_LCR_WLS_8            3
-#define LPC_USART_LCR_WLS_MASK         3
+#define LPC_USART_LCR_WLS_MASK         3UL
 #define LPC_USART_LCR_SBS      2
 #define LPC_USART_LCR_SBS_1            0
 #define LPC_USART_LCR_SBS_2            1
-#define LPC_USART_LCR_SBS_MASK         1
+#define LPC_USART_LCR_SBS_MASK         1UL
 #define LPC_USART_LCR_PE       3
 #define LPC_USART_LCR_PS       4
 #define LPC_USART_LCR_PS_ODD           0
 #define LPC_USART_LCR_PS_EVEN          1
 #define LPC_USART_LCR_PS_ONE           2
 #define LPC_USART_LCR_PS_ZERO          3
-#define LPC_USART_LCR_PS_MASK          3
+#define LPC_USART_LCR_PS_MASK          3UL
 #define LPC_USART_LCR_BC       6
 #define LPC_USART_LCR_DLAB     7
 
@@ -874,7 +874,7 @@ extern struct lpc_usb lpc_usb;
 #define lpc_usb (*(struct lpc_usb *) 0x40080000)
 
 #define LPC_USB_DEVCMDSTAT_DEV_ADDR    0
-#define LPC_USB_DEVCMDSTAT_DEV_ADDR_MASK       0x7f
+#define LPC_USB_DEVCMDSTAT_DEV_ADDR_MASK       0x7fUL
 #define LPC_USB_DEVCMDSTAT_DEV_EN      7
 #define LPC_USB_DEVCMDSTAT_SETUP       8
 #define LPC_USB_DEVCMDSTAT_PLL_ON      9
@@ -893,7 +893,7 @@ extern struct lpc_usb lpc_usb;
 #define LPC_USB_DEVCMDSTAT_VBUSDEBOUNCED       28
 
 #define LPC_USB_INFO_FRAME_NR          0
-#define LPC_USB_INFO_FRAME_NR_MASK     0x3ff
+#define LPC_USB_INFO_FRAME_NR_MASK     0x3ffUL
 #define LPC_USB_INFO_ERR_CODE          11
 #define LPC_USB_INFO_ERR_CODE_NO_ERROR                 0
 #define LPC_USB_INFO_ERR_CODE_PID_ENCODING_ERROR       1
@@ -911,16 +911,16 @@ extern struct lpc_usb lpc_usb;
 #define LPC_USB_INFO_ERR_CODE_BITSTUFF_ERROR           0xd
 #define LPC_USB_INFO_ERR_CODE_SYNC_ERROR               0xe
 #define LPC_USB_INFO_ERR_CODE_WRONG_DATA_TOGGLE                0xf
-#define LPC_USB_INFO_ERR_CODE_MASK                     0xf
+#define LPC_USB_INFO_ERR_CODE_MASK                     0xfUL
 
 #define LPC_USB_EPLISTSTART_EP_LIST                    0
 
 #define LPC_USB_DATABUFSTART_DA_BUF                    0
 
 #define LPC_USB_LPM_HIRD_HW            0
-#define LPC_USB_LPM_HIRD_HW_MASK               0xf
+#define LPC_USB_LPM_HIRD_HW_MASK               0xfUL
 #define LPC_USB_LPM_HIRD_SW            4
-#define LPC_USB_LPM_HIRD_SW_MASK               0xf
+#define LPC_USB_LPM_HIRD_SW_MASK               0xfUL
 #define LPC_USB_LPM_DATA_PENDING       8
 
 #define LPC_USB_EPSKIP_SKIP            0
@@ -977,7 +977,7 @@ extern uint8_t lpc_usb_sram[];
 #define LPC_USB_EP_RATE_FEEDBACK       27
 #define LPC_USB_EP_ENDPOINT_ISO                26
 #define LPC_USB_EP_NBYTES              16
-#define  LPC_USB_EP_NBYTES_MASK                        0x3ff
+#define  LPC_USB_EP_NBYTES_MASK                        0x3ffUL
 #define LPC_USB_EP_OFFSET              0
 
 #define LPC_ISR_PIN_INT0_POS   0
@@ -1062,7 +1062,7 @@ lpc_nvic_pending(int irq) {
 
 #define IRQ_PRIO_REG(irq)      ((irq) >> 2)
 #define IRQ_PRIO_BIT(irq)      (((irq) & 3) << 3)
-#define IRQ_PRIO_MASK(irq)     (0xff << IRQ_PRIO_BIT(irq))
+#define IRQ_PRIO_MASK(irq)     (0xffUL << IRQ_PRIO_BIT(irq))
 
 static inline void
 lpc_nvic_set_priority(int irq, uint8_t prio) {