samd21: Fix value defines to be unsigned long

This makes the compiler happy

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/src/samd21/samd21.h b/src/samd21/samd21.h
index c08e6533f495f2840cbe21ac4ae194f427409d2e..f65c117fc2b61df9c22e71d3051fff88041a0a41 100644 (file)
--- a/src/samd21/samd21.h
+++ b/src/samd21/samd21.h
@@ -474,57 +474,61 @@ struct samd21_dmac_desc {
 #define SAMD21_DMAC_CHCTRLB_EVIE       3
 #define SAMD21_DMAC_CHCTRLB_EVOE       4
 #define SAMD21_DMAC_CHCTRLB_LVL                5
+#define  SAMD21_DMAC_CHCTRLB_LVL_LVL0          0UL
+#define  SAMD21_DMAC_CHCTRLB_LVL_LVL1          1UL
+#define  SAMD21_DMAC_CHCTRLB_LVL_LVL2          2UL
+#define  SAMD21_DMAC_CHCTRLB_LVL_LVL3          3UL
 #define SAMD21_DMAC_CHCTRLB_TRIGSRC    8
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_DISABLE   0x00
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_SERCOM_RX(n)      (0x01 + (n) * 2)
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_SERCOM_TX(n)      (0x02 + (n) * 2)
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_OVF  0x0d
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC0  0x0e
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC1  0x0f
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC2  0x10
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC3  0x11
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC1_OVF  0x12
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC1_MC0  0x13
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC1_MC1  0x14
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC2_OVF  0x15
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC2_MC0  0x16
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC2_MC1  0x17
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC3_OVF   0x18
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC3_MC0   0x19
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC3_MC1   0x1a
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC4_OVF   0x1b
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC4_MC0   0x1c
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC4_MC1   0x1d
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC5_OVF   0x1e
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC5_MC0   0x1f
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC5_MC1   0x20
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC6_OVF   0x21
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC6_MC0   0x22
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC6_MC1   0x23
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC7_OVF   0x24
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC7_MC0   0x25
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC7_MC1   0x26
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_ADC_RESRDY        0x27
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_DAC_EMPTY 0x28
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_RX_0  0x29
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_RX_1  0x2a
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_TX_0  0x2b
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_TX_1  0x2c
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_OVF  0x2d
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC0  0x2e
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC1  0x2f
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC2  0x30
-#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC3  0x31
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_DISABLE   0x00UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_SERCOM_RX(n)      (0x01UL + (n) * 2UL)
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_SERCOM_TX(n)      (0x02UL + (n) * 2UL)
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_OVF  0x0dUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC0  0x0eUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC1  0x0fUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC2  0x10UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC0_MC3  0x11UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC1_OVF  0x12UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC1_MC0  0x13UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC1_MC1  0x14UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC2_OVF  0x15UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC2_MC0  0x16UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC2_MC1  0x17UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC3_OVF   0x18UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC3_MC0   0x19UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC3_MC1   0x1aUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC4_OVF   0x1bUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC4_MC0   0x1cUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC4_MC1   0x1dUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC5_OVF   0x1eUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC5_MC0   0x1fUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC5_MC1   0x20UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC6_OVF   0x21UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC6_MC0   0x22UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC6_MC1   0x23UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC7_OVF   0x24UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC7_MC0   0x25UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TC7_MC1   0x26UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_ADC_RESRDY        0x27UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_DAC_EMPTY 0x28UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_RX_0  0x29UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_RX_1  0x2aUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_TX_0  0x2bUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_I2S_TX_1  0x2cUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_OVF  0x2dUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC0  0x2eUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC1  0x2fUL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC2  0x30UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGSRC_TCC3_MC3  0x31UL
 
 #define SAMD21_DMAC_CHCTRLB_TRIGACT    22
-#define  SAMD21_DMAC_CHCTRLB_TRIGACT_BLOCK             0
-#define  SAMD21_DMAC_CHCTRLB_TRIGACT_BEAT              2
-#define  SAMD21_DMAC_CHCTRLB_TRIGACT_TRANSACTION       3
+#define  SAMD21_DMAC_CHCTRLB_TRIGACT_BLOCK             0UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGACT_BEAT              2UL
+#define  SAMD21_DMAC_CHCTRLB_TRIGACT_TRANSACTION       3UL
 
 #define SAMD21_DMAC_CHCTRLB_CMD                24
-#define  SAMD21_DMAC_CHCTRLB_CMD_NOACT         0
-#define  SAMD21_DMAC_CHCTRLB_CMD_SUSPEND       1
-#define  SAMD21_DMAC_CHCTRLB_CMD_RESUME                2
+#define  SAMD21_DMAC_CHCTRLB_CMD_NOACT         0UL
+#define  SAMD21_DMAC_CHCTRLB_CMD_SUSPEND       1UL
+#define  SAMD21_DMAC_CHCTRLB_CMD_RESUME                2UL
 
 #define SAMD21_DMAC_CHINTFLAG_TERR     0
 #define SAMD21_DMAC_CHINTFLAG_TCMPL    1
@@ -536,15 +540,32 @@ struct samd21_dmac_desc {
 
 #define SAMD21_DMAC_DESC_BTCTRL_VALID          0
 #define SAMD21_DMAC_DESC_BTCTRL_EVOSEL         1
+#define  SAMD21_DMAC_DESC_BTCTRL_EVOSEL_DISABLE                0UL
+#define  SAMD21_DMAC_DESC_BTCTRL_EVOSEL_BLOCK          1UL
+#define  SAMD21_DMAC_DESC_BTCTRL_EVOSEL_BEAT           3UL
 #define SAMD21_DMAC_DESC_BTCTRL_BLOCKACT       3
+#define  SAMD21_DMAC_DESC_BTCTRL_BLOCKACT_NOACT                0UL
+#define  SAMD21_DMAC_DESC_BTCTRL_BLOCKACT_INT          1UL
+#define  SAMD21_DMAC_DESC_BTCTRL_BLOCKACT_SUSPEND      2UL
+#define  SAMD21_DMAC_DESC_BTCTRL_BLOCKACT_BOTH         3UL
 #define SAMD21_DMAC_DESC_BTCTRL_BEATSIZE       8
-#define  SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_BYTE         0
-#define  SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_HWORD                1
-#define  SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_WORD         2
+#define  SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_BYTE         0UL
+#define  SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_HWORD                1UL
+#define  SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_WORD         2UL
 #define SAMD21_DMAC_DESC_BTCTRL_SRCINC         10
 #define SAMD21_DMAC_DESC_BTCTRL_DSTINC         11
 #define SAMD21_DMAC_DESC_BTCTRL_STEPSEL                12
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSEL_DST           0UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSEL_SRC           1UL
 #define SAMD21_DMAC_DESC_BTCTRL_STEPSIZE       13
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X1           0UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X2           1UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X4           2UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X8           3UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X16          4UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X32          5UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X64          6UL
+#define  SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X128         7UL
 
 struct samd21_nvmctrl {
        vuint32_t       ctrla;
@@ -612,11 +633,17 @@ extern struct samd21_nvmctrl samd21_nvmctrl;
 #define SAMD21_NVMCTRL_PARAM_RWWEEP    20
 #define  SAMD21_NVMCTRL_PARAM_RWWEEP_MASK      0xfff
 
+static inline uint32_t
+samd21_nvmctrl_page_shift(void)
+{
+       return(3 + ((samd21_nvmctrl.param >> SAMD21_NVMCTRL_PARAM_PSZ) &
+                   SAMD21_NVMCTRL_PARAM_PSZ_MASK));
+}
+
 static inline uint32_t
 samd21_nvmctrl_page_size(void)
 {
-       return 1 << (3 + ((samd21_nvmctrl.param >> SAMD21_NVMCTRL_PARAM_PSZ) &
-                         SAMD21_NVMCTRL_PARAM_PSZ_MASK));
+       return 1 << samd21_nvmctrl_page_shift();
 }
 
 uint32_t