stm32f1: Clean up some ADC definitions
authorKeith Packard <keithp@keithp.com>
Sat, 3 Feb 2024 00:31:03 +0000 (16:31 -0800)
committerKeith Packard <keithp@keithp.com>
Sat, 3 Feb 2024 00:31:03 +0000 (16:31 -0800)
The CR2 bit is called TSVREFE in the docs, use that consistently

Signed-off-by: Keith Packard <keithp@keithp.com>
src/stm32f1/ao_adc_single_stm.c
src/stm32f1/ao_adc_stm.c
src/stm32f1/stm32f1.h

index 01a3fa6a75c307892960c9b78a6f773b183610c0..feaba42d42a56222ca507131daf432331378e8de 100644 (file)
@@ -22,7 +22,7 @@
 
 static uint8_t                 ao_adc_ready;
 
-#define AO_ADC_CR2_VAL(start)  ((HAS_ADC_TEMP << STM_ADC_CR2_TSVREF) | \
+#define AO_ADC_CR2_VAL(start)  ((HAS_ADC_TEMP << STM_ADC_CR2_TSVREFE) |\
                                 ((start) << STM_ADC_CR2_SWSTART) |     \
                                 (0 << STM_ADC_CR2_JWSTART) |           \
                                 (0 << STM_ADC_CR2_EXTTRIG) |           \
index d7fac0d7c150f44bfd2959f66730f0420dc86f5f..9523bd65e08bd245fa3d485690561be6f0ddc533 100644 (file)
@@ -21,7 +21,7 @@
 
 static uint8_t                 ao_adc_ready;
 
-#define AO_ADC_CR2_VAL         ((HAS_ADC_TEMP << STM_ADC_CR2_TSVREF) | \
+#define AO_ADC_CR2_VAL         ((HAS_ADC_TEMP << STM_ADC_CR2_TSVREFE) |\
                                 (0 << STM_ADC_CR2_SWSTART) |           \
                                 (0 << STM_ADC_CR2_JWSTART) |           \
                                 (0 << STM_ADC_CR2_EXTTRIG) |           \
@@ -56,9 +56,9 @@ ao_adc_poll(void)
        if (!ao_adc_ready)
                return;
        ao_adc_ready = 0;
-       stm_adc.sr = 0;
+       stm_adc1.sr = 0;
        ao_dma_set_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1),
-                           &stm_adc.dr,
+                           &stm_adc1.dr,
                            (void *) (&ao_data_ring[ao_data_head].adc),
                            AO_NUM_ADC,
                            (0 << STM_DMA_CCR_MEM2MEM) |
@@ -72,7 +72,7 @@ ao_adc_poll(void)
        ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1), ao_adc_done);
        ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
 
-       stm_adc.cr2 = AO_ADC_CR2_VAL | (1 << STM_ADC_CR2_SWSTART);
+       stm_adc1.cr2 = AO_ADC_CR2_VAL | (1 << STM_ADC_CR2_SWSTART);
 }
 
 #ifdef AO_ADC_SQ1_NAME
@@ -264,9 +264,9 @@ ao_adc_init(void)
        stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_ADC1EN);
 
        /* Turn off ADC during configuration */
-       stm_adc.cr2 = 0;
+       stm_adc1.cr2 = 0;
 
-       stm_adc.cr1 = ((0 << STM_ADC_CR1_AWDEN ) |
+       stm_adc1.cr1 = ((0 << STM_ADC_CR1_AWDEN ) |
                       (0 << STM_ADC_CR1_JAWDEN ) |
                       (STM_ADC_CR1_DUALMOD_INDEPENDENT << STM_ADC_CR1_DUALMOD ) |
                       (0 << STM_ADC_CR1_DISCNUM ) |
@@ -281,57 +281,57 @@ ao_adc_init(void)
                       (0 << STM_ADC_CR1_AWDCH ));
 
        /* 384 cycle sample time for everyone */
-       stm_adc.smpr1 = 0x3ffff;
-       stm_adc.smpr2 = 0x3fffffff;
+       stm_adc1.smpr1 = 0x3ffff;
+       stm_adc1.smpr2 = 0x3fffffff;
 
-       stm_adc.sqr1 = ((AO_NUM_ADC - 1) << 20);
+       stm_adc1.sqr1 = ((AO_NUM_ADC - 1) << 20);
 #if AO_NUM_ADC > 0
-       stm_adc.sqr3 |= (AO_ADC_SQ1 << 0);
+       stm_adc1.sqr3 |= (AO_ADC_SQ1 << 0);
 #endif
 #if AO_NUM_ADC > 1
-       stm_adc.sqr3 |= (AO_ADC_SQ2 << 5);
+       stm_adc1.sqr3 |= (AO_ADC_SQ2 << 5);
 #endif
 #if AO_NUM_ADC > 2
-       stm_adc.sqr3 |= (AO_ADC_SQ3 << 10);
+       stm_adc1.sqr3 |= (AO_ADC_SQ3 << 10);
 #endif
 #if AO_NUM_ADC > 3
-       stm_adc.sqr3 |= (AO_ADC_SQ4 << 15);
+       stm_adc1.sqr3 |= (AO_ADC_SQ4 << 15);
 #endif
 #if AO_NUM_ADC > 4
-       stm_adc.sqr3 |= (AO_ADC_SQ5 << 20);
+       stm_adc1.sqr3 |= (AO_ADC_SQ5 << 20);
 #endif
 #if AO_NUM_ADC > 5
-       stm_adc.sqr3 |= (AO_ADC_SQ6 << 25);
+       stm_adc1.sqr3 |= (AO_ADC_SQ6 << 25);
 #endif
 #if AO_NUM_ADC > 6
-       stm_adc.sqr2 |= (AO_ADC_SQ7 << 0);
+       stm_adc1.sqr2 |= (AO_ADC_SQ7 << 0);
 #endif
 #if AO_NUM_ADC > 7
-       stm_adc.sqr2 |= (AO_ADC_SQ8 << 5);
+       stm_adc1.sqr2 |= (AO_ADC_SQ8 << 5);
 #endif
 #if AO_NUM_ADC > 8
-       stm_adc.sqr2 |= (AO_ADC_SQ9 << 10);
+       stm_adc1.sqr2 |= (AO_ADC_SQ9 << 10);
 #endif
 #if AO_NUM_ADC > 9
-       stm_adc.sqr2 |= (AO_ADC_SQ10 << 15);
+       stm_adc1.sqr2 |= (AO_ADC_SQ10 << 15);
 #endif
 #if AO_NUM_ADC > 10
-       stm_adc.sqr2 |= (AO_ADC_SQ11 << 20);
+       stm_adc1.sqr2 |= (AO_ADC_SQ11 << 20);
 #endif
 #if AO_NUM_ADC > 11
-       stm_adc.sqr2 |= (AO_ADC_SQ12 << 25);
+       stm_adc1.sqr2 |= (AO_ADC_SQ12 << 25);
 #endif
 #if AO_NUM_ADC > 12
-       stm_adc.sqr1 |= (AO_ADC_SQ13 << 0);
+       stm_adc1.sqr1 |= (AO_ADC_SQ13 << 0);
 #endif
 #if AO_NUM_ADC > 13
-       stm_adc.sqr1 |= (AO_ADC_SQ14 << 5);
+       stm_adc1.sqr1 |= (AO_ADC_SQ14 << 5);
 #endif
 #if AO_NUM_ADC > 14
-       stm_adc.sqr1 |= (AO_ADC_SQ15 << 10);
+       stm_adc1.sqr1 |= (AO_ADC_SQ15 << 10);
 #endif
 #if AO_NUM_ADC > 15
-       stm_adc.sqr1 |= (AO_ADC_SQ16 << 15);
+       stm_adc1.sqr1 |= (AO_ADC_SQ16 << 15);
 #endif
 #if AO_NUM_ADC > 15
 #error "too many ADC channels"
@@ -341,11 +341,11 @@ ao_adc_init(void)
 #error Please define HAS_ADC_TEMP
 #endif
 #if HAS_ADC_TEMP
-       stm_adc.cr2 |= ((1 << STM_ADC_CR2_TSVREFE));
+       stm_adc1.cr2 |= ((1 << STM_ADC_CR2_TSVREFE));
 #endif
 
        /* Clear any stale status bits */
-       stm_adc.sr = 0;
+       stm_adc1.sr = 0;
 
        ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
 
index b77a0aef4d68f44029f37ef02fc9d6d4e85a9dcb..664e76525ab507895a0f221fc6d7ae796ea8c2f0 100644 (file)
@@ -1132,7 +1132,7 @@ extern struct stm_adc stm_adc1;
 #define STM_ADC_CR1_AWDCH      0
 #define  STM_ADC_CR1_AWDCH_MASK                0x1fUL
 
-#define STM_ADC_CR2_TSVREF     23
+#define STM_ADC_CR2_TSVREFE    23
 #define STM_ADC_CR2_SWSTART    22
 #define STM_ADC_CR2_JWSTART    21
 #define STM_ADC_CR2_EXTTRIG    20