Save/restore regs when reading/writing memory. Add SFR access.

The DPL and ACC registers are used by the memory access code,
so they need to be saved and restored. Stuff them up high in ram for now;
this should probably be fixed to pull them back to the host instead.

Special SFR access is required as not all SFRs are visible in the unified
address space.

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/lib/ccdbg-memory.c b/lib/ccdbg-memory.c
index 3406a1b17a1d48a1dafec3e8449fdceccc484281..d74726fb11e8bd875a03a0da423b24eb50aac565 100644 (file)
--- a/lib/ccdbg-memory.c
+++ b/lib/ccdbg-memory.c
@@ -23,9 +23,14 @@
  */
 
 static uint8_t memory_init[] = {
+       2,      MOV_direct_A,           0x7f,
+       3,      MOV_direct1_direct2,    0x7e, SFR_DPL0,
+       3,      MOV_direct1_direct2,    0x7d, SFR_DPH0,
+       3,      MOV_direct1_direct2,    0x7c, SFR_DPL1,
+       3,      MOV_direct1_direct2,    0x7b, SFR_DPH1,
        3,      MOV_DPTR_data16,        0,      0,
-#define HIGH_START     2
-#define LOW_START      3
+#define HIGH_START     21
+#define LOW_START      22
        0,
 };
 
@@ -44,6 +49,15 @@ static uint8_t read8[] = {
        0,
 };
 
+static uint8_t memory_fini[] = {
+       2,      MOV_A_direct,           0x7f,
+       3,      MOV_direct1_direct2,    SFR_DPL0, 0x7e,
+       3,      MOV_direct1_direct2,    SFR_DPH0, 0x7d,
+       3,      MOV_direct1_direct2,    SFR_DPL1, 0x7c,
+       3,      MOV_direct1_direct2,    SFR_DPH1, 0x7b,
+       0,
+};
+
 uint8_t
 ccdbg_write_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes)
 {
@@ -64,6 +78,7 @@ ccdbg_write_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes)
                        nl = 0;
                }
        }
+       (void) ccdbg_execute(dbg, memory_fini);
        if (nl)
                ccdbg_debug(CC_DEBUG_MEMORY, "\n");
        return 0;
@@ -88,6 +103,7 @@ ccdbg_read_memory(struct ccdbg *dbg, uint16_t addr, uint8_t *bytes, int nbytes)
                        nl = 0;
                }
        }
+       (void) ccdbg_execute(dbg, memory_fini);
        if (nl)
                ccdbg_debug(CC_DEBUG_MEMORY, "\n");
        return 0;
@@ -118,3 +134,52 @@ ccdbg_read_hex_image(struct ccdbg *dbg, uint16_t address, uint16_t length)
        ccdbg_read_memory(dbg, address, image->data, length);
        return image;
 }
+
+static uint8_t sfr_init[] = {
+       2,      MOV_direct_A,           0x7f,
+       0,
+};
+
+static uint8_t sfr_fini[] = {
+       2,      MOV_A_direct,           0x7f,
+       0,
+};
+
+static uint8_t sfr_read[] = {
+       2,      MOV_A_direct,           0,
+#define SFR_READ_ADDR  2
+       0,
+};
+
+static uint8_t sfr_write[] = {
+       3,      MOV_direct_data,        0,      0,
+#define SFR_WRITE_ADDR 2
+#define SFR_WRITE_DATA 3
+       0,
+};
+
+uint8_t
+ccdbg_read_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes)
+{
+       int     i;
+       (void) ccdbg_execute(dbg, sfr_init);
+       for (i = 0; i < nbytes; i++) {
+               sfr_read[SFR_READ_ADDR] = addr + i;
+               *bytes++ = ccdbg_execute(dbg, sfr_read);
+       }
+       (void) ccdbg_execute(dbg, sfr_fini);
+       return 0;
+}
+
+uint8_t
+ccdbg_write_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes)
+{
+       int     i;
+       
+       for (i = 0; i < nbytes; i++) {
+               sfr_write[SFR_WRITE_ADDR] = addr + i;
+               sfr_write[SFR_WRITE_DATA] = *bytes++;
+               ccdbg_execute(dbg, sfr_write);
+       }
+       return 0;
+}

diff --git a/lib/ccdbg.h b/lib/ccdbg.h
index 834092b2cd21a4e4423a5cbe740bc6342f9512e6..203b5aebb8c723b043f0654c95838afcfa7dcfac 100644 (file)
--- a/lib/ccdbg.h
+++ b/lib/ccdbg.h
@@ -44,6 +44,7 @@
 #define MOV_Rn_data(n)         (0x78 | (n))
 #define DJNZ_Rn_rel(n)         (0xd8 | (n))
 #define MOV_A_direct           0xe5
+#define MOV_direct1_direct2    0x85
 #define MOV_direct_A           0xf5
 #define MOV_DPTR_data16                0x90
 #define MOV_A_data             0x74
@@ -57,6 +58,13 @@
 /* 8051 special function registers
  */
 
+#define SFR_P0                 0x80
+#define SFR_SP                 0x81
+#define SFR_DPL0               0x82
+#define SFR_DPH0               0x83
+#define SFR_DPL1               0x84
+#define SFR_DPH1               0x85
+
 /* flash controller */
 #define FWT                    0xAB
 #define FADDRL                 0xAC
@@ -323,4 +331,10 @@ ccdbg_write_hex_image(struct ccdbg *dbg, struct hex_image *image, uint16_t offse
 struct hex_image *
 ccdbg_read_hex_image(struct ccdbg *dbg, uint16_t address, uint16_t length);
 
+uint8_t
+ccdbg_read_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
+
+uint8_t
+ccdbg_write_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
+
 #endif /* _CCDBG_H_ */