altos/cc1200: Adjust bit-sync configuration
authorKeith Packard <keithp@keithp.com>
Sun, 15 Feb 2015 07:18:38 +0000 (23:18 -0800)
committerKeith Packard <keithp@keithp.com>
Sun, 15 Feb 2015 07:18:38 +0000 (23:18 -0800)
The default bit timing adjustment mechanism allows for only a 0.2%
deviation from the programmed bit timing. I found one TeleMini device
which is beyond that tolerance as it was built with an older crystal
with more error.

Switch to the more expensive synchronization mechanism which allows up
to 2% timing error, but requires a multi-byte preamble (which we
have). This fixes packet mode nicely.

Signed-off-by: Keith Packard <keithp@keithp.com>
src/drivers/ao_cc1200.h
src/drivers/ao_cc1200_CC1200.h
src/drivers/ao_packet.c

index b04775fdc964f87d0fdb6794e79245c14a4f932d..b2b63cde490a1b5c294e64111ed7c2bf39aeee88 100644 (file)
 #define CC1200_IF_MIX_CFG      (CC1200_EXTENDED_BIT | 0x00)
 #define CC1200_FREQOFF_CFG     (CC1200_EXTENDED_BIT | 0x01)
 #define CC1200_TOC_CFG         (CC1200_EXTENDED_BIT | 0x02)
+
+#define CC1200_TOC_CFG_TOC_LIMIT               6
+#define  CC1200_TOC_CFG_TOC_LIMIT_0_2                  0
+#define  CC1200_TOC_CFG_TOC_LIMIT_2                    1
+#define  CC1200_TOC_CFG_TOC_LIMIT_12                   3
+
+#define CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN   3
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_8                        0
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_16               1
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_32               2
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_64               3
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_128              4
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_256              5
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_8_16             0
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_6_16             1
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_2_16             2
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_1_16             3
+#define  CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_1_16_SYNC                4
+
+#define CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN  0
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_8               0
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_16              1
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_32              2
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_64              3
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_128             4
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_256             5
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_FREEZE          0
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_6_32            1
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_2_32            2
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_1_32            3
+#define  CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_1_32_SYNC       4
+
 #define CC1200_MARC_SPARE      (CC1200_EXTENDED_BIT | 0x03)
 #define CC1200_ECG_CFG         (CC1200_EXTENDED_BIT | 0x04)
 #define CC1200_MDMCFG2         (CC1200_EXTENDED_BIT | 0x05)
index 3567312380b5c1aadc8a2107f93cd9a8b64c0f3b..f0214c2a25df1f8f80b244290baa59b92ede99e3 100644 (file)
                 (CC1200_MDMCFG2_SYMBOL_MAP_CFG_MODE_0 << CC1200_MDMCFG2_SYMBOL_MAP_CFG) |
                 (CC1200_MDMCFG2_UPSAMPLER_P_8 << CC1200_MDMCFG2_UPSAMPLER_P) |
                 (0 << CC1200_MDMCFG2_CFM_DATA_EN)),
+       CC1200_MDMCFG0,                                  /* General Modem Parameter Configuration Reg. 0 */ 
+               ((0 << CC1200_MDMCFG0_TRANSPARENT_MODE_EN) |
+                (0 << CC1200_MDMCFG0_TRANSPARENT_INTFACT) |
+                (0 << CC1200_MDMCFG0_DATA_FILTER_EN) | 
+                (1 << CC1200_MDMCFG0_VITERBI_EN)),
+       CC1200_TOC_CFG,                                 /* Timing Offset Correction Configuration */
+               ((CC1200_TOC_CFG_TOC_LIMIT_2 << CC1200_TOC_CFG_TOC_LIMIT) |
+                (CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN_6_16 << CC1200_TOC_CFG_TOC_PRE_SYNC_BLOCKLEN)|
+                (CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN_2_32 << CC1200_TOC_CFG_TOC_POST_SYNC_BLOCKLEN)),
         CC1200_FREQ2,                        0x6c,       /* Frequency Configuration [23:16] */
         CC1200_FREQ1,                        0xa3,       /* Frequency Configuration [15:8] */
         CC1200_FREQ0,                        0x33,       /* Frequency Configuration [7:0] */
index 18330eadbec53deb7faf4f8468227f5cdc494bd7..8c2db2755d423c51139dfa91a48c4de5a9b9c06e 100644 (file)
@@ -81,8 +81,16 @@ ao_packet_recv(uint16_t timeout)
        /* Check to see if we got a valid packet */
        if (!dma_done)
                return 0;
-       if (!(ao_rx_packet.status & AO_RADIO_STATUS_CRC_OK))
+       if (!(ao_rx_packet.status & AO_RADIO_STATUS_CRC_OK)) {
+               printf("bad crc addr %d len %d seq %d ack %d callsign %8.8s\n",
+                       ao_rx_packet.packet.addr,
+                       ao_rx_packet.packet.len,
+                       ao_rx_packet.packet.seq,
+                       ao_rx_packet.packet.ack,
+                       ao_rx_packet.packet.callsign);
+               flush();
                return 0;
+       }
 
        /* Accept packets with matching call signs, or any packet if
         * our callsign hasn't been configured
@@ -90,8 +98,10 @@ ao_packet_recv(uint16_t timeout)
        if (ao_xmemcmp(ao_rx_packet.packet.callsign,
                       ao_config.callsign,
                       AO_MAX_CALLSIGN) != 0 &&
-           ao_xmemcmp(ao_config.callsign, CODE_TO_XDATA("N0CALL"), 7) != 0)
+           ao_xmemcmp(ao_config.callsign, CODE_TO_XDATA("N0CALL"), 7) != 0) {
+               printf ("bad call\n"); flush();
                return 0;
+       }
 
        /* SYN packets carry no data */
        if (ao_rx_packet.packet.len == AO_PACKET_SYN) {