Decrease ADC clock to pclk/4 (12MHz)
authorKeith Packard <keithp@keithp.com>
Tue, 13 Apr 2021 07:10:01 +0000 (00:10 -0700)
committerKeith Packard <keithp@keithp.com>
Tue, 13 Apr 2021 07:10:01 +0000 (00:10 -0700)
commit0642bc895acc593d34ec3a5e852f4ee08ba29e36
tree8ebf6b42fe6b13aeddc6edbde5330be78663a2f4
parentea83cfcc8214e7f784c50e7988224cf01d449687
Decrease ADC clock to pclk/4 (12MHz)

ADC isn't supposed to run faster than 14MHz

Signed-off-by: Keith Packard <keithp@keithp.com>
src/stmf0/ao_adc_stm.c