altos: Add initial stm32l0 support
[fw/altos] / src / stm32l0 / ao_interrupt.c
1 /*
2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along
15  * with this program; if not, write to the Free Software Foundation, Inc.,
16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
17  */
18
19 #include <ao.h>
20 #include <string.h>
21 #include <ao_boot.h>
22
23 /* Interrupt functions */
24
25 void stm_halt_isr(void)
26 {
27         ao_panic(AO_PANIC_CRASH);
28 }
29
30 void stm_ignore_isr(void)
31 {
32 }
33
34 void _start(void);
35
36 #define STRINGIFY(x) #x
37
38 #define isr(name) \
39         void __attribute__ ((weak)) stm_ ## name ## _isr(void); \
40         _Pragma(STRINGIFY(weak stm_ ## name ## _isr = stm_ignore_isr))
41
42 #define isr_halt(name) \
43         void __attribute__ ((weak)) stm_ ## name ## _isr(void); \
44         _Pragma(STRINGIFY(weak stm_ ## name ## _isr = stm_halt_isr))
45
46 isr(nmi)
47 isr_halt(hardfault)
48 isr_halt(memmanage)
49 isr_halt(busfault)
50 isr_halt(usagefault)
51 isr(svc)
52 isr(debugmon)
53 isr(pendsv)
54 isr(systick)
55 isr(wwdg)
56 isr(pvd)
57 isr(rtc)
58 isr(flash)
59 isr(rcc_crs)
60 isr(exti1_0)
61 isr(exti3_2)
62 isr(exti15_4)
63 isr(dma1_channel1)
64 isr(dma1_channel3_2)
65 isr(dma1_channel7_4)
66 isr(adc_comp)
67 isr(lptim1)
68 isr(usart4_usart5)
69 isr(tim2)
70 isr(tim3)
71 isr(tim4)
72 isr(tim6)
73 isr(tim7)
74 isr(tim21)
75 isr(i2c3)
76 isr(tim22)
77 isr(i2c1)
78 isr(i2c2)
79 isr(spi1)
80 isr(spi2)
81 isr(usart1)
82 isr(usart2)
83 isr(usart3)
84 isr(lpuart1_aes)
85
86 #define i(addr,name)    [(addr)/4] = stm_ ## name ## _isr
87
88 extern char __stack[];
89 void _start(void) __attribute__((__noreturn__));
90 void main(void) __attribute__((__noreturn__));
91
92 __attribute__ ((section(".init")))
93 const void *const __interrupt_vector[] = {
94         [0] = &__stack,
95         [1] = _start,
96         i(0x08, nmi),
97         i(0x0c, hardfault),
98         i(0x2c, svc),
99         i(0x38, pendsv),
100         i(0x3c, systick),
101         i(0x40, wwdg),
102         i(0x44, pvd),
103         i(0x48, rtc),
104         i(0x4c, flash),
105         i(0x50, rcc_crs),
106         i(0x54, exti1_0),
107         i(0x58, exti3_2),
108         i(0x5c, exti15_4),
109         i(0x64, dma1_channel1),
110         i(0x68, dma1_channel3_2),
111         i(0x6c, dma1_channel7_4),
112         i(0x70, adc_comp),
113         i(0x74, lptim1),
114         i(0x78, usart4_usart5),
115         i(0x7c, tim2),
116         i(0x80, tim3),
117         i(0x84, tim6),
118         i(0x88, tim7),
119         i(0x90, tim21),
120         i(0x94, i2c3),
121         i(0x98, tim22),
122         i(0x9c, i2c1),
123         i(0xa0, i2c2),
124         i(0xa4, spi1),
125         i(0xa8, spi2),
126         i(0xac, usart1),
127         i(0xb0, usart2),
128         i(0xb4, lpuart1_aes),
129 };
130
131 extern char __data_source[];
132 extern char __data_start[];
133 extern char __data_size[];
134 extern char __bss_start[];
135 extern char __bss_size[];
136
137 void _start(void)
138 {
139 #ifdef AO_BOOT_CHAIN
140         if (ao_boot_check_chain()) {
141 #ifdef AO_BOOT_PIN
142                 if (ao_boot_check_pin())
143 #endif
144                 {
145                         ao_boot_chain(AO_BOOT_APPLICATION_BASE);
146                 }
147         }
148 #endif
149         memcpy(__data_start, __data_source, (uintptr_t) __data_size);
150         memset(__bss_start, '\0', (uintptr_t) __bss_size);
151
152         main();
153 }