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   1 /*
   2  * Copyright © 2018 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along
  15  * with this program; if not, write to the Free Software Foundation, Inc.,
  16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  17  */
  18
  19 #include <ao.h>
  20 #include <ao_exti.h>
  21
  22 /* ao_serial_stm.c */
  23 struct ao_stm_usart {
  24         struct ao_fifo          rx_fifo;
  25         struct ao_fifo          tx_fifo;
  26         struct stm_usart        *reg;
  27         uint32_t                clk;
  28         uint8_t                 tx_running;
  29         uint8_t                 draining;
  30 #if HAS_SERIAL_SW_FLOW
  31         /* RTS - 0 if we have FIFO space, 1 if not
  32          * CTS - 0 if we can send, 0 if not
  33          */
  34         struct stm_gpio         *gpio_rts;
  35         struct stm_gpio         *gpio_cts;
  36         uint8_t                 pin_rts;
  37         uint8_t                 pin_cts;
  38         uint8_t                 rts;
  39 #endif
  40 };
  41
  42 static int
  43 _ao_usart_tx_start(struct ao_stm_usart *usart)
  44 {
  45         if (!ao_fifo_empty(usart->tx_fifo)) {
  46 #if HAS_SERIAL_SW_FLOW
  47                 if (usart->gpio_cts && ao_gpio_get(usart->gpio_cts, usart->pin_cts) == 1) {
  48                         ao_exti_enable(usart->gpio_cts, usart->pin_cts);
  49                         return 0;
  50                 }
  51 #endif
  52                 if (usart->reg->sr & (1 << STM_USART_SR_TXE))
  53                 {
  54                         usart->tx_running = 1;
  55                         usart->reg->cr1 |= (1 << STM_USART_CR1_TXEIE) | (1 << STM_USART_CR1_TCIE);
  56                         ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
  57                         ao_wakeup(&usart->tx_fifo);
  58                         return 1;
  59                 }
  60         }
  61         return 0;
  62 }
  63
  64 #if HAS_SERIAL_SW_FLOW
  65 static void
  66 _ao_usart_cts(struct ao_stm_usart *usart)
  67 {
  68         if (_ao_usart_tx_start(usart))
  69                 ao_exti_disable(usart->gpio_cts, usart->pin_cts);
  70 }
  71 #endif
  72
  73 static void
  74 _ao_usart_rx(struct ao_stm_usart *usart, int is_stdin)
  75 {
  76         if (usart->reg->sr & (1 << STM_USART_SR_RXNE)) {
  77                 if (!ao_fifo_full(usart->rx_fifo)) {
  78                         ao_fifo_insert(usart->rx_fifo, usart->reg->dr);
  79                         ao_wakeup(&usart->rx_fifo);
  80                         if (is_stdin)
  81                                 ao_wakeup(&ao_stdin_ready);
  82 #if HAS_SERIAL_SW_FLOW
  83                         /* If the fifo is nearly full, turn off RTS and wait
  84                          * for it to drain a bunch
  85                          */
  86                         if (usart->gpio_rts && ao_fifo_mostly(usart->rx_fifo)) {
  87                                 ao_gpio_set(usart->gpio_rts, usart->pin_rts, 1);
  88                                 usart->rts = 0;
  89                         }
  90 #endif
  91                 } else {
  92                         usart->reg->cr1 &= ~(1 << STM_USART_CR1_RXNEIE);
  93                 }
  94         }
  95 }
  96
  97 static void
  98 ao_usart_isr(struct ao_stm_usart *usart, int is_stdin)
  99 {
 100         _ao_usart_rx(usart, is_stdin);
 101
 102         if (!_ao_usart_tx_start(usart))
 103                 usart->reg->cr1 &= ~(1<< STM_USART_CR1_TXEIE);
 104
 105         if (usart->reg->sr & (1 << STM_USART_SR_TC)) {
 106                 usart->tx_running = 0;
 107                 usart->reg->cr1 &= ~(1 << STM_USART_CR1_TCIE);
 108                 if (usart->draining) {
 109                         usart->draining = 0;
 110                         ao_wakeup(&usart->tx_fifo);
 111                 }
 112         }
 113 }
 114
 115 static int
 116 _ao_usart_pollchar(struct ao_stm_usart *usart)
 117 {
 118         int     c;
 119
 120         if (ao_fifo_empty(usart->rx_fifo))
 121                 c = AO_READ_AGAIN;
 122         else {
 123                 uint8_t u;
 124                 ao_fifo_remove(usart->rx_fifo,u);
 125                 if ((usart->reg->cr1 & (1 << STM_USART_CR1_RXNEIE)) == 0) {
 126                         if (ao_fifo_barely(usart->rx_fifo))
 127                                 usart->reg->cr1 |= (1 << STM_USART_CR1_RXNEIE);
 128                 }
 129 #if HAS_SERIAL_SW_FLOW
 130                 /* If we've cleared RTS, check if there's space now and turn it back on */
 131                 if (usart->gpio_rts && usart->rts == 0 && ao_fifo_barely(usart->rx_fifo)) {
 132                         ao_gpio_set(usart->gpio_rts, usart->pin_rts, 0);
 133                         usart->rts = 1;
 134                 }
 135 #endif
 136                 c = u;
 137         }
 138         return c;
 139 }
 140
 141 static char
 142 ao_usart_getchar(struct ao_stm_usart *usart)
 143 {
 144         int c;
 145         ao_arch_block_interrupts();
 146         while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
 147                 ao_sleep(&usart->rx_fifo);
 148         ao_arch_release_interrupts();
 149         return (char) c;
 150 }
 151
 152 static inline uint8_t
 153 _ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
 154 {
 155         return ao_sleep_for(&usart->rx_fifo, timeout);
 156 }
 157
 158 static void
 159 ao_usart_putchar(struct ao_stm_usart *usart, char c)
 160 {
 161         ao_arch_block_interrupts();
 162         while (ao_fifo_full(usart->tx_fifo))
 163                 ao_sleep(&usart->tx_fifo);
 164         ao_fifo_insert(usart->tx_fifo, c);
 165         _ao_usart_tx_start(usart);
 166         ao_arch_release_interrupts();
 167 }
 168
 169 static void
 170 ao_usart_drain(struct ao_stm_usart *usart)
 171 {
 172         ao_arch_block_interrupts();
 173         while (!ao_fifo_empty(usart->tx_fifo) || usart->tx_running) {
 174                 usart->draining = 1;
 175                 ao_sleep(&usart->tx_fifo);
 176         }
 177         ao_arch_release_interrupts();
 178 }
 179
 180 static void
 181 ao_usart_set_speed(struct ao_stm_usart *usart, uint32_t speed)
 182 {
 183         if (speed > 115200)
 184                 return;
 185         usart->reg->brr = usart->clk / speed;
 186 }
 187
 188 static void
 189 _ao_usart_init(struct ao_stm_usart *usart, int hw_flow)
 190 {
 191         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
 192                           (1 << STM_USART_CR1_UE) |
 193                           (0 << STM_USART_CR1_M) |
 194                           (0 << STM_USART_CR1_WAKE) |
 195                           (0 << STM_USART_CR1_PCE) |
 196                           (0 << STM_USART_CR1_PS) |
 197                           (0 << STM_USART_CR1_PEIE) |
 198                           (0 << STM_USART_CR1_TXEIE) |
 199                           (0 << STM_USART_CR1_TCIE) |
 200                           (1 << STM_USART_CR1_RXNEIE) |
 201                           (0 << STM_USART_CR1_IDLEIE) |
 202                           (1 << STM_USART_CR1_TE) |
 203                           (1 << STM_USART_CR1_RE) |
 204                           (0 << STM_USART_CR1_RWU) |
 205                           (0 << STM_USART_CR1_SBK));
 206
 207         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
 208                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
 209                           (0 << STM_USART_CR2_CLKEN) |
 210                           (0 << STM_USART_CR2_CPOL) |
 211                           (0 << STM_USART_CR2_CPHA) |
 212                           (0 << STM_USART_CR2_LBCL) |
 213                           (0 << STM_USART_CR2_LBDIE) |
 214                           (0 << STM_USART_CR2_LBDL) |
 215                           (0 << STM_USART_CR2_ADD));
 216
 217         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBIT) |
 218                           (0 << STM_USART_CR3_CTSIE) |
 219                           (0 << STM_USART_CR3_CTSE) |
 220                           (0 << STM_USART_CR3_RTSE) |
 221                           (0 << STM_USART_CR3_DMAT) |
 222                           (0 << STM_USART_CR3_DMAR) |
 223                           (0 << STM_USART_CR3_SCEN) |
 224                           (0 << STM_USART_CR3_NACK) |
 225                           (0 << STM_USART_CR3_HDSEL) |
 226                           (0 << STM_USART_CR3_IRLP) |
 227                           (0 << STM_USART_CR3_IREN) |
 228                           (0 << STM_USART_CR3_EIE));
 229
 230         if (hw_flow)
 231                 usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
 232                                     (1 << STM_USART_CR3_RTSE));
 233
 234         /* Pick a 9600 baud rate */
 235         ao_usart_set_speed(usart, 9600);
 236 }
 237
 238 #if HAS_SERIAL_HW_FLOW
 239 static void
 240 ao_usart_set_flow(struct ao_stm_usart *usart)
 241 {
 242 }
 243 #endif
 244
 245 #if HAS_SERIAL_6
 246
 247 struct ao_stm_usart ao_stm_usart6;
 248
 249 void stm_usart6_isr(void) { ao_usart_isr(&ao_stm_usart6, USE_SERIAL_6_STDIN); }
 250
 251 char
 252 ao_serial6_getchar(void)
 253 {
 254         return ao_usart_getchar(&ao_stm_usart6);
 255 }
 256
 257 void
 258 ao_serial6_putchar(char c)
 259 {
 260         ao_usart_putchar(&ao_stm_usart6, c);
 261 }
 262
 263 int
 264 _ao_serial6_pollchar(void)
 265 {
 266         return _ao_usart_pollchar(&ao_stm_usart6);
 267 }
 268
 269 uint8_t
 270 _ao_serial6_sleep_for(uint16_t timeout)
 271 {
 272         return _ao_usart_sleep_for(&ao_stm_usart6, timeout);
 273 }
 274
 275 void
 276 ao_serial6_set_speed(uint32_t speed)
 277 {
 278         ao_usart_drain(&ao_stm_usart6);
 279         ao_usart_set_speed(&ao_stm_usart6, speed);
 280 }
 281
 282 void
 283 ao_serial6_drain(void)
 284 {
 285         ao_usart_drain(&ao_stm_usart6);
 286 }
 287 #endif  /* HAS_SERIAL_6 */
 288
 289 #if HAS_SERIAL_SW_FLOW
 290 static void
 291 ao_serial_set_sw_rts_cts(struct ao_stm_usart *usart,
 292                          void (*isr)(void),
 293                          struct stm_gpio *port_rts,
 294                          int pin_rts,
 295                          struct stm_gpio *port_cts,
 296                          int pin_cts)
 297 {
 298         /* Pull RTS low to note that there's space in the FIFO */
 299         ao_enable_output(port_rts, pin_rts, 0);
 300         usart->gpio_rts = port_rts;
 301         usart->pin_rts = pin_rts;
 302         usart->rts = 1;
 303
 304         ao_exti_setup(port_cts, pin_cts, AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_MED, isr);
 305         usart->gpio_cts = port_cts;
 306         usart->pin_cts = pin_cts;
 307 }
 308 #endif
 309
 310 void
 311 ao_usart_init(void)
 312 {
 313 #if HAS_SERIAL_6
 314         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART6EN);
 315
 316         ao_stm_usart6.reg = &stm_usart6;
 317         ao_stm_usart6.clk = AO_P2CLK;
 318
 319         ao_enable_port(SERIAL_6_RX_PORT);
 320         ao_enable_port(SERIAL_6_TX_PORT);
 321
 322         stm_afr_set(SERIAL_6_RX_PORT, SERIAL_6_RX_PIN, STM_AFR_AF8);
 323         stm_afr_set(SERIAL_6_TX_PORT, SERIAL_6_TX_PIN, STM_AFR_AF8);
 324
 325         stm_nvic_set_enable(STM_ISR_USART6_POS);
 326         stm_nvic_set_priority(STM_ISR_USART6_POS, AO_STM_NVIC_MED_PRIORITY);
 327
 328         _ao_usart_init(&ao_stm_usart6, USE_SERIAL_6_FLOW && !USE_SERIAL_6_SW_FLOW);
 329
 330 # if USE_SERIAL_6_FLOW
 331 #  if USE_SERIAL_6_SW_FLOW
 332         ao_serial_set_sw_rts_cts(&ao_stm_usart6,
 333                                  ao_serial6_cts,
 334                                  SERIAL_6_PORT_RTS,
 335                                  SERIAL_6_PIN_RTS,
 336                                  SERIAL_6_PORT_CTS,
 337                                  SERIAL_6_PIN_CTS);
 338 #  else
 339         stm_afr_set(SERIAL_6_PORT_RTS, SERIAL_6_PIN_RTS, STM_AFR_AF8);
 340         stm_afr_set(SERIAL_6_PORT_CTS, SERIAL_6_PIN_CTS, STM_AFR_AF8);
 341 #  endif
 342 #endif
 343
 344 #if USE_SERIAL_6_STDIN && !DELAY_SERIAL_6_STDIN
 345         ao_add_stdio(_ao_serial6_pollchar,
 346                      ao_serial6_putchar,
 347                      NULL);
 348 #endif
 349 #endif
 350 }