2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 #include "ao_product.h"
23 #define USB_DEBUG_DATA 0
26 #define debug(format, args...) printf(format, ## args);
28 #define debug(format, args...)
32 #define debug_data(format, args...) printf(format, ## args);
34 #define debug_data(format, args...)
37 struct ao_task ao_usb_task;
40 uint8_t dir_type_recip;
47 static uint8_t ao_usb_ep0_state;
48 static const uint8_t * ao_usb_ep0_in_data;
49 static uint8_t ao_usb_ep0_in_len;
50 static uint8_t ao_usb_ep0_in_pending;
51 static uint8_t ao_usb_ep0_in_buf[2];
52 static uint8_t ao_usb_ep0_out_len;
53 static uint8_t *ao_usb_ep0_out_data;
54 static union stm_usb_bdt *ao_usb_bdt;
55 static uint16_t ao_usb_sram_addr;
56 static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
57 static uint8_t ao_usb_tx_count;
58 static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
59 static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
61 #define AO_USB_INT_EPR 1
62 #define AO_USB_OUT_EPR 2
63 #define AO_USB_IN_EPR 3
66 * Pointers into the USB packet buffer area
68 static uint32_t *ao_usb_ep0_tx_buffer;
69 static uint32_t *ao_usb_ep0_rx_buffer;
71 static uint32_t *ao_usb_in_tx_buffer;
72 static uint32_t *ao_usb_out_rx_buffer;
74 static uint8_t ao_usb_in_flushed;
75 static uint8_t ao_usb_in_pending;
76 static uint8_t ao_usb_out_avail;
77 static uint8_t ao_usb_running;
78 static uint8_t ao_usb_configuration;
79 static uint8_t ueienx_0;
81 #define AO_USB_EP0_GOT_RESET 1
82 #define AO_USB_EP0_GOT_SETUP 2
83 #define AO_USB_EP0_GOT_RX_DATA 4
84 #define AO_USB_EP0_GOT_TX_ACK 8
86 static uint8_t ao_usb_ep0_receive;
87 static uint8_t ao_usb_address;
88 static uint8_t ao_usb_address_pending;
90 static inline uint32_t set_toggle(uint32_t current_value,
92 uint32_t desired_value)
94 return (current_value ^ desired_value) & mask;
97 static inline uint32_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
99 return (uint32_t *) (stm_usb_sram + 2 * sram_addr);
102 static inline uint32_t ao_usb_epr_stat_rx(uint32_t epr) {
103 return (epr >> STM_USB_EPR_STAT_RX) & STM_USB_EPR_STAT_RX_MASK;
106 static inline uint32_t ao_usb_epr_stat_tx(uint32_t epr) {
107 return (epr >> STM_USB_EPR_STAT_TX) & STM_USB_EPR_STAT_TX_MASK;
110 static inline uint32_t ao_usb_epr_ctr_rx(uint32_t epr) {
111 return (epr >> STM_USB_EPR_CTR_RX) & 1;
114 static inline uint32_t ao_usb_epr_ctr_tx(uint32_t epr) {
115 return (epr >> STM_USB_EPR_CTR_TX) & 1;
118 static inline uint32_t ao_usb_epr_setup(uint32_t epr) {
119 return (epr >> STM_USB_EPR_SETUP) & 1;
122 static inline uint32_t ao_usb_epr_dtog_rx(uint32_t epr) {
123 return (epr >> STM_USB_EPR_DTOG_RX) & 1;
126 static inline uint32_t ao_usb_epr_dtog_tx(uint32_t epr) {
127 return (epr >> STM_USB_EPR_DTOG_TX) & 1;
131 * Set current device address and mark the
132 * interface as active
135 ao_usb_set_address(uint8_t address)
137 debug("ao_usb_set_address %02x\n", address);
138 stm_usb.daddr = (1 << STM_USB_DADDR_EF) | address;
139 ao_usb_address_pending = 0;
143 * Set just endpoint 0, for use during startup
152 ao_usb_sram_addr = 0;
154 /* buffer table is at the start of USB memory */
156 ao_usb_bdt = (void *) stm_usb_sram;
158 ao_usb_sram_addr += 8 * STM_USB_BDT_SIZE;
160 /* Set up EP 0 - a Control end point with 32 bytes of in and out buffers */
162 ao_usb_bdt[0].single.addr_tx = ao_usb_sram_addr;
163 ao_usb_bdt[0].single.count_tx = 0;
164 ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
165 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
167 ao_usb_bdt[0].single.addr_rx = ao_usb_sram_addr;
168 ao_usb_bdt[0].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
169 (((AO_USB_CONTROL_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
170 ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
171 ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
174 epr = stm_usb.epr[0];
175 epr = ((STM_USB_EPR_CTR_RX_WRITE_INVARIANT << STM_USB_EPR_CTR_RX) |
176 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) |
178 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
179 (STM_USB_EPR_STAT_RX_VALID << STM_USB_EPR_STAT_RX)) |
180 (STM_USB_EPR_EP_TYPE_CONTROL << STM_USB_EPR_EP_TYPE) |
181 (0 << STM_USB_EPR_EP_KIND) |
182 (STM_USB_CTR_TX_WRITE_INVARIANT << STM_USB_EPR_CTR_TX) |
183 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) |
185 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
186 (STM_USB_EPR_STAT_TX_NAK << STM_USB_EPR_STAT_TX)) |
187 (AO_USB_CONTROL_EP << STM_USB_EPR_EA));
188 stm_usb.epr[0] = epr;
190 debug ("epr 0 now %x\n", stm_usb.epr[0]);
192 /* Clear all of the other endpoints */
193 for (e = 1; e < 8; e++) {
195 epr = stm_usb.epr[e];
196 epr = ((STM_USB_EPR_CTR_RX_WRITE_INVARIANT << STM_USB_EPR_CTR_RX) |
197 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) |
199 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
200 (STM_USB_EPR_STAT_RX_DISABLED << STM_USB_EPR_STAT_RX)) |
201 (STM_USB_EPR_EP_TYPE_CONTROL << STM_USB_EPR_EP_TYPE) |
202 (0 << STM_USB_EPR_EP_KIND) |
203 (STM_USB_CTR_TX_WRITE_INVARIANT << STM_USB_EPR_CTR_TX) |
204 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) |
206 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
207 (STM_USB_EPR_STAT_TX_DISABLED << STM_USB_EPR_STAT_TX)) |
208 (0 << STM_USB_EPR_EA));
209 stm_usb.epr[e] = epr;
213 ao_usb_set_address(0);
217 ao_usb_set_configuration(void)
221 debug ("ao_usb_set_configuration\n");
223 /* Set up the INT end point */
224 ao_usb_bdt[AO_USB_INT_EPR].single.addr_tx = ao_usb_sram_addr;
225 ao_usb_bdt[AO_USB_INT_EPR].single.count_tx = 0;
226 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
227 ao_usb_sram_addr += AO_USB_INT_SIZE;
230 epr = stm_usb.epr[AO_USB_INT_EPR];
231 epr = ((0 << STM_USB_EPR_CTR_RX) |
232 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
234 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
235 (STM_USB_EPR_STAT_RX_DISABLED << STM_USB_EPR_STAT_RX)) |
236 (STM_USB_EPR_EP_TYPE_CONTROL << STM_USB_EPR_EP_TYPE) |
237 (0 << STM_USB_EPR_EP_KIND) |
238 (0 << STM_USB_EPR_CTR_TX) |
239 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
241 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
242 (STM_USB_EPR_STAT_TX_NAK << STM_USB_EPR_STAT_TX)) |
243 (AO_USB_INT_EP << STM_USB_EPR_EA));
244 stm_usb.epr[AO_USB_INT_EPR] = epr;
246 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
247 AO_USB_INT_EPR, epr, stm_usb.epr[AO_USB_INT_EPR]);
249 /* Set up the OUT end point */
250 ao_usb_bdt[AO_USB_OUT_EPR].single.addr_rx = ao_usb_sram_addr;
251 ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx = ((1 << STM_USB_BDT_COUNT_RX_BL_SIZE) |
252 (((AO_USB_OUT_SIZE / 32) - 1) << STM_USB_BDT_COUNT_RX_NUM_BLOCK));
253 ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
254 ao_usb_sram_addr += AO_USB_OUT_SIZE;
257 epr = stm_usb.epr[AO_USB_OUT_EPR];
258 epr = ((0 << STM_USB_EPR_CTR_RX) |
259 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
261 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
262 (STM_USB_EPR_STAT_RX_VALID << STM_USB_EPR_STAT_RX)) |
263 (STM_USB_EPR_EP_TYPE_CONTROL << STM_USB_EPR_EP_TYPE) |
264 (0 << STM_USB_EPR_EP_KIND) |
265 (0 << STM_USB_EPR_CTR_TX) |
266 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
268 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
269 (STM_USB_EPR_STAT_TX_DISABLED << STM_USB_EPR_STAT_TX)) |
270 (AO_USB_OUT_EP << STM_USB_EPR_EA));
271 stm_usb.epr[AO_USB_OUT_EPR] = epr;
273 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
274 AO_USB_OUT_EPR, epr, stm_usb.epr[AO_USB_OUT_EPR]);
276 /* Set up the IN end point */
277 ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_sram_addr;
278 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
279 ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
280 ao_usb_sram_addr += AO_USB_IN_SIZE;
283 epr = stm_usb.epr[AO_USB_IN_EPR];
284 epr = ((0 << STM_USB_EPR_CTR_RX) |
285 (epr & (1 << STM_USB_EPR_DTOG_RX)) |
287 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX),
288 (STM_USB_EPR_STAT_RX_DISABLED << STM_USB_EPR_STAT_RX)) |
289 (STM_USB_EPR_EP_TYPE_CONTROL << STM_USB_EPR_EP_TYPE) |
290 (0 << STM_USB_EPR_EP_KIND) |
291 (0 << STM_USB_EPR_CTR_TX) |
292 (epr & (1 << STM_USB_EPR_DTOG_TX)) |
294 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX),
295 (STM_USB_EPR_STAT_TX_NAK << STM_USB_EPR_STAT_TX)) |
296 (AO_USB_IN_EP << STM_USB_EPR_EA));
297 stm_usb.epr[AO_USB_IN_EPR] = epr;
299 debug ("writing epr[%d] 0x%08x wrote 0x%08x\n",
300 AO_USB_IN_EPR, epr, stm_usb.epr[AO_USB_IN_EPR]);
304 static uint16_t control_count;
305 static uint16_t in_count;
306 static uint16_t out_count;
307 static uint16_t reset_count;
310 * Write these values to preserve register contents under HW changes
313 #define STM_USB_EPR_INVARIANT ((1 << STM_USB_EPR_CTR_RX) | \
314 (STM_USB_EPR_DTOG_RX_WRITE_INVARIANT << STM_USB_EPR_DTOG_RX) | \
315 (STM_USB_EPR_STAT_RX_WRITE_INVARIANT << STM_USB_EPR_STAT_RX) | \
316 (1 << STM_USB_EPR_CTR_TX) | \
317 (STM_USB_EPR_DTOG_TX_WRITE_INVARIANT << STM_USB_EPR_DTOG_TX) | \
318 (STM_USB_EPR_STAT_TX_WRITE_INVARIANT << STM_USB_EPR_STAT_TX))
320 #define STM_USB_EPR_INVARIANT_MASK ((1 << STM_USB_EPR_CTR_RX) | \
321 (STM_USB_EPR_DTOG_RX_MASK << STM_USB_EPR_DTOG_RX) | \
322 (STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX) | \
323 (1 << STM_USB_EPR_CTR_TX) | \
324 (STM_USB_EPR_DTOG_TX_MASK << STM_USB_EPR_DTOG_TX) | \
325 (STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX))
328 * These bits are purely under sw control, so preserve them in the
329 * register by re-writing what was read
331 #define STM_USB_EPR_PRESERVE_MASK ((STM_USB_EPR_EP_TYPE_MASK << STM_USB_EPR_EP_TYPE) | \
332 (1 << STM_USB_EPR_EP_KIND) | \
333 (STM_USB_EPR_EA_MASK << STM_USB_EPR_EA))
338 uint32_t istr = stm_usb.istr;
340 if (istr & (1 << STM_USB_ISTR_CTR)) {
341 uint8_t ep = istr & STM_USB_ISTR_EP_ID_MASK;
342 uint32_t epr, epr_write;
344 /* Preserve the SW write bits, don't mess with most HW writable bits,
345 * clear the CTR_RX and CTR_TX bits
347 epr = stm_usb.epr[ep];
349 epr_write &= STM_USB_EPR_PRESERVE_MASK;
350 epr_write |= STM_USB_EPR_INVARIANT;
351 epr_write &= ~(1 << STM_USB_EPR_CTR_RX);
352 epr_write &= ~(1 << STM_USB_EPR_CTR_TX);
353 stm_usb.epr[ep] = epr_write;
358 if (ao_usb_epr_ctr_rx(epr)) {
359 if (ao_usb_epr_setup(epr))
360 ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
362 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
364 if (ao_usb_epr_ctr_tx(epr))
365 ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
366 ao_wakeup(&ao_usb_ep0_receive);
370 if (ao_usb_epr_ctr_rx(epr)) {
371 ao_usb_out_avail = 1;
372 ao_wakeup(&ao_stdin_ready);
377 if (ao_usb_epr_ctr_tx(epr)) {
378 ao_usb_in_pending = 0;
379 ao_wakeup(&ao_usb_in_pending);
386 if (istr & (1 << STM_USB_ISTR_RESET)) {
388 stm_usb.istr &= ~(1 << STM_USB_ISTR_RESET);
389 ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
390 ao_wakeup(&ao_usb_ep0_receive);
401 stm_usb_fs_wkup(void)
403 /* USB wakeup, just clear the bit for now */
404 stm_usb.istr &= ~(1 << STM_USB_ISTR_WKUP);
407 static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
409 /* Walk through the list of descriptors and find a match
412 ao_usb_get_descriptor(uint16_t value)
414 const uint8_t *descriptor;
415 uint8_t type = value >> 8;
416 uint8_t index = value;
418 descriptor = ao_usb_descriptors;
419 while (descriptor[0] != 0) {
420 if (descriptor[1] == type && index-- == 0) {
421 if (type == AO_USB_DESC_CONFIGURATION)
422 ao_usb_ep0_in_len = descriptor[2];
424 ao_usb_ep0_in_len = descriptor[0];
425 ao_usb_ep0_in_data = descriptor;
428 descriptor += descriptor[0];
433 ao_usb_ep0_set_in_pending(uint8_t in_pending)
435 ao_usb_ep0_in_pending = in_pending;
439 ueienx_0 = ((1 << RXSTPE) | (1 << RXOUTE) | (1 << TXINE)); /* Enable IN interrupt */
443 /* The USB memory holds 16 bit values on 32 bit boundaries
444 * and must be accessed only in 32 bit units. Sigh.
448 ao_usb_write_byte(uint8_t byte, uint32_t *base, uint16_t offset)
452 *base = (*base & 0xff) | ((uint32_t) byte << 8);
454 *base = (*base & 0xff00) | byte;
459 ao_usb_write_short(uint16_t data, uint32_t *base, uint16_t offset)
461 base[offset>>1] = data;
465 ao_usb_write(const uint8_t *src, uint32_t *base, uint16_t offset, uint16_t bytes)
470 debug_data (" %02x", src[0]);
471 ao_usb_write_byte(*src++, base, offset++);
475 debug_data (" %02x %02x", src[0], src[1]);
476 ao_usb_write_short((src[1] << 8) | src[0], base, offset);
482 debug_data (" %02x", src[0]);
483 ao_usb_write_byte(*src, base, offset);
487 static inline uint8_t
488 ao_usb_read_byte(uint32_t *base, uint16_t offset)
492 return (*base >> 8) & 0xff;
497 static inline uint16_t
498 ao_usb_read_short(uint32_t *base, uint16_t offset)
500 return base[offset>>1];
504 ao_usb_read(uint8_t *dst, uint32_t *base, uint16_t offset, uint16_t bytes)
509 *dst++ = ao_usb_read_byte(base, offset++);
510 debug_data (" %02x", dst[-1]);
514 uint16_t s = ao_usb_read_short(base, offset);
517 debug_data (" %02x %02x", dst[0], dst[1]);
523 *dst = ao_usb_read_byte(base, offset);
524 debug_data (" %02x", dst[0]);
529 ao_usb_set_stat_tx(int ep, uint32_t stat_tx) {
530 uint32_t epr_write, epr_old, epr_new, epr_want;
533 epr_write = epr_old = stm_usb.epr[ep];
534 epr_write &= STM_USB_EPR_PRESERVE_MASK;
535 epr_write |= STM_USB_EPR_INVARIANT;
536 epr_write |= set_toggle(epr_old,
537 STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX,
538 stat_tx << STM_USB_EPR_STAT_TX);
539 stm_usb.epr[ep] = epr_write;
540 epr_new = stm_usb.epr[ep];
542 epr_want = (epr_old & ~(STM_USB_EPR_STAT_TX_MASK << STM_USB_EPR_STAT_TX)) |
543 (stat_tx << STM_USB_EPR_STAT_TX);
544 if (epr_new != epr_want) {
545 debug ("**** set_stat_tx to %x. old %08x want %08x write %08x new %08x\n",
546 stat_tx, epr_old, epr_want, epr_write, epr_new);
550 /* Send an IN data packet */
552 ao_usb_ep0_flush(void)
556 /* Check to see if the endpoint is still busy */
557 if (ao_usb_epr_stat_tx(stm_usb.epr[0]) == STM_USB_EPR_STAT_TX_VALID) {
558 debug("EP0 not accepting IN data\n");
559 ao_usb_ep0_set_in_pending(1);
561 this_len = ao_usb_ep0_in_len;
562 if (this_len > AO_USB_CONTROL_SIZE)
563 this_len = AO_USB_CONTROL_SIZE;
565 ao_usb_ep0_in_len -= this_len;
567 /* Set IN interrupt enable */
568 if (ao_usb_ep0_in_len == 0 && this_len != AO_USB_CONTROL_SIZE)
569 ao_usb_ep0_set_in_pending(0);
571 ao_usb_ep0_set_in_pending(1);
573 debug_data ("Flush EP0 len %d:", this_len);
574 ao_usb_write(ao_usb_ep0_in_data, ao_usb_ep0_tx_buffer, 0, this_len);
576 ao_usb_ep0_in_data += this_len;
578 /* Mark the endpoint as TX valid to send the packet */
579 ao_usb_bdt[0].single.count_tx = this_len;
580 ao_usb_set_stat_tx(0, STM_USB_EPR_STAT_TX_VALID);
581 debug ("queue tx. epr 0 now %08x\n", stm_usb.epr[0]);
586 ao_usb_set_stat_rx(int ep, uint32_t stat_rx) {
587 uint32_t epr_write, epr_old, epr_new, epr_want;
590 epr_write = epr_old = stm_usb.epr[ep];
591 epr_write &= STM_USB_EPR_PRESERVE_MASK;
592 epr_write |= STM_USB_EPR_INVARIANT;
593 epr_write |= set_toggle(epr_old,
594 STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX,
595 stat_rx << STM_USB_EPR_STAT_RX);
596 stm_usb.epr[ep] = epr_write;
597 epr_new = stm_usb.epr[ep];
599 epr_want = (epr_old & ~(STM_USB_EPR_STAT_RX_MASK << STM_USB_EPR_STAT_RX)) |
600 (stat_rx << STM_USB_EPR_STAT_RX);
601 if (epr_new != epr_want) {
602 debug ("**** set_stat_rx to %x. old %08x want %08x write %08x new %08x\n",
603 stat_rx, epr_old, epr_want, epr_write, epr_new);
607 /* Read data from the ep0 OUT fifo */
609 ao_usb_ep0_fill(void)
611 uint16_t len = ao_usb_bdt[0].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
613 if (len > ao_usb_ep0_out_len)
614 len = ao_usb_ep0_out_len;
615 ao_usb_ep0_out_len -= len;
617 /* Pull all of the data out of the packet */
618 debug_data ("Fill EP0 len %d:", len);
619 ao_usb_read(ao_usb_ep0_out_data, ao_usb_ep0_rx_buffer, 0, len);
621 ao_usb_ep0_out_data += len;
624 ao_usb_set_stat_rx(0, STM_USB_EPR_STAT_RX_VALID);
628 ao_usb_ep0_queue_byte(uint8_t a)
630 ao_usb_ep0_in_buf[ao_usb_ep0_in_len++] = a;
634 ao_usb_ep0_setup(void)
636 /* Pull the setup packet out of the fifo */
637 ao_usb_ep0_out_data = (uint8_t *) &ao_usb_setup;
638 ao_usb_ep0_out_len = 8;
640 if (ao_usb_ep0_out_len != 0) {
641 debug ("invalid setup packet length\n");
645 /* Figure out how to ACK the setup packet */
646 if (ao_usb_setup.dir_type_recip & AO_USB_DIR_IN) {
647 if (ao_usb_setup.length)
648 ao_usb_ep0_state = AO_USB_EP0_DATA_IN;
650 ao_usb_ep0_state = AO_USB_EP0_IDLE;
652 if (ao_usb_setup.length)
653 ao_usb_ep0_state = AO_USB_EP0_DATA_OUT;
655 ao_usb_ep0_state = AO_USB_EP0_IDLE;
658 ao_usb_ep0_in_data = ao_usb_ep0_in_buf;
659 ao_usb_ep0_in_len = 0;
660 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_TYPE_MASK) {
661 case AO_USB_TYPE_STANDARD:
662 debug ("Standard setup packet\n");
663 switch(ao_usb_setup.dir_type_recip & AO_USB_SETUP_RECIP_MASK) {
664 case AO_USB_RECIP_DEVICE:
665 debug ("Device setup packet\n");
666 switch(ao_usb_setup.request) {
667 case AO_USB_REQ_GET_STATUS:
668 debug ("get status\n");
669 ao_usb_ep0_queue_byte(0);
670 ao_usb_ep0_queue_byte(0);
672 case AO_USB_REQ_SET_ADDRESS:
673 debug ("set address %d\n", ao_usb_setup.value);
674 ao_usb_address = ao_usb_setup.value;
675 ao_usb_address_pending = 1;
677 case AO_USB_REQ_GET_DESCRIPTOR:
678 debug ("get descriptor %d\n", ao_usb_setup.value);
679 ao_usb_get_descriptor(ao_usb_setup.value);
681 case AO_USB_REQ_GET_CONFIGURATION:
682 debug ("get configuration %d\n", ao_usb_configuration);
683 ao_usb_ep0_queue_byte(ao_usb_configuration);
685 case AO_USB_REQ_SET_CONFIGURATION:
686 ao_usb_configuration = ao_usb_setup.value;
687 debug ("set configuration %d\n", ao_usb_configuration);
688 ao_usb_set_configuration();
692 case AO_USB_RECIP_INTERFACE:
693 debug ("Interface setup packet\n");
694 switch(ao_usb_setup.request) {
695 case AO_USB_REQ_GET_STATUS:
696 ao_usb_ep0_queue_byte(0);
697 ao_usb_ep0_queue_byte(0);
699 case AO_USB_REQ_GET_INTERFACE:
700 ao_usb_ep0_queue_byte(0);
702 case AO_USB_REQ_SET_INTERFACE:
706 case AO_USB_RECIP_ENDPOINT:
707 debug ("Endpoint setup packet\n");
708 switch(ao_usb_setup.request) {
709 case AO_USB_REQ_GET_STATUS:
710 ao_usb_ep0_queue_byte(0);
711 ao_usb_ep0_queue_byte(0);
717 case AO_USB_TYPE_CLASS:
718 debug ("Class setup packet\n");
719 switch (ao_usb_setup.request) {
720 case SET_LINE_CODING:
721 debug ("set line coding\n");
722 ao_usb_ep0_out_len = 7;
723 ao_usb_ep0_out_data = (uint8_t *) &ao_usb_line_coding;
725 case GET_LINE_CODING:
726 debug ("get line coding\n");
727 ao_usb_ep0_in_len = 7;
728 ao_usb_ep0_in_data = (uint8_t *) &ao_usb_line_coding;
730 case SET_CONTROL_LINE_STATE:
735 if (ao_usb_ep0_state != AO_USB_EP0_DATA_OUT) {
736 if (ao_usb_setup.length < ao_usb_ep0_in_len)
737 ao_usb_ep0_in_len = ao_usb_setup.length;
742 /* End point 0 receives all of the control messages. */
748 debug ("usb task started\n");
749 ao_usb_ep0_state = AO_USB_EP0_IDLE;
753 while (!(receive = ao_usb_ep0_receive))
754 ao_sleep(&ao_usb_ep0_receive);
755 ao_usb_ep0_receive = 0;
758 if (receive & AO_USB_EP0_GOT_RESET) {
763 if (receive & AO_USB_EP0_GOT_SETUP) {
767 if (receive & AO_USB_EP0_GOT_RX_DATA) {
768 debug ("\tgot rx data\n");
770 ao_usb_ep0_set_in_pending(1);
772 if (receive & AO_USB_EP0_GOT_TX_ACK) {
773 debug ("\tgot tx ack\n");
775 if (ao_usb_address_pending) {
776 ao_usb_set_address(ao_usb_address);
777 ao_usb_set_configuration();
783 /* Queue the current IN buffer for transmission */
787 debug ("send %d\n", ao_usb_tx_count);
788 ao_usb_write(ao_usb_tx_buffer, ao_usb_in_tx_buffer, 0, ao_usb_tx_count);
789 ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
790 ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
791 ao_usb_in_pending = 1;
795 /* Wait for a free IN buffer */
800 /* Check if the current buffer is writable */
801 if (ao_usb_tx_count < AO_USB_IN_SIZE)
805 /* Wait for an IN buffer to be ready */
806 while (ao_usb_in_pending)
807 ao_sleep(&ao_usb_in_pending);
813 ao_usb_flush(void) __critical
818 /* Anytime we've sent a character since
819 * the last time we flushed, we'll need
820 * to send a packet -- the only other time
821 * we would send a packet is when that
822 * packet was full, in which case we now
823 * want to send an empty packet
825 if (!ao_usb_in_flushed) {
826 ao_usb_in_flushed = 1;
828 /* Wait for an IN buffer to be ready */
829 while (ao_usb_in_pending)
830 ao_sleep(&ao_usb_in_pending);
837 ao_usb_putchar(char c) __critical __reentrant
844 ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
846 /* Send the packet when full */
847 if (ao_usb_tx_count == AO_USB_IN_SIZE)
849 ao_usb_in_flushed = 0;
853 ao_usb_out_recv(void)
855 ao_usb_out_avail = 0;
857 ao_usb_rx_count = ao_usb_bdt[AO_USB_OUT_EPR].single.count_rx & STM_USB_BDT_COUNT_RX_COUNT_RX_MASK;
859 debug ("recv %d\n", ao_usb_rx_count);
860 debug_data("Fill OUT len %d:", ao_usb_rx_count);
861 ao_usb_read(ao_usb_rx_buffer, ao_usb_out_rx_buffer, 0, ao_usb_rx_count);
866 ao_usb_set_stat_rx(AO_USB_OUT_EPR, STM_USB_EPR_STAT_RX_VALID);
870 _ao_usb_pollchar(void)
875 return AO_READ_AGAIN;
878 if (ao_usb_rx_pos != ao_usb_rx_count)
881 /* Check to see if a packet has arrived */
882 if (!ao_usb_out_avail)
883 return AO_READ_AGAIN;
887 /* Pull a character out of the fifo */
888 c = ao_usb_rx_buffer[ao_usb_rx_pos++];
893 ao_usb_pollchar(void)
897 c = _ao_usb_pollchar();
903 ao_usb_getchar(void) __critical
908 while ((c = _ao_usb_pollchar()) == AO_READ_AGAIN)
909 ao_sleep(&ao_stdin_ready);
917 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
920 /* Disable USB pull-up */
921 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
923 /* Switch off the device */
924 stm_usb.cntr = (1 << STM_USB_CNTR_PDWN) | (1 << STM_USB_CNTR_FRES);
926 /* Disable the interface */
927 stm_rcc.apb1enr &+ ~(1 << STM_RCC_APB1ENR_USBEN);
936 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGEN);
938 /* Disable USB pull-up */
939 stm_syscfg.pmc &= ~(1 << STM_SYSCFG_PMC_USB_PU);
941 /* Enable USB device */
942 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USBEN);
944 /* Do not touch the GPIOA configuration; USB takes priority
945 * over GPIO on pins A11 and A12, but if you select alternate
946 * input 10 (the documented correct selection), then USB is
947 * pulled low and doesn't work at all
950 /* Route interrupts */
951 stm_nvic_set_priority(STM_ISR_USB_LP_POS, 3);
952 stm_nvic_set_enable(STM_ISR_USB_LP_POS);
954 ao_usb_configuration = 0;
956 stm_usb.cntr = (1 << STM_USB_CNTR_FRES);
958 /* Clear the power down bit */
961 /* Clear any spurious interrupts */
964 debug ("ao_usb_enable\n");
966 /* Enable interrupts */
967 stm_usb.cntr = ((1 << STM_USB_CNTR_CTRM) |
968 (0 << STM_USB_CNTR_PMAOVRM) |
969 (0 << STM_USB_CNTR_ERRM) |
970 (0 << STM_USB_CNTR_WKUPM) |
971 (0 << STM_USB_CNTR_SUSPM) |
972 (1 << STM_USB_CNTR_RESETM) |
973 (0 << STM_USB_CNTR_SOFM) |
974 (0 << STM_USB_CNTR_ESOFM) |
975 (0 << STM_USB_CNTR_RESUME) |
976 (0 << STM_USB_CNTR_FSUSP) |
977 (0 << STM_USB_CNTR_LP_MODE) |
978 (0 << STM_USB_CNTR_PDWN) |
979 (0 << STM_USB_CNTR_FRES));
981 /* Enable USB pull-up */
982 stm_syscfg.pmc |= (1 << STM_SYSCFG_PMC_USB_PU);
986 struct ao_task ao_usb_echo_task;
994 c = ao_usb_getchar();
1004 printf ("control: %d out: %d in: %d reset: %d\n",
1005 control_count, out_count, in_count, reset_count);
1008 __code struct ao_cmds ao_usb_cmds[] = {
1009 { ao_usb_irq, "I\0Show USB interrupt counts" },
1018 debug ("ao_usb_init\n");
1019 ao_add_task(&ao_usb_task, ao_usb_ep0, "usb");
1021 ao_add_task(&ao_usb_echo_task, ao_usb_echo, "usb echo");
1023 ao_cmd_register(&ao_usb_cmds[0]);
1025 ao_add_stdio(ao_usb_pollchar, ao_usb_putchar, ao_usb_flush);