git.gag.com Git - fw/altos/blob - src/stm/ao_serial_stm.c

   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include <ao.h>
  19
  20 struct ao_stm_usart {
  21         struct ao_fifo          rx_fifo;
  22         struct ao_fifo          tx_fifo;
  23         struct stm_usart        *reg;
  24         uint8_t                 tx_started;
  25 };
  26
  27 void
  28 ao_debug_out(char c)
  29 {
  30         if (c == '\n')
  31                 ao_debug_out('\r');
  32         while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
  33         stm_usart1.dr = c;
  34 }
  35
  36 static void
  37 ao_usart_tx_start(struct ao_stm_usart *usart)
  38 {
  39         if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
  40         {
  41                 usart->tx_started = 1;
  42                 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
  43         }
  44 }
  45
  46 static void
  47 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
  48 {
  49         uint32_t        sr;
  50
  51         sr = usart->reg->sr;
  52         usart->reg->sr = 0;
  53
  54         if (sr & (1 << STM_USART_SR_RXNE)) {
  55                 char c = usart->reg->dr;
  56                 if (!ao_fifo_full(usart->rx_fifo))
  57                         ao_fifo_insert(usart->rx_fifo, c);
  58                 ao_wakeup(&usart->rx_fifo);
  59                 if (stdin)
  60                         ao_wakeup(&ao_stdin_ready);
  61         }
  62         if (sr & (1 << STM_USART_SR_TC)) {
  63                 usart->tx_started = 0;
  64                 ao_usart_tx_start(usart);
  65                 ao_wakeup(&usart->tx_fifo);
  66         }
  67 }
  68
  69 char
  70 ao_usart_getchar(struct ao_stm_usart *usart)
  71 {
  72         char c;
  73         cli();
  74         while (ao_fifo_empty(usart->rx_fifo))
  75                 ao_sleep(&usart->rx_fifo);
  76         ao_fifo_remove(usart->rx_fifo, c);
  77         sei();
  78         return c;
  79 }
  80
  81 char
  82 ao_usart_pollchar(struct ao_stm_usart *usart)
  83 {
  84         char    c;
  85         cli();
  86         if (ao_fifo_empty(usart->rx_fifo)) {
  87                 sei();
  88                 return AO_READ_AGAIN;
  89         }
  90         ao_fifo_remove(usart->rx_fifo,c);
  91         sei();
  92         return c;
  93 }
  94
  95 void
  96 ao_usart_putchar(struct ao_stm_usart *usart, char c)
  97 {
  98         cli();
  99         while (ao_fifo_full(usart->tx_fifo))
 100                 ao_sleep(&usart->tx_fifo);
 101         ao_fifo_insert(usart->tx_fifo, c);
 102         ao_usart_tx_start(usart);
 103         sei();
 104 }
 105
 106 void
 107 ao_usart_drain(struct ao_stm_usart *usart)
 108 {
 109         cli();
 110         while (!ao_fifo_empty(usart->tx_fifo))
 111                 ao_sleep(&usart->tx_fifo);
 112         sei();
 113 }
 114
 115 static const struct {
 116         uint32_t brr;
 117 } ao_usart_speeds[] = {
 118         [AO_SERIAL_SPEED_4800] = {
 119                 STM_APB1 / 4800
 120         },
 121         [AO_SERIAL_SPEED_9600] = {
 122                 STM_APB1 / 9600
 123         },
 124         [AO_SERIAL_SPEED_19200] = {
 125                 STM_APB1 / 19200
 126         },
 127         [AO_SERIAL_SPEED_57600] = {
 128                 STM_APB1 / 57600
 129         },
 130 };
 131
 132 void
 133 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
 134 {
 135         if (speed > AO_SERIAL_SPEED_57600)
 136                 return;
 137         stm_usart1.brr = ao_usart_speeds[speed].brr;
 138 }
 139
 140 void
 141 ao_usart_init(struct ao_stm_usart *usart)
 142 {
 143         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
 144                           (1 << STM_USART_CR1_UE) |
 145                           (0 << STM_USART_CR1_M) |
 146                           (0 << STM_USART_CR1_WAKE) |
 147                           (0 << STM_USART_CR1_PCE) |
 148                           (0 << STM_USART_CR1_PS) |
 149                           (0 << STM_USART_CR1_PEIE) |
 150                           (0 << STM_USART_CR1_TXEIE) |
 151                           (1 << STM_USART_CR1_TCIE) |
 152                           (1 << STM_USART_CR1_RXNEIE) |
 153                           (0 << STM_USART_CR1_IDLEIE) |
 154                           (1 << STM_USART_CR1_TE) |
 155                           (1 << STM_USART_CR1_RE) |
 156                           (0 << STM_USART_CR1_RWU) |
 157                           (0 << STM_USART_CR1_SBK));
 158
 159         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
 160                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
 161                           (0 << STM_USART_CR2_CLKEN) |
 162                           (0 << STM_USART_CR2_CPOL) |
 163                           (0 << STM_USART_CR2_CPHA) |
 164                           (0 << STM_USART_CR2_LBCL) |
 165                           (0 << STM_USART_CR2_LBDIE) |
 166                           (0 << STM_USART_CR2_LBDL) |
 167                           (0 << STM_USART_CR2_ADD));
 168
 169         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
 170                           (0 << STM_USART_CR3_CTSIE) |
 171                           (0 << STM_USART_CR3_CTSE) |
 172                           (0 << STM_USART_CR3_RTSE) |
 173                           (0 << STM_USART_CR3_DMAT) |
 174                           (0 << STM_USART_CR3_DMAR) |
 175                           (0 << STM_USART_CR3_SCEN) |
 176                           (0 << STM_USART_CR3_NACK) |
 177                           (0 << STM_USART_CR3_HDSEL) |
 178                           (0 << STM_USART_CR3_IRLP) |
 179                           (0 << STM_USART_CR3_IREN) |
 180                           (0 << STM_USART_CR3_EIE));
 181
 182         /* Pick a 9600 baud rate */
 183         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
 184 }
 185
 186 #if HAS_SERIAL_1
 187 struct ao_stm_usart ao_stm_usart1;
 188 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_STDIN); }
 189 #endif
 190 #if HAS_SERIAL_2
 191 struct ao_stm_usart ao_stm_usart2;
 192 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, 0); }
 193 #endif
 194 #if HAS_SERIAL_3
 195 struct ao_stm_usart ao_stm_usart3;
 196 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, 0); }
 197 #endif
 198
 199 void
 200 ao_serial_init(void)
 201 {
 202 #ifdef HAS_SERIAL_1
 203         /*
 204          *      TX      RX
 205          *      PA9     PA10
 206          *      PB6     PB7
 207          */
 208
 209         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 210
 211         stm_moder_set(&stm_gpioa, 9, STM_MODER_ALTERNATE);
 212         stm_moder_set(&stm_gpioa, 10, STM_MODER_ALTERNATE);
 213         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
 214         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
 215
 216         /* Enable USART */
 217         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
 218
 219         ao_stm_usart1.reg = &stm_usart1;
 220
 221         stm_nvic_set_enable(STM_ISR_USART1_POS);
 222         stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
 223 #if USE_SERIAL_STDIN
 224         ao_add_stdio(ao_serial_pollchar,
 225                      ao_serial_putchar,
 226                      NULL);
 227 #endif
 228 #endif
 229
 230 #if HAS_SERIAL_2
 231         /*
 232          *      TX      RX
 233          *      PA2     PA3
 234          *      PD5     PD6
 235          */
 236
 237         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 238
 239         stm_moder_set(&stm_gpioa, 2, STM_MODER_ALTERNATE);
 240         stm_moder_set(&stm_gpioa, 3, STM_MODER_ALTERNATE);
 241         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
 242         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
 243
 244         /* Enable USART */
 245         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
 246
 247         ao_stm_usart2.reg = &stm_usart2;
 248
 249         stm_nvic_set_enable(STM_ISR_USART2_POS);
 250         stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
 251 #endif
 252
 253 #if HAS_SERIAL_3
 254         /*
 255          *      TX      RX
 256          *      PB10    PB11
 257          *      PC10    PC11
 258          *      PD8     PD9
 259          */
 260         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 261
 262         stm_moder_set(&stm_gpiob, 10, STM_MODER_ALTERNATE);
 263         stm_moder_set(&stm_gpiob, 11, STM_MODER_ALTERNATE);
 264         stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
 265         stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
 266
 267         /* Enable USART */
 268         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
 269
 270         ao_stm_usart3.reg = &stm_usart3;
 271
 272         stm_nvic_set_enable(STM_ISR_USART3_POS);
 273         stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
 274 #endif
 275 }
 276
 277 #if HAS_SERIAL_1
 278 char
 279 ao_serial_getchar(void)
 280 {
 281         return ao_usart_getchar(&ao_stm_usart1);
 282 }
 283
 284 #if USE_SERIAL_STDIN
 285 char
 286 ao_serial_pollchar(void)
 287 {
 288         return ao_usart_pollchar(&ao_stm_usart1);
 289 }
 290 #endif
 291
 292 void
 293 ao_serial_putchar(char c)
 294 {
 295         ao_usart_putchar(&ao_stm_usart1, c);
 296 }
 297 #endif /* HAS_SERIAL_1 */
 298
 299