2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
30 _ao_usart_tx_start(struct ao_stm_usart *usart)
32 if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
34 usart->tx_started = 1;
35 usart->tx_running = 1;
36 usart->reg->cr1 |= (1 << STM_USART_CR1_TXEIE) | (1 << STM_USART_CR1_TCIE);
37 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
38 ao_wakeup(&usart->tx_fifo);
45 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
52 if (sr & (1 << STM_USART_SR_RXNE)) {
53 char c = usart->reg->dr;
54 if (!ao_fifo_full(usart->rx_fifo))
55 ao_fifo_insert(usart->rx_fifo, c);
56 ao_wakeup(&usart->rx_fifo);
58 ao_wakeup(&ao_stdin_ready);
60 if (sr & (1 << STM_USART_SR_TXE)) {
61 usart->tx_started = 0;
62 if (!_ao_usart_tx_start(usart))
63 usart->reg->cr1 &= ~(1<< STM_USART_CR1_TXEIE);
65 if (sr & (1 << STM_USART_SR_TC)) {
66 usart->tx_running = 0;
67 usart->reg->cr1 &= ~(1 << STM_USART_CR1_TCIE);
68 if (usart->draining) {
70 ao_wakeup(&usart->tx_fifo);
76 _ao_usart_pollchar(struct ao_stm_usart *usart)
80 if (ao_fifo_empty(usart->rx_fifo))
84 ao_fifo_remove(usart->rx_fifo,u);
86 ao_usb_putchar(c); ao_usb_flush();
92 ao_usart_getchar(struct ao_stm_usart *usart)
95 ao_arch_block_interrupts();
96 while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
97 ao_sleep(&usart->rx_fifo);
98 ao_arch_release_interrupts();
99 ao_usb_putchar(c); ao_usb_flush();
103 static inline uint8_t
104 _ao_usart_sleep_for(struct ao_stm_usart *usart, uint16_t timeout)
106 return ao_sleep_for(&usart->rx_fifo, timeout);
110 ao_usart_putchar(struct ao_stm_usart *usart, char c)
112 ao_usb_putchar(c); ao_usb_flush();
113 ao_arch_block_interrupts();
114 while (ao_fifo_full(usart->tx_fifo))
115 ao_sleep(&usart->tx_fifo);
116 ao_fifo_insert(usart->tx_fifo, c);
117 _ao_usart_tx_start(usart);
118 ao_arch_release_interrupts();
122 ao_usart_drain(struct ao_stm_usart *usart)
124 ao_arch_block_interrupts();
125 while (!ao_fifo_empty(usart->tx_fifo) || usart->tx_running) {
127 ao_sleep(&usart->tx_fifo);
129 ao_arch_release_interrupts();
132 static const struct {
134 } ao_usart_speeds[] = {
135 [AO_SERIAL_SPEED_4800] = {
138 [AO_SERIAL_SPEED_9600] = {
141 [AO_SERIAL_SPEED_19200] = {
144 [AO_SERIAL_SPEED_57600] = {
147 [AO_SERIAL_SPEED_115200] = {
153 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
155 if (speed > AO_SERIAL_SPEED_115200)
157 usart->reg->brr = ao_usart_speeds[speed].brr;
161 ao_usart_init(struct ao_stm_usart *usart)
163 usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
164 (1 << STM_USART_CR1_UE) |
165 (0 << STM_USART_CR1_M) |
166 (0 << STM_USART_CR1_WAKE) |
167 (0 << STM_USART_CR1_PCE) |
168 (0 << STM_USART_CR1_PS) |
169 (0 << STM_USART_CR1_PEIE) |
170 (0 << STM_USART_CR1_TXEIE) |
171 (0 << STM_USART_CR1_TCIE) |
172 (1 << STM_USART_CR1_RXNEIE) |
173 (0 << STM_USART_CR1_IDLEIE) |
174 (1 << STM_USART_CR1_TE) |
175 (1 << STM_USART_CR1_RE) |
176 (0 << STM_USART_CR1_RWU) |
177 (0 << STM_USART_CR1_SBK));
179 usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
180 (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
181 (0 << STM_USART_CR2_CLKEN) |
182 (0 << STM_USART_CR2_CPOL) |
183 (0 << STM_USART_CR2_CPHA) |
184 (0 << STM_USART_CR2_LBCL) |
185 (0 << STM_USART_CR2_LBDIE) |
186 (0 << STM_USART_CR2_LBDL) |
187 (0 << STM_USART_CR2_ADD));
189 usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
190 (0 << STM_USART_CR3_CTSIE) |
191 (0 << STM_USART_CR3_CTSE) |
192 (0 << STM_USART_CR3_RTSE) |
193 (0 << STM_USART_CR3_DMAT) |
194 (0 << STM_USART_CR3_DMAR) |
195 (0 << STM_USART_CR3_SCEN) |
196 (0 << STM_USART_CR3_NACK) |
197 (0 << STM_USART_CR3_HDSEL) |
198 (0 << STM_USART_CR3_IRLP) |
199 (0 << STM_USART_CR3_IREN) |
200 (0 << STM_USART_CR3_EIE));
202 /* Pick a 9600 baud rate */
203 ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
207 ao_usart_set_flow(struct ao_stm_usart *usart)
209 usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
210 (1 << STM_USART_CR3_RTSE));
215 struct ao_stm_usart ao_stm_usart1;
217 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
220 ao_serial1_getchar(void)
222 return ao_usart_getchar(&ao_stm_usart1);
226 ao_serial1_putchar(char c)
228 ao_usart_putchar(&ao_stm_usart1, c);
232 _ao_serial1_pollchar(void)
234 return _ao_usart_pollchar(&ao_stm_usart1);
238 _ao_serial1_sleep_for(uint16_t timeout)
240 return _ao_usart_sleep_for(&ao_stm_usart1, timeout);
244 ao_serial1_drain(void)
246 ao_usart_drain(&ao_stm_usart1);
250 ao_serial1_set_speed(uint8_t speed)
252 ao_usart_drain(&ao_stm_usart1);
253 ao_usart_set_speed(&ao_stm_usart1, speed);
255 #endif /* HAS_SERIAL_1 */
259 struct ao_stm_usart ao_stm_usart2;
261 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
264 ao_serial2_getchar(void)
266 return ao_usart_getchar(&ao_stm_usart2);
270 ao_serial2_putchar(char c)
272 ao_usart_putchar(&ao_stm_usart2, c);
276 _ao_serial2_pollchar(void)
278 return _ao_usart_pollchar(&ao_stm_usart2);
282 _ao_serial2_sleep_for(uint16_t timeout)
284 return _ao_usart_sleep_for(&ao_stm_usart2, timeout);
288 ao_serial2_drain(void)
290 ao_usart_drain(&ao_stm_usart2);
294 ao_serial2_set_speed(uint8_t speed)
296 ao_usart_drain(&ao_stm_usart2);
297 ao_usart_set_speed(&ao_stm_usart2, speed);
299 #endif /* HAS_SERIAL_2 */
303 struct ao_stm_usart ao_stm_usart3;
305 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
308 ao_serial3_getchar(void)
310 return ao_usart_getchar(&ao_stm_usart3);
314 ao_serial3_putchar(char c)
316 ao_usart_putchar(&ao_stm_usart3, c);
320 _ao_serial3_pollchar(void)
322 return _ao_usart_pollchar(&ao_stm_usart3);
326 _ao_serial3_sleep_for(uint16_t timeout)
328 return _ao_usart_sleep_for(&ao_stm_usart3, timeout);
332 ao_serial3_set_speed(uint8_t speed)
334 ao_usart_drain(&ao_stm_usart3);
335 ao_usart_set_speed(&ao_stm_usart3, speed);
339 ao_serial3_drain(void)
341 ao_usart_drain(&ao_stm_usart3);
343 #endif /* HAS_SERIAL_3 */
355 #if SERIAL_1_PA9_PA10
356 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
358 stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
359 stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
362 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
364 stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
365 stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
367 #error "No SERIAL_1 port configuration specified"
371 stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
373 ao_stm_usart1.reg = &stm_usart1;
374 ao_usart_init(&ao_stm_usart1);
376 stm_nvic_set_enable(STM_ISR_USART1_POS);
377 stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
378 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
379 ao_add_stdio(_ao_serial1_pollchar,
393 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
395 stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
396 stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
397 #if USE_SERIAL_2_FLOW
398 stm_afr_set(&stm_gpioa, 0, STM_AFR_AF7);
399 stm_afr_set(&stm_gpioa, 1, STM_AFR_AF7);
403 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
405 stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
406 stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
407 #if USE_SERIAL_2_FLOW
408 #error "Don't know how to set flowcontrol for serial 2 on PD"
411 #error "No SERIAL_2 port configuration specified"
415 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
417 ao_stm_usart2.reg = &stm_usart2;
418 ao_usart_init(&ao_stm_usart2);
419 #if USE_SERIAL_2_FLOW
420 ao_usart_set_flow(&ao_stm_usart2);
423 stm_nvic_set_enable(STM_ISR_USART2_POS);
424 stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
425 #if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
426 ao_add_stdio(_ao_serial2_pollchar,
439 #if SERIAL_3_PB10_PB11
440 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
442 stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
443 stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
445 #if SERIAL_3_PC10_PC11
446 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
448 stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
449 stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
452 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
454 stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
455 stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
457 #error "No SERIAL_3 port configuration specified"
462 stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
464 ao_stm_usart3.reg = &stm_usart3;
465 ao_usart_init(&ao_stm_usart3);
467 stm_nvic_set_enable(STM_ISR_USART3_POS);
468 stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
469 #if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
470 ao_add_stdio(_ao_serial3_pollchar,