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   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include <ao.h>
  19
  20 struct ao_stm_usart {
  21         struct ao_fifo          rx_fifo;
  22         struct ao_fifo          tx_fifo;
  23         struct stm_usart        *reg;
  24         uint8_t                 tx_started;
  25 };
  26
  27 #if HAS_SERIAL_1
  28 struct ao_stm_usart ao_stm_usart1;
  29 #endif
  30 #if HAS_SERIAL_2
  31 struct ao_stm_usart ao_stm_usart2;
  32 #endif
  33 #if HAS_SERIAL_3
  34 struct ao_stm_usart ao_stm_usart3;
  35 #endif
  36
  37 void
  38 ao_debug_out(char c)
  39 {
  40         if (c == '\n')
  41                 ao_debug_out('\r');
  42         while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
  43         stm_usart1.dr = c;
  44 }
  45
  46 #if 0
  47 void
  48 outbyte(char c)
  49 {
  50         putchar(c);
  51 }
  52 #endif
  53
  54 static void
  55 ao_usart_tx_start(struct ao_stm_usart *usart)
  56 {
  57         if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
  58         {
  59                 usart->tx_started = 1;
  60                 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
  61         }
  62 }
  63
  64 static void
  65 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
  66 {
  67         uint32_t        sr;
  68
  69         sr = usart->reg->sr;
  70         usart->reg->sr = 0;
  71
  72         if (sr & (1 << STM_USART_SR_RXNE)) {
  73                 char c = usart->reg->dr;
  74                 if (!ao_fifo_full(usart->rx_fifo))
  75                         ao_fifo_insert(usart->rx_fifo, c);
  76                 ao_wakeup(&usart->rx_fifo);
  77                 if (stdin)
  78                         ao_wakeup(&ao_stdin_ready);
  79         }
  80         if (sr & (1 << STM_USART_SR_TC)) {
  81                 usart->tx_started = 0;
  82                 ao_usart_tx_start(usart);
  83                 ao_wakeup(&usart->tx_fifo);
  84         }
  85 }
  86
  87 #if HAS_SERIAL_1
  88 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_STDIN); }
  89 #endif
  90 #if HAS_SERIAL_2
  91 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, 0); }
  92 #endif
  93 #if HAS_SERIAL_3
  94 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, 0); }
  95 #endif
  96
  97 char
  98 ao_usart_getchar(struct ao_stm_usart *usart)
  99 {
 100         char c;
 101         cli();
 102         while (ao_fifo_empty(usart->rx_fifo))
 103                 ao_sleep(&usart->rx_fifo);
 104         ao_fifo_remove(usart->rx_fifo, c);
 105         sei();
 106         return c;
 107 }
 108
 109 char
 110 ao_usart_pollchar(struct ao_stm_usart *usart)
 111 {
 112         char    c;
 113         cli();
 114         if (ao_fifo_empty(usart->rx_fifo)) {
 115                 sei();
 116                 return AO_READ_AGAIN;
 117         }
 118         ao_fifo_remove(usart->rx_fifo,c);
 119         sei();
 120         return c;
 121 }
 122
 123 void
 124 ao_usart_putchar(struct ao_stm_usart *usart, char c)
 125 {
 126         cli();
 127         while (ao_fifo_full(usart->tx_fifo))
 128                 ao_sleep(&usart->tx_fifo);
 129         ao_fifo_insert(usart->tx_fifo, c);
 130         ao_usart_tx_start(usart);
 131         sei();
 132 }
 133
 134 void
 135 ao_usart_drain(struct ao_stm_usart *usart)
 136 {
 137         cli();
 138         while (!ao_fifo_empty(usart->tx_fifo))
 139                 ao_sleep(&usart->tx_fifo);
 140         sei();
 141 }
 142
 143 static const struct {
 144         uint32_t brr;
 145 } ao_usart_speeds[] = {
 146         [AO_SERIAL_SPEED_4800] = {
 147                 STM_APB1 / 4800
 148         },
 149         [AO_SERIAL_SPEED_9600] = {
 150                 STM_APB1 / 9600
 151         },
 152         [AO_SERIAL_SPEED_19200] = {
 153                 STM_APB1 / 19200
 154         },
 155         [AO_SERIAL_SPEED_57600] = {
 156                 STM_APB1 / 57600
 157         },
 158 };
 159
 160 void
 161 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
 162 {
 163         if (speed > AO_SERIAL_SPEED_57600)
 164                 return;
 165         stm_usart1.brr = ao_usart_speeds[speed].brr;
 166 }
 167
 168 void
 169 ao_usart_init(struct ao_stm_usart *usart)
 170 {
 171         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
 172                           (1 << STM_USART_CR1_UE) |
 173                           (0 << STM_USART_CR1_M) |
 174                           (0 << STM_USART_CR1_WAKE) |
 175                           (0 << STM_USART_CR1_PCE) |
 176                           (0 << STM_USART_CR1_PS) |
 177                           (0 << STM_USART_CR1_PEIE) |
 178                           (0 << STM_USART_CR1_TXEIE) |
 179                           (1 << STM_USART_CR1_TCIE) |
 180                           (1 << STM_USART_CR1_RXNEIE) |
 181                           (0 << STM_USART_CR1_IDLEIE) |
 182                           (1 << STM_USART_CR1_TE) |
 183                           (1 << STM_USART_CR1_RE) |
 184                           (0 << STM_USART_CR1_RWU) |
 185                           (0 << STM_USART_CR1_SBK));
 186
 187         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
 188                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
 189                           (0 << STM_USART_CR2_CLKEN) |
 190                           (0 << STM_USART_CR2_CPOL) |
 191                           (0 << STM_USART_CR2_CPHA) |
 192                           (0 << STM_USART_CR2_LBCL) |
 193                           (0 << STM_USART_CR2_LBDIE) |
 194                           (0 << STM_USART_CR2_LBDL) |
 195                           (0 << STM_USART_CR2_ADD));
 196
 197         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
 198                           (0 << STM_USART_CR3_CTSIE) |
 199                           (0 << STM_USART_CR3_CTSE) |
 200                           (0 << STM_USART_CR3_RTSE) |
 201                           (0 << STM_USART_CR3_DMAT) |
 202                           (0 << STM_USART_CR3_DMAR) |
 203                           (0 << STM_USART_CR3_SCEN) |
 204                           (0 << STM_USART_CR3_NACK) |
 205                           (0 << STM_USART_CR3_HDSEL) |
 206                           (0 << STM_USART_CR3_IRLP) |
 207                           (0 << STM_USART_CR3_IREN) |
 208                           (0 << STM_USART_CR3_EIE));
 209
 210         /* Pick a 9600 baud rate */
 211         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
 212 }
 213
 214 void
 215 ao_serial_init(void)
 216 {
 217 #ifdef HAS_SERIAL_1
 218         /*
 219          *      TX      RX
 220          *      PA9     PA10
 221          *      PB6     PB7
 222          */
 223
 224         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 225
 226         stm_moder_set(&stm_gpioa, 9, STM_MODER_ALTERNATE);
 227         stm_moder_set(&stm_gpioa, 10, STM_MODER_ALTERNATE);
 228         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
 229         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
 230
 231         /* Enable USART */
 232         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
 233
 234         ao_stm_usart1.reg = &stm_usart1;
 235
 236         stm_nvic_set_enable(STM_ISR_USART1_POS);
 237         stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
 238 #if USE_SERIAL_STDIN
 239         ao_add_stdio(ao_serial_pollchar,
 240                      ao_serial_putchar,
 241                      NULL);
 242 #endif
 243 #endif
 244
 245 #if HAS_SERIAL_2
 246         /*
 247          *      TX      RX
 248          *      PA2     PA3
 249          *      PD5     PD6
 250          */
 251
 252         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 253
 254         stm_moder_set(&stm_gpioa, 2, STM_MODER_ALTERNATE);
 255         stm_moder_set(&stm_gpioa, 3, STM_MODER_ALTERNATE);
 256         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
 257         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
 258
 259         /* Enable USART */
 260         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
 261
 262         ao_stm_usart2.reg = &stm_usart2;
 263
 264         stm_nvic_set_enable(STM_ISR_USART2_POS);
 265         stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
 266 #endif
 267
 268 #if HAS_SERIAL_3
 269         /*
 270          *      TX      RX
 271          *      PB10    PB11
 272          *      PC10    PC11
 273          *      PD8     PD9
 274          */
 275         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 276
 277         stm_moder_set(&stm_gpiob, 10, STM_MODER_ALTERNATE);
 278         stm_moder_set(&stm_gpiob, 11, STM_MODER_ALTERNATE);
 279         stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
 280         stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
 281
 282         /* Enable USART */
 283         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
 284
 285         ao_stm_usart3.reg = &stm_usart3;
 286
 287         stm_nvic_set_enable(STM_ISR_USART3_POS);
 288         stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
 289 #endif
 290 }
 291
 292 #if HAS_SERIAL_1
 293 char
 294 ao_serial_getchar(void)
 295 {
 296         return ao_usart_getchar(&ao_stm_usart1);
 297 }
 298
 299 #if USE_SERIAL_STDIN
 300 char
 301 ao_serial_pollchar(void)
 302 {
 303         return ao_usart_pollchar(&ao_stm_usart1);
 304 }
 305 #endif
 306
 307 void
 308 ao_serial_putchar(char c)
 309 {
 310         ao_usart_putchar(&ao_stm_usart1, c);
 311 }
 312 #endif /* HAS_SERIAL_1 */
 313
 314