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   1 /*
   2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; version 2 of the License.
   7  *
   8  * This program is distributed in the hope that it will be useful, but
   9  * WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  11  * General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along
  14  * with this program; if not, write to the Free Software Foundation, Inc.,
  15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  16  */
  17
  18 #include <ao.h>
  19
  20 void
  21 ao_debug_out(char c)
  22 {
  23         if (c == '\n')
  24                 ao_debug_out('\r');
  25         while (!(stm_usart1.sr & (1 << STM_USART_SR_TXE)));
  26         stm_usart1.dr = c;
  27 }
  28
  29 static void
  30 _ao_usart_tx_start(struct ao_stm_usart *usart)
  31 {
  32         if (!ao_fifo_empty(usart->tx_fifo) && !usart->tx_started)
  33         {
  34                 usart->tx_started = 1;
  35                 ao_fifo_remove(usart->tx_fifo, usart->reg->dr);
  36         }
  37 }
  38
  39 static void
  40 ao_usart_isr(struct ao_stm_usart *usart, int stdin)
  41 {
  42         uint32_t        sr;
  43
  44         sr = usart->reg->sr;
  45         usart->reg->sr = 0;
  46
  47         if (sr & (1 << STM_USART_SR_RXNE)) {
  48                 char c = usart->reg->dr;
  49                 if (!ao_fifo_full(usart->rx_fifo))
  50                         ao_fifo_insert(usart->rx_fifo, c);
  51                 ao_wakeup(&usart->rx_fifo);
  52                 if (stdin)
  53                         ao_wakeup(&ao_stdin_ready);
  54         }
  55         if (sr & (1 << STM_USART_SR_TC)) {
  56                 usart->tx_started = 0;
  57                 _ao_usart_tx_start(usart);
  58                 ao_wakeup(&usart->tx_fifo);
  59         }
  60 }
  61
  62 int
  63 _ao_usart_pollchar(struct ao_stm_usart *usart)
  64 {
  65         int     c;
  66
  67         if (ao_fifo_empty(usart->rx_fifo))
  68                 c = AO_READ_AGAIN;
  69         else {
  70                 uint8_t u;
  71                 ao_fifo_remove(usart->rx_fifo,u);
  72                 c = u;
  73         }
  74         return c;
  75 }
  76
  77 char
  78 ao_usart_getchar(struct ao_stm_usart *usart)
  79 {
  80         int c;
  81         ao_arch_block_interrupts();
  82         while ((c = _ao_usart_pollchar(usart)) == AO_READ_AGAIN)
  83                 ao_sleep(&usart->rx_fifo);
  84         ao_arch_release_interrupts();
  85         return (char) c;
  86 }
  87
  88 static inline uint8_t
  89 _ao_usart_sleep(struct ao_stm_usart *usart)
  90 {
  91         return ao_sleep(&usart->rx_fifo);
  92 }
  93
  94 void
  95 ao_usart_putchar(struct ao_stm_usart *usart, char c)
  96 {
  97         ao_arch_block_interrupts();
  98         while (ao_fifo_full(usart->tx_fifo))
  99                 ao_sleep(&usart->tx_fifo);
 100         ao_fifo_insert(usart->tx_fifo, c);
 101         _ao_usart_tx_start(usart);
 102         ao_arch_release_interrupts();
 103 }
 104
 105 void
 106 ao_usart_drain(struct ao_stm_usart *usart)
 107 {
 108         ao_arch_block_interrupts();
 109         while (!ao_fifo_empty(usart->tx_fifo))
 110                 ao_sleep(&usart->tx_fifo);
 111         ao_arch_release_interrupts();
 112 }
 113
 114 static const struct {
 115         uint32_t brr;
 116 } ao_usart_speeds[] = {
 117         [AO_SERIAL_SPEED_4800] = {
 118                 AO_PCLK1 / 4800
 119         },
 120         [AO_SERIAL_SPEED_9600] = {
 121                 AO_PCLK1 / 9600
 122         },
 123         [AO_SERIAL_SPEED_19200] = {
 124                 AO_PCLK1 / 19200
 125         },
 126         [AO_SERIAL_SPEED_57600] = {
 127                 AO_PCLK1 / 57600
 128         },
 129         [AO_SERIAL_SPEED_115200] = {
 130                 AO_PCLK1 / 115200
 131         },
 132 };
 133
 134 void
 135 ao_usart_set_speed(struct ao_stm_usart *usart, uint8_t speed)
 136 {
 137         if (speed > AO_SERIAL_SPEED_115200)
 138                 return;
 139         usart->reg->brr = ao_usart_speeds[speed].brr;
 140 }
 141
 142 void
 143 ao_usart_init(struct ao_stm_usart *usart)
 144 {
 145         usart->reg->cr1 = ((0 << STM_USART_CR1_OVER8) |
 146                           (1 << STM_USART_CR1_UE) |
 147                           (0 << STM_USART_CR1_M) |
 148                           (0 << STM_USART_CR1_WAKE) |
 149                           (0 << STM_USART_CR1_PCE) |
 150                           (0 << STM_USART_CR1_PS) |
 151                           (0 << STM_USART_CR1_PEIE) |
 152                           (0 << STM_USART_CR1_TXEIE) |
 153                           (1 << STM_USART_CR1_TCIE) |
 154                           (1 << STM_USART_CR1_RXNEIE) |
 155                           (0 << STM_USART_CR1_IDLEIE) |
 156                           (1 << STM_USART_CR1_TE) |
 157                           (1 << STM_USART_CR1_RE) |
 158                           (0 << STM_USART_CR1_RWU) |
 159                           (0 << STM_USART_CR1_SBK));
 160
 161         usart->reg->cr2 = ((0 << STM_USART_CR2_LINEN) |
 162                           (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
 163                           (0 << STM_USART_CR2_CLKEN) |
 164                           (0 << STM_USART_CR2_CPOL) |
 165                           (0 << STM_USART_CR2_CPHA) |
 166                           (0 << STM_USART_CR2_LBCL) |
 167                           (0 << STM_USART_CR2_LBDIE) |
 168                           (0 << STM_USART_CR2_LBDL) |
 169                           (0 << STM_USART_CR2_ADD));
 170
 171         usart->reg->cr3 = ((0 << STM_USART_CR3_ONEBITE) |
 172                           (0 << STM_USART_CR3_CTSIE) |
 173                           (0 << STM_USART_CR3_CTSE) |
 174                           (0 << STM_USART_CR3_RTSE) |
 175                           (0 << STM_USART_CR3_DMAT) |
 176                           (0 << STM_USART_CR3_DMAR) |
 177                           (0 << STM_USART_CR3_SCEN) |
 178                           (0 << STM_USART_CR3_NACK) |
 179                           (0 << STM_USART_CR3_HDSEL) |
 180                           (0 << STM_USART_CR3_IRLP) |
 181                           (0 << STM_USART_CR3_IREN) |
 182                           (0 << STM_USART_CR3_EIE));
 183
 184         /* Pick a 9600 baud rate */
 185         ao_usart_set_speed(usart, AO_SERIAL_SPEED_9600);
 186 }
 187
 188 void
 189 ao_usart_set_flow(struct ao_stm_usart *usart)
 190 {
 191         usart->reg->cr3 |= ((1 << STM_USART_CR3_CTSE) |
 192                             (1 << STM_USART_CR3_RTSE));
 193 }
 194
 195 #if HAS_SERIAL_1
 196
 197 struct ao_stm_usart ao_stm_usart1;
 198
 199 void stm_usart1_isr(void) { ao_usart_isr(&ao_stm_usart1, USE_SERIAL_1_STDIN); }
 200
 201 char
 202 ao_serial1_getchar(void)
 203 {
 204         return ao_usart_getchar(&ao_stm_usart1);
 205 }
 206
 207 void
 208 ao_serial1_putchar(char c)
 209 {
 210         ao_usart_putchar(&ao_stm_usart1, c);
 211 }
 212
 213 int
 214 _ao_serial1_pollchar(void)
 215 {
 216         return _ao_usart_pollchar(&ao_stm_usart1);
 217 }
 218
 219 uint8_t
 220 _ao_serial1_sleep(void)
 221 {
 222         return _ao_usart_sleep(&ao_stm_usart1);
 223 }
 224
 225 void
 226 ao_serial1_drain(void)
 227 {
 228         ao_usart_drain(&ao_stm_usart1);
 229 }
 230
 231 void
 232 ao_serial1_set_speed(uint8_t speed)
 233 {
 234         ao_usart_set_speed(&ao_stm_usart1, speed);
 235 }
 236 #endif  /* HAS_SERIAL_1 */
 237
 238 #if HAS_SERIAL_2
 239
 240 struct ao_stm_usart ao_stm_usart2;
 241
 242 void stm_usart2_isr(void) { ao_usart_isr(&ao_stm_usart2, USE_SERIAL_2_STDIN); }
 243
 244 char
 245 ao_serial2_getchar(void)
 246 {
 247         return ao_usart_getchar(&ao_stm_usart2);
 248 }
 249
 250 void
 251 ao_serial2_putchar(char c)
 252 {
 253         ao_usart_putchar(&ao_stm_usart2, c);
 254 }
 255
 256 int
 257 _ao_serial2_pollchar(void)
 258 {
 259         return _ao_usart_pollchar(&ao_stm_usart2);
 260 }
 261
 262 uint8_t
 263 _ao_serial2_sleep(void)
 264 {
 265         return _ao_usart_sleep(&ao_stm_usart2);
 266 }
 267
 268 void
 269 ao_serial2_drain(void)
 270 {
 271         ao_usart_drain(&ao_stm_usart2);
 272 }
 273
 274 void
 275 ao_serial2_set_speed(uint8_t speed)
 276 {
 277         ao_usart_set_speed(&ao_stm_usart2, speed);
 278 }
 279 #endif  /* HAS_SERIAL_2 */
 280
 281 #if HAS_SERIAL_3
 282
 283 struct ao_stm_usart ao_stm_usart3;
 284
 285 void stm_usart3_isr(void) { ao_usart_isr(&ao_stm_usart3, USE_SERIAL_2_STDIN); }
 286
 287 char
 288 ao_serial3_getchar(void)
 289 {
 290         return ao_usart_getchar(&ao_stm_usart3);
 291 }
 292
 293 void
 294 ao_serial3_putchar(char c)
 295 {
 296         ao_usart_putchar(&ao_stm_usart3, c);
 297 }
 298
 299 int
 300 _ao_serial3_pollchar(void)
 301 {
 302         return _ao_usart_pollchar(&ao_stm_usart3);
 303 }
 304
 305 uint8_t
 306 _ao_serial3_sleep(void)
 307 {
 308         return _ao_usart_sleep(&ao_stm_usart3);
 309 }
 310
 311 void
 312 ao_serial3_set_speed(uint8_t speed)
 313 {
 314         ao_usart_set_speed(&ao_stm_usart3, speed);
 315 }
 316 #endif  /* HAS_SERIAL_3 */
 317
 318 void
 319 ao_serial_init(void)
 320 {
 321 #if HAS_SERIAL_1
 322         /*
 323          *      TX      RX
 324          *      PA9     PA10
 325          *      PB6     PB7     *
 326          */
 327
 328 #if SERIAL_1_PA9_PA10
 329         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 330
 331         stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
 332         stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
 333 #else
 334 #if SERIAL_1_PB6_PB7
 335         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 336
 337         stm_afr_set(&stm_gpiob, 6, STM_AFR_AF7);
 338         stm_afr_set(&stm_gpiob, 7, STM_AFR_AF7);
 339 #else
 340 #error "No SERIAL_1 port configuration specified"
 341 #endif
 342 #endif
 343         /* Enable USART */
 344         stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
 345
 346         ao_stm_usart1.reg = &stm_usart1;
 347         ao_usart_init(&ao_stm_usart1);
 348
 349         stm_nvic_set_enable(STM_ISR_USART1_POS);
 350         stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
 351 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
 352         ao_add_stdio(_ao_serial1_pollchar,
 353                      ao_serial1_putchar,
 354                      NULL);
 355 #endif
 356 #endif
 357
 358 #if HAS_SERIAL_2
 359         /*
 360          *      TX      RX
 361          *      PA2     PA3
 362          *      PD5     PD6
 363          */
 364
 365 #if SERIAL_2_PA2_PA3
 366         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
 367
 368         stm_afr_set(&stm_gpioa, 2, STM_AFR_AF7);
 369         stm_afr_set(&stm_gpioa, 3, STM_AFR_AF7);
 370 #if USE_SERIAL_2_FLOW
 371         stm_afr_set(&stm_gpioa, 0, STM_AFR_AF7);
 372         stm_afr_set(&stm_gpioa, 1, STM_AFR_AF7);
 373 #endif
 374 #else
 375 #if SERIAL_2_PD5_PD6
 376         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
 377
 378         stm_afr_set(&stm_gpiod, 5, STM_AFR_AF7);
 379         stm_afr_set(&stm_gpiod, 6, STM_AFR_AF7);
 380 #if USE_SERIAL_2_FLOW
 381 #error "Don't know how to set flowcontrol for serial 2 on PD"
 382 #endif
 383 #else
 384 #error "No SERIAL_2 port configuration specified"
 385 #endif
 386 #endif
 387         /* Enable USART */
 388         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART2EN);
 389
 390         ao_stm_usart2.reg = &stm_usart2;
 391         ao_usart_init(&ao_stm_usart2);
 392 #if USE_SERIAL_2_FLOW
 393         ao_usart_set_flow(&ao_stm_usart2);
 394 #endif
 395
 396         stm_nvic_set_enable(STM_ISR_USART2_POS);
 397         stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
 398 #if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
 399         ao_add_stdio(_ao_serial2_pollchar,
 400                      ao_serial2_putchar,
 401                      NULL);
 402 #endif
 403 #endif
 404
 405 #if HAS_SERIAL_3
 406         /*
 407          *      TX      RX
 408          *      PB10    PB11
 409          *      PC10    PC11
 410          *      PD8     PD9
 411          */
 412 #if SERIAL_3_PB10_PB11
 413         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOBEN);
 414
 415         stm_afr_set(&stm_gpiob, 10, STM_AFR_AF7);
 416         stm_afr_set(&stm_gpiob, 11, STM_AFR_AF7);
 417 #else
 418 #if SERIAL_3_PC10_PC11
 419         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOCEN);
 420
 421         stm_afr_set(&stm_gpioc, 10, STM_AFR_AF7);
 422         stm_afr_set(&stm_gpioc, 11, STM_AFR_AF7);
 423 #else
 424 #if SERIAL_3_PD8_PD9
 425         stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIODEN);
 426
 427         stm_afr_set(&stm_gpiod, 8, STM_AFR_AF7);
 428         stm_afr_set(&stm_gpiod, 9, STM_AFR_AF7);
 429 #else
 430 #error "No SERIAL_3 port configuration specified"
 431 #endif
 432 #endif
 433 #endif
 434         /* Enable USART */
 435         stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_USART3EN);
 436
 437         ao_stm_usart3.reg = &stm_usart3;
 438         ao_usart_init(&ao_stm_usart3);
 439
 440         stm_nvic_set_enable(STM_ISR_USART3_POS);
 441         stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
 442 #if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
 443         ao_add_stdio(_ao_serial3_pollchar,
 444                      ao_serial3_putchar,
 445                      NULL);
 446 #endif
 447 #endif
 448 }