altos: Add TeleMega v2.0, including PWM driver
[fw/altos] / src / stm / ao_pwm_stm.c
1 /*
2  * Copyright © 2015 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; version 2 of the License.
7  *
8  * This program is distributed in the hope that it will be useful, but
9  * WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
11  * General Public License for more details.
12  *
13  * You should have received a copy of the GNU General Public License along
14  * with this program; if not, write to the Free Software Foundation, Inc.,
15  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
16  */
17
18 #include "ao.h"
19 #include "ao_pwm.h"
20
21 static uint8_t  pwm_running;
22
23 static uint16_t pwm_value[NUM_PWM];
24
25 static void
26 ao_pwm_up(void)
27 {
28         if (pwm_running++ == 0) {
29                 struct stm_tim234       *tim = &AO_PWM_TIMER;
30                 tim->ccr1 = 0;
31                 tim->ccr2 = 0;
32                 tim->ccr3 = 0;
33                 tim->ccr4 = 0;
34                 tim->arr = PWM_MAX;     /* turn on the timer */
35         }
36 }
37
38 static void
39 ao_pwm_down(void)
40 {
41         if (--pwm_running == 0) {
42                 struct stm_tim234       *tim = &AO_PWM_TIMER;
43                 tim->arr = 0;   /* turn off the timer */
44         }
45 }
46
47 void
48 ao_pwm_set(uint8_t pwm, uint16_t value)
49 {
50         struct stm_tim234       *tim = &AO_PWM_TIMER;
51
52         if (value != 0) {
53                 if (pwm_value[pwm] == 0)
54                         ao_pwm_up();
55         } else {
56                 if (pwm_value[pwm] != 0)
57                         ao_pwm_down();
58         }
59         pwm_value[pwm] = value;
60         switch (pwm) {
61         case 0:
62                 tim->ccr1 = value;
63                 break;
64         case 1:
65                 tim->ccr2 = value;
66                 break;
67         case 2:
68                 tim->ccr3 = value;
69                 break;
70         case 3:
71                 tim->ccr4 = value;
72                 break;
73         }
74 }
75
76 static void
77 ao_pwm_cmd(void)
78 {
79         uint8_t ch;
80         uint16_t val;
81
82         ao_cmd_decimal();
83         ch = ao_cmd_lex_u32;
84         ao_cmd_decimal();
85         val = ao_cmd_lex_u32;
86         if (ao_cmd_status != ao_cmd_success)
87                 return;
88
89         printf("Set channel %d to %d\n", ch, val);
90         ao_pwm_set(ch, val);
91 }
92
93 static const struct ao_cmds ao_pwm_cmds[] = {
94         { ao_pwm_cmd,   "P <ch> <val>\0Set PWM ch to val" },
95         { 0, NULL },
96 };
97
98 void
99 ao_pwm_init(void)
100 {
101         struct stm_tim234       *tim = &AO_PWM_TIMER;
102
103         stm_rcc.apb1enr |= AO_PWM_TIMER_ENABLE;
104         tim->ccr1 = 0;
105         tim->ccr2 = 0;
106         tim->ccr3 = 0;
107         tim->ccr4 = 0;
108         tim->arr = 0;   /* turn off the timer */
109         tim->psc = 0;
110         tim->cnt = 0;
111         tim->ccer = ((1 << STM_TIM234_CCER_CC1E) |
112                      (0 << STM_TIM234_CCER_CC1P) |
113                      (1 << STM_TIM234_CCER_CC2E) |
114                      (0 << STM_TIM234_CCER_CC2P) |
115                      (1 << STM_TIM234_CCER_CC3E) |
116                      (0 << STM_TIM234_CCER_CC3P) |
117                      (1 << STM_TIM234_CCER_CC4E) |
118                      (0 << STM_TIM234_CCER_CC4P));
119
120         tim->ccmr1 = ((0 << STM_TIM234_CCMR1_OC2CE) |
121                       (STM_TIM234_CCMR1_OC2M_PWM_MODE_1 << STM_TIM234_CCMR1_OC2M) |
122                       (1 << STM_TIM234_CCMR1_OC2PE) |
123                       (0 << STM_TIM234_CCMR1_OC2FE) |
124                       (STM_TIM234_CCMR1_CC2S_OUTPUT << STM_TIM234_CCMR1_CC2S) |
125
126                       (0 << STM_TIM234_CCMR1_OC1CE) |
127                       (STM_TIM234_CCMR1_OC1M_PWM_MODE_1 << STM_TIM234_CCMR1_OC1M) |
128                       (1 << STM_TIM234_CCMR1_OC1PE) |
129                       (0 << STM_TIM234_CCMR1_OC1FE) |
130                       (STM_TIM234_CCMR1_CC1S_OUTPUT << STM_TIM234_CCMR1_CC1S));
131
132
133         tim->ccmr2 = ((0 << STM_TIM234_CCMR2_OC4CE) |
134                       (STM_TIM234_CCMR2_OC4M_PWM_MODE_1 << STM_TIM234_CCMR2_OC4M) |
135                       (1 << STM_TIM234_CCMR2_OC4PE) |
136                       (0 << STM_TIM234_CCMR2_OC4FE) |
137                       (STM_TIM234_CCMR2_CC4S_OUTPUT << STM_TIM234_CCMR2_CC4S) |
138
139                       (0 << STM_TIM234_CCMR2_OC3CE) |
140                       (STM_TIM234_CCMR2_OC3M_PWM_MODE_1 << STM_TIM234_CCMR2_OC3M) |
141                       (1 << STM_TIM234_CCMR2_OC3PE) |
142                       (0 << STM_TIM234_CCMR2_OC3FE) |
143                       (STM_TIM234_CCMR2_CC3S_OUTPUT << STM_TIM234_CCMR2_CC3S));
144         tim->egr = 0;
145
146         tim->sr = 0;
147         tim->dier = 0;
148         tim->smcr = 0;
149         tim->cr2 = ((0 << STM_TIM234_CR2_TI1S) |
150                     (STM_TIM234_CR2_MMS_RESET<< STM_TIM234_CR2_MMS) |
151                     (0 << STM_TIM234_CR2_CCDS));
152
153         tim->cr1 = ((STM_TIM234_CR1_CKD_1 << STM_TIM234_CR1_CKD) |
154                     (1 << STM_TIM234_CR1_ARPE) |
155                     (STM_TIM234_CR1_CMS_EDGE << STM_TIM234_CR1_CMS) |
156                     (STM_TIM234_CR1_DIR_UP << STM_TIM234_CR1_DIR) |
157                     (0 << STM_TIM234_CR1_OPM) |
158                     (0 << STM_TIM234_CR1_URS) |
159                     (0 << STM_TIM234_CR1_UDIS) |
160                     (1 << STM_TIM234_CR1_CEN));
161
162         stm_afr_set(&stm_gpiod, 12, STM_AFR_AF2);
163 #if NUM_PWM > 1
164         stm_afr_set(&stm_gpiod, 13, STM_AFR_AF2);
165 #endif
166 #if NUM_PWM > 2
167         stm_afr_set(&stm_gpiod, 14, STM_AFR_AF2);
168 #endif
169 #if NUM_PWM > 3
170         stm_afr_set(&stm_gpiod, 15, STM_AFR_AF2);
171 #endif
172
173         ao_cmd_register(&ao_pwm_cmds[0]);
174 }