2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
22 struct ao_dma_config {
26 uint8_t ao_dma_done[NUM_DMA];
28 static struct ao_dma_config ao_dma_config[NUM_DMA];
29 static uint8_t ao_dma_mutex[NUM_DMA];
30 static uint8_t ao_dma_active;
33 ao_dma_isr(uint8_t index) {
34 /* Get channel interrupt bits */
35 uint32_t isr = stm_dma.isr & (STM_DMA_ISR_MASK <<
40 if (ao_dma_config[index].isr)
41 (*ao_dma_config[index].isr)();
43 ao_dma_done[index] = 1;
44 ao_wakeup(&ao_dma_done[index]);
48 void stm_dma1_channel1_isr(void) { ao_dma_isr(STM_DMA_INDEX(1)); }
49 void stm_dma1_channel2_isr(void) { ao_dma_isr(STM_DMA_INDEX(2)); }
50 void stm_dma1_channel3_isr(void) { ao_dma_isr(STM_DMA_INDEX(3)); }
51 void stm_dma1_channel4_isr(void) { ao_dma_isr(STM_DMA_INDEX(4)); }
52 void stm_dma1_channel5_isr(void) { ao_dma_isr(STM_DMA_INDEX(5)); }
53 void stm_dma1_channel6_isr(void) { ao_dma_isr(STM_DMA_INDEX(6)); }
54 void stm_dma1_channel7_isr(void) { ao_dma_isr(STM_DMA_INDEX(7)); }
57 ao_dma_set_transfer(uint8_t index,
58 volatile void *peripheral,
63 ao_mutex_get(&ao_dma_mutex[index]);
65 if (ao_dma_active++ == 0)
66 stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
68 stm_dma.channel[index].ccr = ccr | (1 << STM_DMA_CCR_TCIE);
69 stm_dma.channel[index].cndtr = count;
70 stm_dma.channel[index].cpar = peripheral;
71 stm_dma.channel[index].cmar = memory;
72 ao_dma_config[index].isr = NULL;
76 ao_dma_set_isr(uint8_t index, void (*isr)(void))
78 ao_dma_config[index].isr = isr;
82 ao_dma_start(uint8_t index)
84 ao_dma_done[index] = 0;
85 stm_dma.channel[index].ccr |= (1 << STM_DMA_CCR_EN);
89 ao_dma_done_transfer(uint8_t index)
91 stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
93 if (--ao_dma_active == 0)
94 stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
96 ao_mutex_put(&ao_dma_mutex[index]);
100 ao_dma_abort(uint8_t index)
102 stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
110 for (index = 0; index < STM_NUM_DMA; index++) {
111 stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
112 stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index, 4);