b2e6aa7f601a2f053a50941cd29816f995893750
[fw/altos] / src / samd21 / ao_adc_samd21.c
1 /*
2  * Copyright © 2019 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation, either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * General Public License for more details.
13  */
14
15 #include <ao.h>
16 #include <ao_adc-samd21.h>
17
18 static void
19 ao_adc_sync(void)
20 {
21         while (samd21_adc.status & (1 << SAMD21_ADC_STATUS_SYNCBUSY))
22                 ;
23 }
24
25 static uint16_t
26 ao_adc_do_conversion(void)
27 {
28         ao_adc_sync();
29         samd21_adc.swtrig = (1 << SAMD21_ADC_SWTRIG_START);
30         ao_adc_sync();
31         while ((samd21_adc.intflag & (1 << SAMD21_ADC_INTFLAG_RESRDY)) == 0)
32                 ao_adc_sync();
33         ao_adc_sync();
34         return samd21_adc.result;
35 }
36
37 uint16_t
38 ao_adc_read(uint8_t channel)
39 {
40         ao_adc_sync();
41         samd21_adc.inputctrl = ((channel << SAMD21_ADC_INPUTCTRL_MUXPOS) |
42                                 (SAMD21_ADC_INPUTCTRL_MUXNEG_GND << SAMD21_ADC_INPUTCTRL_MUXNEG) |
43                                 (0 << SAMD21_ADC_INPUTCTRL_INPUTSCAN) |
44                                 (0 << SAMD21_ADC_INPUTCTRL_INPUTOFFSET) |
45                                 (SAMD21_ADC_INPUTCTRL_GAIN_DIV2 << SAMD21_ADC_INPUTCTRL_GAIN));
46
47         /* Read twice and discard the first value as recommended by app note
48          * http://www.atmel.com/images/Atmel-42645-ADC-Configurations-with-Examples_ApplicationNote_AT11481.pdf
49          */
50         (void) ao_adc_do_conversion();
51         return ao_adc_do_conversion();
52 }
53
54 void
55 ao_adc_init(void)
56 {
57         /* supply a clock */
58         samd21_gclk_clkctrl(0, SAMD21_GCLK_CLKCTRL_ID_ADC);
59
60         /* enable the device */
61         samd21_pm.apbcmask |= (1 << SAMD21_PM_APBCMASK_ADC);
62
63         /* Reset */
64         samd21_adc.ctrla = (1 << SAMD21_ADC_CTRLA_SWRST);
65
66         ao_adc_sync();
67
68         while ((samd21_adc.ctrla & (1 << SAMD21_ADC_CTRLA_SWRST)) != 0 ||
69                (samd21_adc.status & (1 << SAMD21_ADC_STATUS_SYNCBUSY)) != 0)
70                 ao_adc_sync();
71
72         /* Load ADC calibration values */
73         uint32_t b = (samd21_aux1.calibration >> SAMD21_AUX1_CALIBRATION_ADC_BIASCAL) & SAMD21_AUX1_CALIBRATION_ADC_BIASCAL_MASK;
74         uint32_t l = (samd21_aux1.calibration >> SAMD21_AUX1_CALIBRATION_ADC_LINEARITY) & SAMD21_AUX1_CALIBRATION_ADC_LINEARITY_MASK;
75
76         samd21_adc.calib = ((b << SAMD21_ADC_CALIB_BIAS_CAL) |
77                             (l << SAMD21_ADC_CALIB_LINEARITY_CAL));
78
79
80         ao_adc_sync();
81
82         samd21_adc.ctrlb = ((0 << SAMD21_ADC_CTRLB_DIFFMODE) |
83                             (0 << SAMD21_ADC_CTRLB_LEFTADJ) |
84                             (0 << SAMD21_ADC_CTRLB_FREERUN) |
85                             (0 << SAMD21_ADC_CTRLB_CORREN) |
86                             (SAMD21_ADC_CTRLB_RESSEL_12BIT << SAMD21_ADC_CTRLB_RESSEL) |
87                             (SAMD21_ADC_CTRLB_PRESCALER_DIV512 << SAMD21_ADC_CTRLB_PRESCALER));
88
89         ao_adc_sync();
90
91         samd21_adc.sampctrl = 0x1f;
92
93         ao_adc_sync();
94
95         samd21_adc.refctrl = (SAMD21_ADC_REFCTRL_REFSEL_INTVCC1 << SAMD21_ADC_REFCTRL_REFSEL);
96
97         ao_adc_sync();
98
99         samd21_adc.ctrla = (1 << SAMD21_ADC_CTRLA_ENABLE);
100 }