- STM_USART1->usart_cr1 = ((0 << STM_USART_CR1_OVER8) |
- (1 << STM_USART_CR1_UE) |
- (0 << STM_USART_CR1_M) |
- (0 << STM_USART_CR1_WAKE) |
- (0 << STM_USART_CR1_PCE) |
- (0 << STM_USART_CR1_PS) |
- (0 << STM_USART_CR1_PEIE) |
- (0 << STM_USART_CR1_TXEIE) | /* XXX enable */
- (0 << STM_USART_CR1_TCIE) |
- (0 << STM_USART_CR1_RXNEIE) | /* XXX enable */
- (0 << STM_USART_CR1_IDLEIE) |
- (1 << STM_USART_CR1_TE) |
- (1 << STM_USART_CR1_RE) |
- (0 << STM_USART_CR1_RWU) |
- (0 << STM_USART_CR1_SBK));
-
- STM_USART1->usart_cr2 = 0;
- STM_USART1->usart_cr3 = 0;
+ stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOAEN);
+
+ stm_moder_set(&stm_gpioa, 9, STM_MODER_ALTERNATE);
+ stm_moder_set(&stm_gpioa, 10, STM_MODER_ALTERNATE);
+ stm_afr_set(&stm_gpioa, 9, STM_AFR_AF7);
+ stm_afr_set(&stm_gpioa, 10, STM_AFR_AF7);
+
+ /* Enable USART1 */
+ stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_USART1EN);
+
+ stm_usart1.cr1 = ((0 << STM_USART_CR1_OVER8) |
+ (1 << STM_USART_CR1_UE) |
+ (0 << STM_USART_CR1_M) |
+ (0 << STM_USART_CR1_WAKE) |
+ (0 << STM_USART_CR1_PCE) |
+ (0 << STM_USART_CR1_PS) |
+ (0 << STM_USART_CR1_PEIE) |
+ (1 << STM_USART_CR1_TXEIE) |
+ (0 << STM_USART_CR1_TCIE) |
+ (1 << STM_USART_CR1_RXNEIE) |
+ (0 << STM_USART_CR1_IDLEIE) |
+ (1 << STM_USART_CR1_TE) |
+ (1 << STM_USART_CR1_RE) |
+ (0 << STM_USART_CR1_RWU) |
+ (0 << STM_USART_CR1_SBK));
+
+ stm_usart1.cr2 = ((0 << STM_USART_CR2_LINEN) |
+ (STM_USART_CR2_STOP_1 << STM_USART_CR2_STOP) |
+ (0 << STM_USART_CR2_CLKEN) |
+ (0 << STM_USART_CR2_CPOL) |
+ (0 << STM_USART_CR2_CPHA) |
+ (0 << STM_USART_CR2_LBCL) |
+ (0 << STM_USART_CR2_LBDIE) |
+ (0 << STM_USART_CR2_LBDL) |
+ (0 << STM_USART_CR2_ADD));
+
+ stm_usart1.cr3 = ((0 << STM_USART_CR3_ONEBITE) |
+ (0 << STM_USART_CR3_CTSIE) |
+ (0 << STM_USART_CR3_CTSE) |
+ (0 << STM_USART_CR3_RTSE) |
+ (0 << STM_USART_CR3_DMAT) |
+ (0 << STM_USART_CR3_DMAR) |
+ (0 << STM_USART_CR3_SCEN) |
+ (0 << STM_USART_CR3_NACK) |
+ (0 << STM_USART_CR3_HDSEL) |
+ (0 << STM_USART_CR3_IRLP) |
+ (0 << STM_USART_CR3_IREN) |
+ (0 << STM_USART_CR3_EIE));