~(STM_MODER_MASK << STM_MODER_SHIFT(pin))) |
value << STM_MODER_SHIFT(pin));
}
-
+
+static inline uint32_t
+stm_spread_mask(uint16_t mask) {
+ uint32_t m = mask;
+
+ /* 0000000000000000mmmmmmmmmmmmmmmm */
+ m = (m & 0xff) | ((m & 0xff00) << 8);
+ /* 00000000mmmmmmmm00000000mmmmmmmm */
+ m = (m & 0x000f000f) | ((m & 0x00f000f0) << 4);
+ /* 0000mmmm0000mmmm0000mmmm0000mmmm */
+ m = (m & 0x03030303) | ((m & 0x0c0c0c0c) << 2);
+ /* 00mm00mm00mm00mm00mm00mm00mm00mm */
+ m = (m & 0x11111111) | ((m & 0x22222222) << 2);
+ /* 0m0m0m0m0m0m0m0m0m0m0m0m0m0m0m0m */
+ return m;
+}
+
+static inline void
+stm_moder_set_mask(struct stm_gpio *gpio, uint16_t mask, uint32_t value) {
+ uint32_t bits32 = stm_spread_mask(mask);
+ uint32_t mask32 = 3 * bits32;
+ uint32_t value32 = (value & 3) * bits32;
+
+ gpio->moder = ((gpio->moder & ~mask32) | value32);
+}
+
static inline uint32_t
stm_moder_get(struct stm_gpio *gpio, int pin) {
return (gpio->moder >> STM_MODER_SHIFT(pin)) & STM_MODER_MASK;
~(STM_OTYPER_MASK << STM_OTYPER_SHIFT(pin))) |
value << STM_OTYPER_SHIFT(pin));
}
-
+
static inline uint32_t
stm_otyper_get(struct stm_gpio *gpio, int pin) {
return (gpio->otyper >> STM_OTYPER_SHIFT(pin)) & STM_OTYPER_MASK;
#define STM_OSPEEDR_40MHz 3
static inline void
-stm_ospeedr_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
+stm_ospeedr_set(struct stm_gpio *gpio, int pin, uint32_t value) {
gpio->ospeedr = ((gpio->ospeedr &
~(STM_OSPEEDR_MASK << STM_OSPEEDR_SHIFT(pin))) |
value << STM_OSPEEDR_SHIFT(pin));
}
-
+
+static inline void
+stm_ospeedr_set_mask(struct stm_gpio *gpio, uint16_t mask, uint32_t value) {
+ uint32_t bits32 = stm_spread_mask(mask);
+ uint32_t mask32 = 3 * bits32;
+ uint32_t value32 = (value & 3) * bits32;
+
+ gpio->ospeedr = ((gpio->ospeedr & ~mask32) | value32);
+}
+
static inline uint32_t
stm_ospeedr_get(struct stm_gpio *gpio, int pin) {
return (gpio->ospeedr >> STM_OSPEEDR_SHIFT(pin)) & STM_OSPEEDR_MASK;
~(STM_PUPDR_MASK << STM_PUPDR_SHIFT(pin))) |
value << STM_PUPDR_SHIFT(pin));
}
-
+
+static inline void
+stm_pupdr_set_mask(struct stm_gpio *gpio, uint16_t mask, uint32_t value) {
+ uint32_t bits32 = stm_spread_mask(mask);
+ uint32_t mask32 = 3 * bits32;
+ uint32_t value32 = (value & 3) * bits32;
+
+ gpio->pupdr = (gpio->pupdr & ~mask32) | value32;
+}
+
static inline uint32_t
stm_pupdr_get(struct stm_gpio *gpio, int pin) {
return (gpio->pupdr >> STM_PUPDR_SHIFT(pin)) & STM_PUPDR_MASK;
* ao_enable_gpio macro will expand into a huge pile of code
* as the compiler won't do correct constant folding and
* dead-code elimination
+ */
- extern struct stm_gpio stm_gpioa;
- extern struct stm_gpio stm_gpiob;
- extern struct stm_gpio stm_gpioc;
- extern struct stm_gpio stm_gpiod;
- extern struct stm_gpio stm_gpioe;
- extern struct stm_gpio stm_gpioh;
-
-*/
+extern struct stm_gpio stm_gpioa;
+extern struct stm_gpio stm_gpiob;
+extern struct stm_gpio stm_gpioc;
+extern struct stm_gpio stm_gpiod;
+extern struct stm_gpio stm_gpioe;
+extern struct stm_gpio stm_gpioh;
#define stm_gpioh (*((struct stm_gpio *) 0x40021400))
#define stm_gpioe (*((struct stm_gpio *) 0x40021000))
extern struct stm_adc stm_adc;
+#define STM_ADC_SQ_TEMP 16
+#define STM_ADC_SQ_V_REF 17
+
#define STM_ADC_SR_JCNR 9
#define STM_ADC_SR_RCNR 8
#define STM_ADC_SR_ADONS 6
extern struct stm_exti stm_exti;
+#define isr_decl(name) \
+ void __attribute__ ((weak)) stm_ ## name ## _isr(void);
+
+isr_decl(nmi)
+isr_decl(hardfault)
+isr_decl(memmanage)
+isr_decl(busfault)
+isr_decl(usagefault)
+isr_decl(svc)
+isr_decl(debugmon)
+isr_decl(pendsv)
+isr_decl(systick)
+isr_decl(wwdg)
+isr_decl(pvd)
+isr_decl(tamper_stamp)
+isr_decl(rtc_wkup)
+isr_decl(flash)
+isr_decl(rcc)
+isr_decl(exti0)
+isr_decl(exti1)
+isr_decl(exti2)
+isr_decl(exti3)
+isr_decl(exti4)
+isr_decl(dma1_channel1)
+isr_decl(dma1_channel2)
+isr_decl(dma1_channel3)
+isr_decl(dma1_channel4)
+isr_decl(dma1_channel5)
+isr_decl(dma1_channel6)
+isr_decl(dma1_channel7)
+isr_decl(adc1)
+isr_decl(usb_hp)
+isr_decl(usb_lp)
+isr_decl(dac)
+isr_decl(comp)
+isr_decl(exti9_5)
+isr_decl(lcd)
+isr_decl(tim9)
+isr_decl(tim10)
+isr_decl(tim11)
+isr_decl(tim2)
+isr_decl(tim3)
+isr_decl(tim4)
+isr_decl(i2c1_ev)
+isr_decl(i2c1_er)
+isr_decl(i2c2_ev)
+isr_decl(i2c2_er)
+isr_decl(spi1)
+isr_decl(spi2)
+isr_decl(usart1)
+isr_decl(usart2)
+isr_decl(usart3)
+isr_decl(exti15_10)
+isr_decl(rtc_alarm)
+isr_decl(usb_fs_wkup)
+isr_decl(tim6)
+isr_decl(tim7)
+
#endif /* _STM32L_H_ */