*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
.text : {
__text_start__ = .;
*(.interrupt) /* Interrupt vectors */
- *(.romconfig*)
- *(.text) /* Executable code */
- . = ALIGN(4);
- *(.rodata*) /* Constants */
- . = ALIGN(4);
- } > rom
- .ARM.exidx : {
- . = ALIGN(4);
+ . = ORIGIN(rom) + 0x100;
+
+ ao_romconfig.o(.romconfig*)
+ ao_product.o(.romconfig*)
+ *(.text*) /* Executable code */
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
- . = ALIGN(4);
+ *(.rodata*) /* Constants */
} > rom
__text_end__ = .;
.boot (NOLOAD) : {
__boot_start__ = .;
*(.boot)
- . = ALIGN(4);
__boot_end__ = .;
} >ram
- /* Functions placed in RAM (required for flashing) */
- .textram : {
+ /* Functions placed in RAM (required for flashing)
+ *
+ * Align to 8 bytes as that's what the ARM likes text
+ * segment alignments to be, and if we don't, then
+ * we end up with a mismatch between the location in
+ * ROM and the desired location in RAM. I don't
+ * entirely understand this, but at least this appears
+ * to work...
+ */
+
+ .textram BLOCK(8): {
__data_start__ = .;
__text_ram_start__ = .;
- *(.text.ram)
+ *(.ramtext)
__text_ram_end = .;
} >ram AT>rom