2 * Copyright © 2012 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
13 * You should have received a copy of the GNU General Public License along
14 * with this program; if not, write to the Free Software Foundation, Inc.,
15 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
21 #define HAS_TASK_QUEUE 1
23 /* 8MHz High speed external crystal */
24 #define AO_HSE 8000000
26 /* PLLVCO = 96MHz (so that USB will work) */
28 #define AO_RCC_CFGR_PLLMUL (STM_RCC_CFGR_PLLMUL_12)
30 /* SYSCLK = 32MHz (no need to go faster than CPU) */
32 #define AO_RCC_CFGR_PLLDIV (STM_RCC_CFGR_PLLDIV_3)
34 /* HCLK = 32MHz (CPU clock) */
35 #define AO_AHB_PRESCALER 1
36 #define AO_RCC_CFGR_HPRE_DIV STM_RCC_CFGR_HPRE_DIV_1
38 /* Run APB1 at 16MHz (HCLK/2) */
39 #define AO_APB1_PRESCALER 2
40 #define AO_RCC_CFGR_PPRE1_DIV STM_RCC_CFGR_PPRE2_DIV_2
42 /* Run APB2 at 16MHz (HCLK/2) */
43 #define AO_APB2_PRESCALER 2
44 #define AO_RCC_CFGR_PPRE2_DIV STM_RCC_CFGR_PPRE2_DIV_2
46 #define HAS_SERIAL_1 1
47 #define USE_SERIAL_1_STDIN 0
48 #define SERIAL_1_PB6_PB7 0
49 #define SERIAL_1_PA9_PA10 1
51 #define HAS_SERIAL_2 0
52 #define USE_SERIAL_2_STDIN 0
53 #define SERIAL_2_PA2_PA3 0
54 #define SERIAL_2_PD5_PD6 0
56 #define HAS_SERIAL_3 0
57 #define USE_SERIAL_3_STDIN 0
58 #define SERIAL_3_PB10_PB11 0
59 #define SERIAL_3_PC10_PC11 1
60 #define SERIAL_3_PD8_PD9 0
63 #define USE_INTERNAL_FLASH 0
67 #define HAS_TELEMETRY 0
70 #define SPI_1_PA5_PA6_PA7 0
71 #define SPI_1_PB3_PB4_PB5 0
72 #define SPI_1_PE13_PE14_PE15 1 /* */
73 #define SPI_1_OSPEEDR STM_OSPEEDR_10MHz
76 #define SPI_2_PB13_PB14_PB15 1 /* */
77 #define SPI_2_PD1_PD3_PD4 0
78 #define SPI_2_OSPEEDR STM_OSPEEDR_10MHz
79 #define HAS_STORAGE_DEBUG 1
81 #define SPI_2_PORT (&stm_gpiob)
82 #define SPI_2_SCK_PIN 13
83 #define SPI_2_MISO_PIN 14
84 #define SPI_2_MOSI_PIN 15
87 #define I2C_1_PB6_PB7 1
88 #define I2C_1_PB8_PB9 0
91 #define I2C_2_PB10_PB11 1
93 #define PACKET_HAS_SLAVE 0
94 #define PACKET_HAS_MASTER 0
96 #define LOW_LEVEL_DEBUG 0
98 #define LED_PORT_0_ENABLE STM_RCC_AHBENR_GPIOCEN
99 #define LED_PORT_0 (&stm_gpioc)
100 #define LED_PORT_0_MASK (0xff)
101 #define LED_PORT_0_SHIFT 0
102 #define LED_PIN_RED 6
103 #define LED_PIN_GREEN 7
104 #define LED_PIN_RED_2 8
105 #define LED_PIN_GREEN_2 9
106 #define AO_LED_RED (1 << LED_PIN_RED)
107 #define AO_LED_GREEN (1 << LED_PIN_GREEN)
108 #define AO_LED_RED_2 (1 << LED_PIN_RED_2)
109 #define AO_LED_GREEN_2 (1 << LED_PIN_GREEN_2)
111 #define LEDS_AVAILABLE (AO_LED_RED | AO_LED_GREEN | AO_LED_RED_2 | AO_LED_GREEN_2)
116 #define HAS_ADC_TEMP 1
122 #define AO_DATA_RING 32
123 #define AO_ADC_NUM_SENSE 6
126 int16_t tx_pa_current; /* 0 ADC_IN0 */
127 int16_t tx_pa_temp; /* 1 ADC_IN1 */
128 int16_t tx_xo_temp; /* 2 ADC_IN2 */
129 int16_t rx_xo_temp; /* 3 ADC_IN3 */
130 int16_t ihu_current; /* 4 ADC_IN8 */
131 int16_t rx_cd; /* 5 ADC_IN9 */
132 int16_t ant_sense_1; /* 6 ADC_IN10 */
133 int16_t ant_sense_2; /* 7 ADC_IN11 */
134 int16_t gyro_x_1; /* 8 ADC_IN12 */
135 int16_t gyro_z_1; /* 9 ADC_IN13 */
136 int16_t gyro_x_2; /* 10 ADC_IN14 */
137 int16_t gyro_z_2; /* 11 ADC_IN15 */
140 #define AO_ADC_TX_PA_CURRENT 0
141 #define AO_ADC_TX_PA_CURRENT_PORT (&stm_gpioa)
142 #define AO_ADC_TX_PA_CURRENT_PIN 0
144 #define AO_ADC_TX_PA_TEMP 1
145 #define AO_ADC_TX_PA_TEMP_PORT (&stm_gpioa)
146 #define AO_ADC_TX_PA_TEMP_PIN 1
148 #define AO_ADC_TX_XO_TEMP 2
149 #define AO_ADC_TX_XO_TEMP_PORT (&stm_gpioa)
150 #define AO_ADC_TX_XO_TEMP_PIN 2
152 #define AO_ADC_RX_XO_TEMP 3
153 #define AO_ADC_RX_XO_TEMP_PORT (&stm_gpioa)
154 #define AO_ADC_RX_XO_TEMP_PIN 3
156 #define AO_ADC_IHU_CURRENT 8
157 #define AO_ADC_IHU_CURRENT_PORT (&stm_gpiob)
158 #define AO_ADC_IHU_CURRENT_PIN 0
160 #define AO_ADC_RX_CD 9
161 #define AO_ADC_RX_CD_PORT (&stm_gpiob)
162 #define AO_ADC_RX_CD_PIN 1
164 #define AO_ADC_ANT_SENSE_1 10
165 #define AO_ADC_ANT_SENSE_1_PORT (&stm_gpioc)
166 #define AO_ADC_ANT_SENSE_1_PIN 0
168 #define AO_ADC_ANT_SENSE_2 11
169 #define AO_ADC_ANT_SENSE_2_PORT (&stm_gpioc)
170 #define AO_ADC_ANT_SENSE_2_PIN 1
172 #define AO_ADC_GYRO_X_1 12
173 #define AO_ADC_GYRO_X_1_PORT (&stm_gpioc)
174 #define AO_ADC_GYRO_X_1_PIN 2
176 #define AO_ADC_GYRO_Z_1 13
177 #define AO_ADC_GYRO_Z_1_PORT (&stm_gpioc)
178 #define AO_ADC_GYRO_Z_1_PIN 3
180 #define AO_ADC_GYRO_X_2 14
181 #define AO_ADC_GYRO_X_2_PORT (&stm_gpioc)
182 #define AO_ADC_GYRO_X_2_PIN 4
184 #define AO_ADC_GYRO_Z_2 15
185 #define AO_ADC_GYRO_Z_2_PORT (&stm_gpioc)
186 #define AO_ADC_GYRO_Z_2_PIN 5
188 #define AO_ADC_TEMP 16
190 #define AO_ADC_RCC_AHBENR ((1 << STM_RCC_AHBENR_GPIOAEN) | \
191 (1 << STM_RCC_AHBENR_GPIOBEN) | \
192 (1 << STM_RCC_AHBENR_GPIOCEN))
194 #define AO_NUM_ADC_PIN (12)
196 #define AO_ADC_PIN0_PORT AO_ADC_TX_PA_CURRENT_PORT
197 #define AO_ADC_PIN0_PIN AO_ADC_TX_PA_CURRENT_PIN
198 #define AO_ADC_PIN1_PORT AO_ADC_TX_PA_TEMP_PORT
199 #define AO_ADC_PIN1_PIN AO_ADC_TX_PA_TEMP_PIN
200 #define AO_ADC_PIN2_PORT AO_ADC_TX_XO_TEMP_PORT
201 #define AO_ADC_PIN2_PIN AO_ADC_TX_XO_TEMP_PIN
202 #define AO_ADC_PIN3_PORT AO_ADC_RX_XO_TEMP_PORT
203 #define AO_ADC_PIN3_PIN AO_ADC_RX_XO_TEMP_PIN
204 #define AO_ADC_PIN4_PORT AO_ADC_IHU_CURRENT_PORT
205 #define AO_ADC_PIN4_PIN AO_ADC_IHU_CURRENT_PIN
206 #define AO_ADC_PIN5_PORT AO_ADC_RX_CD_PORT
207 #define AO_ADC_PIN5_PIN AO_ADC_RX_CD_PIN
208 #define AO_ADC_PIN6_PORT AO_ADC_ANT_SENSE_1_PORT
209 #define AO_ADC_PIN6_PIN AO_ADC_ANT_SENSE_1_PIN
210 #define AO_ADC_PIN7_PORT AO_ADC_ANT_SENSE_2_PORT
211 #define AO_ADC_PIN7_PIN AO_ADC_ANT_SENSE_2_PIN
212 #define AO_ADC_PIN8_PORT AO_ADC_GYRO_X_1_PORT
213 #define AO_ADC_PIN8_PIN AO_ADC_GYRO_X_1_PIN
214 #define AO_ADC_PIN9_PORT AO_ADC_GYRO_Z_1_PORT
215 #define AO_ADC_PIN9_PIN AO_ADC_GYRO_Z_1_PIN
216 #define AO_ADC_PIN10_PORT AO_ADC_GYRO_X_2_PORT
217 #define AO_ADC_PIN10_PIN AO_ADC_GYRO_X_2_PIN
218 #define AO_ADC_PIN11_PORT AO_ADC_GYRO_Z_2_PORT
219 #define AO_ADC_PIN11_PIN AO_ADC_GYRO_Z_2_PIN
221 #define AO_NUM_ADC (AO_NUM_ADC_PIN + 1) /* Add internal temp sensor */
223 #define AO_ADC_SQ1 AO_ADC_TX_PA_CURRENT
224 #define AO_ADC_SQ1_NAME "tx_pa_current"
225 #define AO_ADC_SQ2 AO_ADC_TX_PA_TEMP
226 #define AO_ADC_SQ2_NAME "tx_pa_temp"
227 #define AO_ADC_SQ3 AO_ADC_TX_XO_TEMP
228 #define AO_ADC_SQ3_NAME "tx_xo_temp"
229 #define AO_ADC_SQ4 AO_ADC_RX_XO_TEMP
230 #define AO_ADC_SQ4_NAME "rx_xo_temp"
231 #define AO_ADC_SQ5 AO_ADC_IHU_CURRENT
232 #define AO_ADC_SQ5_NAME "ihu_current"
233 #define AO_ADC_SQ6 AO_ADC_RX_CD
234 #define AO_ADC_SQ6_NAME "rx_cd"
235 #define AO_ADC_SQ7 AO_ADC_ANT_SENSE_1
236 #define AO_ADC_SQ7_NAME "ant_sense_1"
237 #define AO_ADC_SQ8 AO_ADC_ANT_SENSE_2
238 #define AO_ADC_SQ8_NAME "ant_sense_2"
239 #define AO_ADC_SQ9 AO_ADC_GYRO_X_1
240 #define AO_ADC_SQ9_NAME "gyro_x_1"
241 #define AO_ADC_SQ10 AO_ADC_GYRO_Z_1
242 #define AO_ADC_SQ10_NAME "gyro_z_1"
243 #define AO_ADC_SQ11 AO_ADC_GYRO_X_2
244 #define AO_ADC_SQ11_NAME "gyro_x_2"
245 #define AO_ADC_SQ12 AO_ADC_GYRO_Z_2
246 #define AO_ADC_SQ12_NAME "gyro_z_2"
247 #define AO_ADC_SQ13 AO_ADC_TEMP
248 #define AO_ADC_SQ13_NAME "temp"
252 #define AO_WATCHDOG_INTERVAL AO_MS_TO_TICKS(40)
253 #define AO_WATCHDOG_PORT (&stm_gpiod)
254 #define AO_WATCHDOG_BIT 3
258 #define AO_MR25_SPI_CS_PORT (&stm_gpiod)
259 #define AO_MR25_SPI_CS_PIN 0
260 #define AO_MR25_SPI_BUS AO_SPI_2_PB13_PB14_PB15
264 #define AO_SDCARD_SPI_CS_PORT (&stm_gpiod)
265 #define AO_SDCARD_SPI_CS_PIN 1
266 #define AO_SDCARD_SPI_BUS AO_SPI_2_PB13_PB14_PB15
267 #define AO_SDCARD_SPI_PORT (&stm_gpiob)
268 #define AO_SDCARD_SPI_SCK_PIN 13
269 #define AO_SDCARD_SPI_MISO_PIN 14
270 #define AO_SDCARD_SPI_MOSI_PIN 15
272 #endif /* _AO_PINS_H_ */