PCB["TeleMetrum" 350000 175000]
Grid[100.0 0 0 0]
-Cursor[1000 63100 0.000000]
+Cursor[88900 0 0.000000]
PolyArea[200000000.000000]
Thermal[0.500000]
DRC[600 1000 600 500 1500 700]
Via[10000 85600 3100 2000 0 1500 "" "thermal(1S)"]
Via[24800 84200 3100 2000 0 1500 "" ""]
Via[21300 98000 3100 2000 0 1500 "" ""]
-Via[210124 104232 3100 2000 0 1500 "" "thermal(1S)"]
Via[341000 72500 3100 2000 0 1500 "" "thermal(1S,3S)"]
Via[341000 52500 3100 2000 0 1500 "" "thermal(1S,3S)"]
Via[332200 76200 3100 2000 0 1500 "" "thermal(1S,3S)"]
Via[296000 58500 3100 2000 0 1500 "" "thermal(1S,3S)"]
Via[303800 58500 3100 2000 0 1500 "" "thermal(1S,3S)"]
Via[324300 68600 3100 2000 0 1500 "" "thermal(1S,3S)"]
+Via[139853 24100 3100 2000 0 1500 "" "thermal(1S)"]
Element["lock" "hole-M3" "H2" "unknown" 12500 12500 -3700 -3300 0 100 ""]
(
)
-Element["" "SOIJ8" "U5" "W25Q64" 53700 159112 12011 -10161 3 100 ""]
+Element["" "SOIJ8" "U5" "W25Q64" 31700 156512 12011 -10161 3 100 ""]
(
Pad[11712 -7499 15845 -7499 2559 2441 3159 "VCC" "8" "square,edge2"]
Pad[-15846 -7499 -11713 -7499 2559 2441 3159 "CS" "1" "square"]
)
-Element["" "lqfp100" "U7" "STM32L151" 193100 63900 6600 3300 1 100 ""]
-(
- Pad[-32282 23621 -28739 23621 1181 787 1811 "PA2/USART2_TX/ADC_IN2/TIM2_CH3/TIM9_CH1" "25" "square"]
- Pad[28740 23621 32283 23621 1181 787 1811 "PB12/SPI2_NSS/I2C2_SMBA/USART3_CKI/ADC_IN18/TIM10_CH1" "51" "square,edge2"]
- Pad[-23621 -32283 -23621 -28740 1181 787 1811 "VDD3" "100" "square"]
- Pad[-23621 28739 -23621 32282 1181 787 1811 "PA3/USART2_RX/ADC_IN3/TIM2_CH4/TIM9_CH2" "26" "square,edge2"]
- Pad[-32282 21653 -28739 21653 1181 787 1811 "PA1/USART2_RTS/ADC_IN1/TIM2_CH2" "24" "square"]
- Pad[28740 21653 32283 21653 1181 787 1811 "PB13/SPI2_SCK/USART3_CTS/ADC_IN19/TIM9_CH1" "52" "square,edge2"]
- Pad[-21653 -32283 -21653 -28740 1181 787 1811 "VSS3" "99" "square"]
- Pad[-21653 28739 -21653 32282 1181 787 1811 "VSS4" "27" "square,edge2"]
- Pad[-32282 19684 -28739 19684 1181 787 1811 "PA0/WKUP1/USART2_CTS/ADC_IN0/TIM2_CH1_ETR" "23" "square"]
- Pad[28740 19684 32283 19684 1181 787 1811 "PB14/SPI2_MISO/USART3_RTS/ADC_IN20/TIM9_CH2" "53" "square,edge2"]
- Pad[-19684 -32283 -19684 -28740 1181 787 1811 "PE1/TIM11_CH1" "98" "square"]
- Pad[-19684 28739 -19684 32282 1181 787 1811 "VDD4" "28" "square,edge2"]
- Pad[-32282 17716 -28739 17716 1181 787 1811 "VDDA" "22" "square"]
- Pad[28740 17716 32283 17716 1181 787 1811 "PB15/SPI2_MOSI/ADC_IN21/TIM11_CH1/RTC_50_60HZ" "54" "square,edge2"]
- Pad[-17716 -32283 -17716 -28740 1181 787 1811 "PE0/TIM4_ETR/TIM10_CH1" "97" "square"]
- Pad[-17716 28739 -17716 32282 1181 787 1811 "PA4/SPI1_NSS/USART2_CK/ADC_IN4/DAC_OUT1" "29" "square,edge2"]
- Pad[-32282 15747 -28739 15747 1181 787 1811 "VREF+" "21" "square"]
- Pad[28740 15747 32283 15747 1181 787 1811 "PD8/USART3_TX" "55" "square,edge2"]
- Pad[-15747 -32283 -15747 -28740 1181 787 1811 "PB9/TIM4_CH4/I2C1_SDA/TIM11_CH1" "96" "square"]
- Pad[-15747 28739 -15747 32282 1181 787 1811 "PA5/SPI1_SCK/ADC_IN5/DAC_OUT2/TIM2_CH1_ETR" "30" "square,edge2"]
- Pad[-32282 13779 -28739 13779 1181 787 1811 "VREF-" "20" "square"]
- Pad[28740 13779 32283 13779 1181 787 1811 "PD9/USART3_RX" "56" "square,edge2"]
- Pad[-13779 -32283 -13779 -28740 1181 787 1811 "PB8/TIM4_CH3/I2C1_SCL/TIM10_CH1" "95" "square"]
- Pad[-13779 28739 -13779 32282 1181 787 1811 "PA6/SPI1_MISO_ADC_IN6/TIM3_CH1/TIM10_CH1" "31" "square,edge2"]
- Pad[-32282 11810 -28739 11810 1181 787 1811 "VSSA" "19" "square"]
- Pad[28740 11810 32283 11810 1181 787 1811 "PD10/USART3_CK" "57" "square,edge2"]
- Pad[-11810 -32283 -11810 -28740 1181 787 1811 "BOOT0" "94" "square"]
- Pad[-11810 28739 -11810 32282 1181 787 1811 "PA7/SPI1_MOSI/ADC_IN7/TIM3_CH2/TIM11_CH1" "32" "square,edge2"]
- Pad[-32282 9842 -28739 9842 1181 787 1811 "PC3/ADC_IN13" "18" "square"]
- Pad[28740 9842 32283 9842 1181 787 1811 "PD11/USART3_CTS" "58" "square,edge2"]
- Pad[-9842 -32283 -9842 -28740 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "93" "square"]
- Pad[-9842 28739 -9842 32282 1181 787 1811 "PC4/ADC_IN14" "33" "square,edge2"]
- Pad[-32282 7873 -28739 7873 1181 787 1811 "PC2/ADC_IN12" "17" "square"]
- Pad[28740 7873 32283 7873 1181 787 1811 "PD12/TIM4_CH/USART3_RTS" "59" "square,edge2"]
- Pad[-7873 -32283 -7873 -28740 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "92" "square"]
- Pad[-7873 28739 -7873 32282 1181 787 1811 "PC5/ADC_IN15" "34" "square,edge2"]
- Pad[-32282 5905 -28739 5905 1181 787 1811 "PC1/ADC_IN11" "16" "square"]
- Pad[28740 5905 32283 5905 1181 787 1811 "PD13/TIM4_CH2" "60" "square,edge2"]
- Pad[-5905 -32283 -5905 -28740 1181 787 1811 "PB5/I2C1_SMBA/TIM3_CH2/SPI1_MOSI" "91" "square"]
- Pad[-5905 28739 -5905 32282 1181 787 1811 "PB0/ADC_IN8/TIM3_CH3/VREF_OUT" "35" "square,edge2"]
- Pad[-32282 3936 -28739 3936 1181 787 1811 "PC0/ADC_IN10" "15" "square"]
- Pad[28740 3936 32283 3936 1181 787 1811 "PD14_TIM4_CH3" "61" "square,edge2"]
- Pad[-3936 -32283 -3936 -28740 1181 787 1811 "PB4/JNTRSTSPI1_MISO/TIM3_CH1" "90" "square"]
- Pad[-3936 28739 -3936 32282 1181 787 1811 "PB1/ADC_IN9/TIM3_CH4/VREF_OUT" "36" "square,edge2"]
- Pad[-32282 1968 -28739 1968 1181 787 1811 "NRST" "14" "square"]
- Pad[28740 1968 32283 1968 1181 787 1811 "PC15/TIM4_CH4" "62" "square,edge2"]
- Pad[-1968 -32283 -1968 -28740 1181 787 1811 "PB3/JTDO/TIM2_CH2/TRACESWO/SPI1_SCK" "89" "square"]
- Pad[-1968 28739 -1968 32282 1181 787 1811 "PB2/BOOT1" "37" "square,edge2"]
- Pad[-32282 0 -28739 0 1181 787 1811 "PH1/OSC_OUT" "13" "square"]
- Pad[28740 0 32283 0 1181 787 1811 "PC6/TIM3_CH1" "63" "square,edge2"]
- Pad[0 -32283 0 -28740 1181 787 1811 "PD7/USART2_CK/TIM9_CH2" "88" "square"]
- Pad[0 28739 0 32282 1181 787 1811 "PE7/ADC_IN22" "38" "square,edge2"]
- Pad[-32282 -1969 -28739 -1969 1181 787 1811 "PH0/OSC_IN" "12" "square"]
- Pad[28740 -1969 32283 -1969 1181 787 1811 "PC7/TIM3_CH2" "64" "square,edge2"]
- Pad[1969 -32283 1969 -28740 1181 787 1811 "PD6/USART2_RX" "87" "square"]
- Pad[1969 28739 1969 32282 1181 787 1811 "PE8/ADC_IN23" "39" "square,edge2"]
- Pad[-32282 -3937 -28739 -3937 1181 787 1811 "VDD5" "11" "square"]
- Pad[28740 -3937 32283 -3937 1181 787 1811 "PC8/TIM3_CH3" "65" "square,edge2"]
- Pad[3937 -32283 3937 -28740 1181 787 1811 "PD5/USART2_TX" "86" "square"]
- Pad[3937 28739 3937 32282 1181 787 1811 "PE9/ADC_IN24/TIM2_CH1_ETR" "40" "square,edge2"]
- Pad[-32282 -5906 -28739 -5906 1181 787 1811 "VSS5" "10" "square"]
- Pad[28740 -5906 32283 -5906 1181 787 1811 "PC9/TIM3_CH4" "66" "square,edge2"]
- Pad[5906 -32283 5906 -28740 1181 787 1811 "PD4_USART2_RTS/SPI2_MOSI" "85" "square"]
- Pad[5906 28739 5906 32282 1181 787 1811 "PE10/ADC_IN25/TIM2_CH2" "41" "square,edge2"]
- Pad[-32282 -7874 -28739 -7874 1181 787 1811 "PC15/OSC32_OUT" "9" "square"]
- Pad[28740 -7874 32283 -7874 1181 787 1811 "PA8/USART1_CK/MCO" "67" "square,edge2"]
- Pad[7874 -32283 7874 -28740 1181 787 1811 "PD3/USART2_CTS/SPI2_MISO" "84" "square"]
- Pad[7874 28739 7874 32282 1181 787 1811 "PE11/TIM2_CH3" "42" "square,edge2"]
- Pad[-32282 -9843 -28739 -9843 1181 787 1811 "PC14/OSC32_IN" "8" "square"]
- Pad[28740 -9843 32283 -9843 1181 787 1811 "PA9/USART1_TX" "68" "square,edge2"]
- Pad[9843 -32283 9843 -28740 1181 787 1811 "PD2/TIM3_ETR" "83" "square"]
- Pad[9843 28739 9843 32282 1181 787 1811 "PE12/TIM2_CH4/SPI1_NSS" "43" "square,edge2"]
- Pad[-32282 -11811 -28739 -11811 1181 787 1811 "PC13/RTC_AF1/WKUP2" "7" "square"]
- Pad[28740 -11811 32283 -11811 1181 787 1811 "PA10/USART1_RX" "69" "square,edge2"]
- Pad[11811 -32283 11811 -28740 1181 787 1811 "PD1/SPI2_SCK" "82" "square"]
- Pad[11811 28739 11811 32282 1181 787 1811 "PE13/SPI1_SCK" "44" "square,edge2"]
- Pad[-32282 -13780 -28739 -13780 1181 787 1811 "VLCD" "6" "square"]
- Pad[28740 -13780 32283 -13780 1181 787 1811 "PA11/USART1_CTS/USBDM/SPI1_MISO" "70" "square,edge2"]
- Pad[13780 -32283 13780 -28740 1181 787 1811 "PD0/SPI2_NSS/TIM9_CH1" "81" "square"]
- Pad[13780 28739 13780 32282 1181 787 1811 "PE14/SPI1_MISO" "45" "square,edge2"]
- Pad[-32282 -15748 -28739 -15748 1181 787 1811 "PE6/TRACED3/WKUP3/TIM9_CH2" "5" "square"]
- Pad[28740 -15748 32283 -15748 1181 787 1811 "PA12/USART1_RTS/USBDP/SPI1_MOSI" "71" "square,edge2"]
- Pad[15748 -32283 15748 -28740 1181 787 1811 "PC12/USART3_CK" "80" "square"]
- Pad[15748 28739 15748 32282 1181 787 1811 "PE15/SPI1_MOSI" "46" "square,edge2"]
- Pad[-32282 -17717 -28739 -17717 1181 787 1811 "PE5/TRACED2/TIM9_CH1" "4" "square"]
- Pad[28740 -17717 32283 -17717 1181 787 1811 "PA13/JTMS/SWDIO" "72" "square,edge2"]
- Pad[17717 -32283 17717 -28740 1181 787 1811 "PC11/USART3_RX" "79" "square"]
- Pad[17717 28739 17717 32282 1181 787 1811 "PB10/I2C2_SCL/USART3_TX/TIM2_CH3" "47" "square,edge2"]
- Pad[-32282 -19685 -28739 -19685 1181 787 1811 "PE4/TRACED1/TIM3_CH2" "3" "square"]
- Pad[28740 -19685 32283 -19685 1181 787 1811 "PH2/I2C2_SMBA" "73" "square,edge2"]
- Pad[19685 -32283 19685 -28740 1181 787 1811 "PC10/USART3_TX" "78" "square"]
- Pad[19685 28739 19685 32282 1181 787 1811 "PB11/I2C2_SDA/USART3_RX/TIM2_CH4" "48" "square,edge2"]
- Pad[-32282 -21654 -28739 -21654 1181 787 1811 "PE3/TRACED0/TIM3_CH1" "2" "square"]
- Pad[28740 -21654 32283 -21654 1181 787 1811 "VSS2" "74" "square,edge2"]
- Pad[21654 -32283 21654 -28740 1181 787 1811 "PA15/JTDI/TIM2_CH1_ETR/SPI1_NSS" "77" "square"]
- Pad[21654 28739 21654 32282 1181 787 1811 "VSS1" "49" "square,edge2"]
- Pad[-32282 -23622 -28739 -23622 1181 787 1811 "PE2/TRACECK/TIM3_ETR" "1" "square"]
- Pad[28740 -23622 32283 -23622 1181 787 1811 "VDD2" "75" "square,edge2"]
- Pad[23622 -32283 23622 -28740 1181 787 1811 "PA14/JTCK/SWCLK" "76" "square"]
- Pad[23622 28739 23622 32282 1181 787 1811 "VDD1" "50" "square,edge2"]
- ElementLine [-27558 27558 27559 27558 1000]
- ElementLine [27559 -27559 27559 27558 1000]
- ElementLine [-27558 -27559 27559 -27559 1000]
- ElementLine [-27558 -27559 -27558 27558 1000]
- ElementArc [-28739 -28740 500 500 90 360 1000]
-
- )
-
-Element["" "MS5607" "U4" "MS5607" 16700 160000 -12011 10161 1 100 ""]
+Element["" "lqfp100" "U7" "STM32L151" 183000 62400 3300 -6600 2 100 ""]
+(
+ Pad[23621 28739 23621 32282 1181 787 1811 "PA2/USART2_TX/ADC_IN2/TIM2_CH3/TIM9_CH1" "25" "square,edge2"]
+ Pad[23621 -32283 23621 -28740 1181 787 1811 "PB12/SPI2_NSS/I2C2_SMBA/USART3_CKI/ADC_IN18/TIM10_CH1" "51" "square"]
+ Pad[-32283 23621 -28740 23621 1181 787 1811 "VDD3" "100" "square"]
+ Pad[28739 23621 32282 23621 1181 787 1811 "PA3/USART2_RX/ADC_IN3/TIM2_CH4/TIM9_CH2" "26" "square,edge2"]
+ Pad[21653 28739 21653 32282 1181 787 1811 "PA1/USART2_RTS/ADC_IN1/TIM2_CH2" "24" "square,edge2"]
+ Pad[21653 -32283 21653 -28740 1181 787 1811 "PB13/SPI2_SCK/USART3_CTS/ADC_IN19/TIM9_CH1" "52" "square"]
+ Pad[-32283 21653 -28740 21653 1181 787 1811 "VSS3" "99" "square"]
+ Pad[28739 21653 32282 21653 1181 787 1811 "VSS4" "27" "square,edge2"]
+ Pad[19684 28739 19684 32282 1181 787 1811 "PA0/WKUP1/USART2_CTS/ADC_IN0/TIM2_CH1_ETR" "23" "square,edge2"]
+ Pad[19684 -32283 19684 -28740 1181 787 1811 "PB14/SPI2_MISO/USART3_RTS/ADC_IN20/TIM9_CH2" "53" "square"]
+ Pad[-32283 19684 -28740 19684 1181 787 1811 "PE1/TIM11_CH1" "98" "square"]
+ Pad[28739 19684 32282 19684 1181 787 1811 "VDD4" "28" "square,edge2"]
+ Pad[17716 28739 17716 32282 1181 787 1811 "VDDA" "22" "square,edge2"]
+ Pad[17716 -32283 17716 -28740 1181 787 1811 "PB15/SPI2_MOSI/ADC_IN21/TIM11_CH1/RTC_50_60HZ" "54" "square"]
+ Pad[-32283 17716 -28740 17716 1181 787 1811 "PE0/TIM4_ETR/TIM10_CH1" "97" "square"]
+ Pad[28739 17716 32282 17716 1181 787 1811 "PA4/SPI1_NSS/USART2_CK/ADC_IN4/DAC_OUT1" "29" "square,edge2"]
+ Pad[15747 28739 15747 32282 1181 787 1811 "VREF+" "21" "square,edge2"]
+ Pad[15747 -32283 15747 -28740 1181 787 1811 "PD8/USART3_TX" "55" "square"]
+ Pad[-32283 15747 -28740 15747 1181 787 1811 "PB9/TIM4_CH4/I2C1_SDA/TIM11_CH1" "96" "square"]
+ Pad[28739 15747 32282 15747 1181 787 1811 "PA5/SPI1_SCK/ADC_IN5/DAC_OUT2/TIM2_CH1_ETR" "30" "square,edge2"]
+ Pad[13779 28739 13779 32282 1181 787 1811 "VREF-" "20" "square,edge2"]
+ Pad[13779 -32283 13779 -28740 1181 787 1811 "PD9/USART3_RX" "56" "square"]
+ Pad[-32283 13779 -28740 13779 1181 787 1811 "PB8/TIM4_CH3/I2C1_SCL/TIM10_CH1" "95" "square"]
+ Pad[28739 13779 32282 13779 1181 787 1811 "PA6/SPI1_MISO_ADC_IN6/TIM3_CH1/TIM10_CH1" "31" "square,edge2"]
+ Pad[11810 28739 11810 32282 1181 787 1811 "VSSA" "19" "square,edge2"]
+ Pad[11810 -32283 11810 -28740 1181 787 1811 "PD10/USART3_CK" "57" "square"]
+ Pad[-32283 11810 -28740 11810 1181 787 1811 "BOOT0" "94" "square"]
+ Pad[28739 11810 32282 11810 1181 787 1811 "PA7/SPI1_MOSI/ADC_IN7/TIM3_CH2/TIM11_CH1" "32" "square,edge2"]
+ Pad[9842 28739 9842 32282 1181 787 1811 "PC3/ADC_IN13" "18" "square,edge2"]
+ Pad[9842 -32283 9842 -28740 1181 787 1811 "PD11/USART3_CTS" "58" "square"]
+ Pad[-32283 9842 -28740 9842 1181 787 1811 "PB7/I2C1_SDA/TIM4_CH2/USART1_RX/PVD_IN" "93" "square"]
+ Pad[28739 9842 32282 9842 1181 787 1811 "PC4/ADC_IN14" "33" "square,edge2"]
+ Pad[7873 28739 7873 32282 1181 787 1811 "PC2/ADC_IN12" "17" "square,edge2"]
+ Pad[7873 -32283 7873 -28740 1181 787 1811 "PD12/TIM4_CH/USART3_RTS" "59" "square"]
+ Pad[-32283 7873 -28740 7873 1181 787 1811 "PB6/I2C1_SCL/TIM4_CH1/USART1_TX" "92" "square"]
+ Pad[28739 7873 32282 7873 1181 787 1811 "PC5/ADC_IN15" "34" "square,edge2"]
+ Pad[5905 28739 5905 32282 1181 787 1811 "PC1/ADC_IN11" "16" "square,edge2"]
+ Pad[5905 -32283 5905 -28740 1181 787 1811 "PD13/TIM4_CH2" "60" "square"]
+ Pad[-32283 5905 -28740 5905 1181 787 1811 "PB5/I2C1_SMBA/TIM3_CH2/SPI1_MOSI" "91" "square"]
+ Pad[28739 5905 32282 5905 1181 787 1811 "PB0/ADC_IN8/TIM3_CH3/VREF_OUT" "35" "square,edge2"]
+ Pad[3936 28739 3936 32282 1181 787 1811 "PC0/ADC_IN10" "15" "square,edge2"]
+ Pad[3936 -32283 3936 -28740 1181 787 1811 "PD14_TIM4_CH3" "61" "square"]
+ Pad[-32283 3936 -28740 3936 1181 787 1811 "PB4/JNTRSTSPI1_MISO/TIM3_CH1" "90" "square"]
+ Pad[28739 3936 32282 3936 1181 787 1811 "PB1/ADC_IN9/TIM3_CH4/VREF_OUT" "36" "square,edge2"]
+ Pad[1968 28739 1968 32282 1181 787 1811 "NRST" "14" "square,edge2"]
+ Pad[1968 -32283 1968 -28740 1181 787 1811 "PC15/TIM4_CH4" "62" "square"]
+ Pad[-32283 1968 -28740 1968 1181 787 1811 "PB3/JTDO/TIM2_CH2/TRACESWO/SPI1_SCK" "89" "square"]
+ Pad[28739 1968 32282 1968 1181 787 1811 "PB2/BOOT1" "37" "square,edge2"]
+ Pad[0 28739 0 32282 1181 787 1811 "PH1/OSC_OUT" "13" "square,edge2"]
+ Pad[0 -32283 0 -28740 1181 787 1811 "PC6/TIM3_CH1" "63" "square"]
+ Pad[-32283 0 -28740 0 1181 787 1811 "PD7/USART2_CK/TIM9_CH2" "88" "square"]
+ Pad[28739 0 32282 0 1181 787 1811 "PE7/ADC_IN22" "38" "square,edge2"]
+ Pad[-1969 28739 -1969 32282 1181 787 1811 "PH0/OSC_IN" "12" "square,edge2"]
+ Pad[-1969 -32283 -1969 -28740 1181 787 1811 "PC7/TIM3_CH2" "64" "square"]
+ Pad[-32283 -1969 -28740 -1969 1181 787 1811 "PD6/USART2_RX" "87" "square"]
+ Pad[28739 -1969 32282 -1969 1181 787 1811 "PE8/ADC_IN23" "39" "square,edge2"]
+ Pad[-3937 28739 -3937 32282 1181 787 1811 "VDD5" "11" "square,edge2"]
+ Pad[-3937 -32283 -3937 -28740 1181 787 1811 "PC8/TIM3_CH3" "65" "square"]
+ Pad[-32283 -3937 -28740 -3937 1181 787 1811 "PD5/USART2_TX" "86" "square"]
+ Pad[28739 -3937 32282 -3937 1181 787 1811 "PE9/ADC_IN24/TIM2_CH1_ETR" "40" "square,edge2"]
+ Pad[-5906 28739 -5906 32282 1181 787 1811 "VSS5" "10" "square,edge2"]
+ Pad[-5906 -32283 -5906 -28740 1181 787 1811 "PC9/TIM3_CH4" "66" "square"]
+ Pad[-32283 -5906 -28740 -5906 1181 787 1811 "PD4_USART2_RTS/SPI2_MOSI" "85" "square"]
+ Pad[28739 -5906 32282 -5906 1181 787 1811 "PE10/ADC_IN25/TIM2_CH2" "41" "square,edge2"]
+ Pad[-7874 28739 -7874 32282 1181 787 1811 "PC15/OSC32_OUT" "9" "square,edge2"]
+ Pad[-7874 -32283 -7874 -28740 1181 787 1811 "PA8/USART1_CK/MCO" "67" "square"]
+ Pad[-32283 -7874 -28740 -7874 1181 787 1811 "PD3/USART2_CTS/SPI2_MISO" "84" "square"]
+ Pad[28739 -7874 32282 -7874 1181 787 1811 "PE11/TIM2_CH3" "42" "square,edge2"]
+ Pad[-9843 28739 -9843 32282 1181 787 1811 "PC14/OSC32_IN" "8" "square,edge2"]
+ Pad[-9843 -32283 -9843 -28740 1181 787 1811 "PA9/USART1_TX" "68" "square"]
+ Pad[-32283 -9843 -28740 -9843 1181 787 1811 "PD2/TIM3_ETR" "83" "square"]
+ Pad[28739 -9843 32282 -9843 1181 787 1811 "PE12/TIM2_CH4/SPI1_NSS" "43" "square,edge2"]
+ Pad[-11811 28739 -11811 32282 1181 787 1811 "PC13/RTC_AF1/WKUP2" "7" "square,edge2"]
+ Pad[-11811 -32283 -11811 -28740 1181 787 1811 "PA10/USART1_RX" "69" "square"]
+ Pad[-32283 -11811 -28740 -11811 1181 787 1811 "PD1/SPI2_SCK" "82" "square"]
+ Pad[28739 -11811 32282 -11811 1181 787 1811 "PE13/SPI1_SCK" "44" "square,edge2"]
+ Pad[-13780 28739 -13780 32282 1181 787 1811 "VLCD" "6" "square,edge2"]
+ Pad[-13780 -32283 -13780 -28740 1181 787 1811 "PA11/USART1_CTS/USBDM/SPI1_MISO" "70" "square"]
+ Pad[-32283 -13780 -28740 -13780 1181 787 1811 "PD0/SPI2_NSS/TIM9_CH1" "81" "square"]
+ Pad[28739 -13780 32282 -13780 1181 787 1811 "PE14/SPI1_MISO" "45" "square,edge2"]
+ Pad[-15748 28739 -15748 32282 1181 787 1811 "PE6/TRACED3/WKUP3/TIM9_CH2" "5" "square,edge2"]
+ Pad[-15748 -32283 -15748 -28740 1181 787 1811 "PA12/USART1_RTS/USBDP/SPI1_MOSI" "71" "square"]
+ Pad[-32283 -15748 -28740 -15748 1181 787 1811 "PC12/USART3_CK" "80" "square"]
+ Pad[28739 -15748 32282 -15748 1181 787 1811 "PE15/SPI1_MOSI" "46" "square,edge2"]
+ Pad[-17717 28739 -17717 32282 1181 787 1811 "PE5/TRACED2/TIM9_CH1" "4" "square,edge2"]
+ Pad[-17717 -32283 -17717 -28740 1181 787 1811 "PA13/JTMS/SWDIO" "72" "square"]
+ Pad[-32283 -17717 -28740 -17717 1181 787 1811 "PC11/USART3_RX" "79" "square"]
+ Pad[28739 -17717 32282 -17717 1181 787 1811 "PB10/I2C2_SCL/USART3_TX/TIM2_CH3" "47" "square,edge2"]
+ Pad[-19685 28739 -19685 32282 1181 787 1811 "PE4/TRACED1/TIM3_CH2" "3" "square,edge2"]
+ Pad[-19685 -32283 -19685 -28740 1181 787 1811 "PH2/I2C2_SMBA" "73" "square"]
+ Pad[-32283 -19685 -28740 -19685 1181 787 1811 "PC10/USART3_TX" "78" "square"]
+ Pad[28739 -19685 32282 -19685 1181 787 1811 "PB11/I2C2_SDA/USART3_RX/TIM2_CH4" "48" "square,edge2"]
+ Pad[-21654 28739 -21654 32282 1181 787 1811 "PE3/TRACED0/TIM3_CH1" "2" "square,edge2"]
+ Pad[-21654 -32283 -21654 -28740 1181 787 1811 "VSS2" "74" "square"]
+ Pad[-32283 -21654 -28740 -21654 1181 787 1811 "PA15/JTDI/TIM2_CH1_ETR/SPI1_NSS" "77" "square"]
+ Pad[28739 -21654 32282 -21654 1181 787 1811 "VSS1" "49" "square,edge2"]
+ Pad[-23622 28739 -23622 32282 1181 787 1811 "PE2/TRACECK/TIM3_ETR" "1" "square,edge2"]
+ Pad[-23622 -32283 -23622 -28740 1181 787 1811 "VDD2" "75" "square"]
+ Pad[-32283 -23622 -28740 -23622 1181 787 1811 "PA14/JTCK/SWCLK" "76" "square"]
+ Pad[28739 -23622 32282 -23622 1181 787 1811 "VDD1" "50" "square,edge2"]
+ ElementLine [27558 -27559 27558 27558 1000]
+ ElementLine [-27559 -27559 27558 -27559 1000]
+ ElementLine [-27559 -27559 -27559 27558 1000]
+ ElementLine [-27559 27558 27558 27558 1000]
+ ElementArc [-28740 28739 500 500 180 360 1000]
+
+ )
+
+Element["" "MS5607" "U4" "MS5607" 237900 66900 -12011 10161 1 100 ""]
(
Pad[-5314 7381 -3345 7381 2362 2559 2962 "SCLK" "8" "square"]
Pad[3346 7381 5315 7381 2362 2559 2962 "VDD" "1" "square,edge2"]
)
-Element["onsolder" "0-338068-8" "J9" "Companion" 125000 115000 0 0 0 100 "auto"]
+Element["onsolder" "0-338068-8" "J9" "Companion" 212500 7500 0 0 2 100 "auto"]
(
- Pin[0 -10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"]
- Pin[5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
- Pin[10000 -10000 6299 1200 7299 3150 "3" "3" "edge2"]
- Pin[15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
- Pin[20000 -10000 6299 1200 7299 3150 "5" "5" "edge2"]
- Pin[25000 0 6299 1200 7299 3150 "6" "6" "edge2"]
- Pin[30000 -10000 6299 1200 7299 3150 "7" "7" "edge2,thermal(2X)"]
- Pin[35000 0 6299 1200 7299 3150 "8" "8" "edge2"]
- Pin[-5511 -2913 7306 1400 7906 5906 "mnt" "0" "edge2"]
- ElementLine [-11593 5038 -11593 -15039 600]
- ElementLine [-11593 -15039 46594 -15039 600]
- ElementLine [46594 -15039 46594 5038 600]
- ElementLine [46594 5038 -11593 5038 600]
+ Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"]
+ Pin[-5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
+ Pin[-10000 10000 6299 1200 7299 3150 "3" "3" "edge2"]
+ Pin[-15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
+ Pin[-20000 10000 6299 1200 7299 3150 "5" "5" "edge2"]
+ Pin[-25000 0 6299 1200 7299 3150 "6" "6" "edge2"]
+ Pin[-30000 10000 6299 1200 7299 3150 "7" "7" "edge2,thermal(2X)"]
+ Pin[-35000 0 6299 1200 7299 3150 "8" "8" "edge2"]
+ Pin[5511 2913 7306 1400 7906 5906 "mnt" "0" "edge2"]
+ ElementLine [11593 -5038 11593 15039 600]
+ ElementLine [-46594 15039 11593 15039 600]
+ ElementLine [-46594 -5038 -46594 15039 600]
+ ElementLine [-46594 -5038 11593 -5038 600]
)
)
-Element["onsolder" "2-338068-0" "J20" "misc" 125000 20000 0 0 0 100 "auto"]
-(
- Pin[0 -10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"]
- Pin[5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
- Pin[10000 -10000 6299 1200 7299 3150 "3" "3" "edge2"]
- Pin[15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
- Pin[20000 -10000 6299 1200 7299 3150 "5" "5" "edge2"]
- Pin[25000 0 6299 1200 7299 3150 "6" "6" "edge2,thermal(2X)"]
- Pin[30000 -10000 6299 1200 7299 3150 "7" "7" "edge2,thermal(1X)"]
- Pin[35000 0 6299 1200 7299 3150 "8" "8" "edge2"]
- Pin[40000 -10000 6299 1200 7299 3150 "9" "9" "edge2"]
- Pin[45000 0 6299 1200 7299 3150 "10" "10" "edge2"]
- Pin[50000 -10000 6299 1200 7299 3150 "11" "11" "edge2"]
- Pin[55000 0 6299 1200 7299 3150 "12" "12" "edge2"]
- Pin[60000 -10000 6299 1200 7299 3150 "13" "13" "edge2"]
- Pin[65000 0 6299 1200 7299 3150 "14" "14" "edge2"]
- Pin[70000 -10000 6299 1200 7299 3150 "15" "15" "edge2"]
- Pin[75000 0 6299 1200 7299 3150 "16" "16" "edge2"]
- Pin[80000 -10000 6299 1200 7299 3150 "17" "17" "edge2"]
- Pin[85000 0 6299 1200 7299 3150 "18" "18" "edge2"]
- Pin[90000 -10000 6299 1200 7299 3150 "19" "19" "edge2"]
- Pin[95000 0 6299 1200 7299 3150 "20" "20" "edge2"]
- Pin[-5511 -2913 7306 1400 7906 5906 "mnt" "0" "edge2"]
- ElementLine [-11593 5038 -11593 -15039 600]
- ElementLine [-11593 -15039 106594 -15039 600]
- ElementLine [106594 -15039 106594 5038 600]
- ElementLine [106594 5038 -11593 5038 600]
+Element["onsolder" "2-338068-0" "J20" "misc" 212500 107500 0 0 2 100 "auto"]
+(
+ Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1X)"]
+ Pin[-5000 0 6299 1200 7299 3150 "2" "2" "edge2"]
+ Pin[-10000 10000 6299 1200 7299 3150 "3" "3" "edge2"]
+ Pin[-15000 0 6299 1200 7299 3150 "4" "4" "edge2"]
+ Pin[-20000 10000 6299 1200 7299 3150 "5" "5" "edge2"]
+ Pin[-25000 0 6299 1200 7299 3150 "6" "6" "edge2,thermal(2X)"]
+ Pin[-30000 10000 6299 1200 7299 3150 "7" "7" "edge2,thermal(1X)"]
+ Pin[-35000 0 6299 1200 7299 3150 "8" "8" "edge2"]
+ Pin[-40000 10000 6299 1200 7299 3150 "9" "9" "edge2"]
+ Pin[-45000 0 6299 1200 7299 3150 "10" "10" "edge2"]
+ Pin[-50000 10000 6299 1200 7299 3150 "11" "11" "edge2"]
+ Pin[-55000 0 6299 1200 7299 3150 "12" "12" "edge2"]
+ Pin[-60000 10000 6299 1200 7299 3150 "13" "13" "edge2"]
+ Pin[-65000 0 6299 1200 7299 3150 "14" "14" "edge2"]
+ Pin[-70000 10000 6299 1200 7299 3150 "15" "15" "edge2"]
+ Pin[-75000 0 6299 1200 7299 3150 "16" "16" "edge2"]
+ Pin[-80000 10000 6299 1200 7299 3150 "17" "17" "edge2"]
+ Pin[-85000 0 6299 1200 7299 3150 "18" "18" "edge2"]
+ Pin[-90000 10000 6299 1200 7299 3150 "19" "19" "edge2"]
+ Pin[-95000 0 6299 1200 7299 3150 "20" "20" "edge2"]
+ Pin[5511 2913 7306 1400 7906 5906 "mnt" "0" "edge2"]
+ ElementLine [11593 -5038 11593 15039 600]
+ ElementLine [-106594 15039 11593 15039 600]
+ ElementLine [-106594 -5038 -106594 15039 600]
+ ElementLine [-106594 -5038 11593 -5038 600]
)
)
-Element["" "ZX62-B-5PA" "J5" "USBmicroB" 205000 106942 -22061 189 0 100 ""]
-(
- Pad[0 787 0 4528 1575 984 2362 "DATA+" "3" "square"]
- Pad[-2558 787 -2558 4528 1575 984 2362 "DATA-" "2" "square"]
- Pad[2559 787 2559 4528 1575 984 2362 "ID" "4" "square"]
- Pad[-5117 787 -5117 4528 1575 984 2362 "VBUS" "1" "square"]
- Pad[5118 787 5118 4528 1575 984 2362 "GND" "5" "square"]
- Pad[11220 3150 13189 3150 6299 984 7087 "tab1" "G" "square,edge2"]
- Pad[-13188 3150 -11219 3150 6299 984 7087 "tab2" "G" "square"]
- Pad[4724 13189 4724 13189 7480 984 8268 "tab3" "G" "square,edge2"]
- Pad[-4723 13189 -4723 13189 7480 984 8268 "tab4" "G" "square"]
- Pad[15748 12992 15748 13386 7087 984 7874 "tab5" "G" "square,edge2"]
- Pad[-15747 12992 -15747 13386 7087 984 7874 "tab6" "G" "square,edge2"]
-
- )
-
Element["" "0402" "C10" "0.1uF" 321126 169900 -3728 1750 0 100 ""]
(
Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
)
-Element["" "Venus634FLPx" "U10" "Venus634FLPx" 262900 27500 -3900 6100 0 100 ""]
+Element["" "Venus634FLPx" "U10" "Venus634FLPx" 267500 28400 -3900 6100 0 100 ""]
(
Pad[-15747 -20550 -15747 -18030 1417 1732 1500 "GND" "11" "square"]
Pad[-15747 18031 -15747 20551 1417 1732 1500 "pin23" "23" "square,edge2"]
)
-Element["" "TI-QFN32" "U6" "CC1120" 303200 91500 0 0 0 100 ""]
+Element["" "TI-QFN32" "U6" "CC1120" 303200 91500 9802 8302 0 100 ""]
(
Pin[-5196 -5196 2800 1000 0 1500 "GND" "33" "via,thermal(1S,3S)"]
Pin[0 -5196 2800 1000 0 1500 "GND" "33" "via,thermal(1S,3S)"]
)
-Element["onsolder" "GP1575.18" "A1" "unknown" 282087 62500 12011 10161 3 100 "auto"]
+Element["onsolder" "GP1575.18" "A1" "unknown" 287087 62500 12011 10161 3 100 "auto"]
(
Pin[-7087 0 9843 3937 11024 3740 "1" "1" ""]
ElementLine [-35433 35432 35432 35432 1000]
ElementLine [35432 -27559 35432 35432 1000]
ElementLine [35432 -27559 27558 -35433 1000]
+ )
+
+Element["" "0402" "C41" "tuning" 189326 168000 -4424 -7550 0 100 ""]
+(
+ Pad[-1574 -393 -1574 393 1968 2000 2568 "1" "1" "square"]
+ Pad[1574 -393 1574 393 1968 2000 2568 "2" "2" "square"]
+
+ )
+
+Element["" "ZX62-B-5PA" "J5" "USBmicroB" 144977 19989 12861 6211 2 100 ""]
+(
+ Pad[0 -4528 0 -787 1575 984 2362 "DATA+" "3" "square,edge2"]
+ Pad[2558 -4528 2558 -787 1575 984 2362 "DATA-" "2" "square,edge2"]
+ Pad[-2559 -4528 -2559 -787 1575 984 2362 "ID" "4" "square,edge2"]
+ Pad[5117 -4528 5117 -787 1575 984 2362 "VBUS" "1" "square,edge2"]
+ Pad[-5118 -4528 -5118 -787 1575 984 2362 "GND" "5" "square,edge2"]
+ Pad[-13189 -3150 -11220 -3150 6299 984 7087 "tab1" "G" "square"]
+ Pad[11219 -3150 13188 -3150 6299 984 7087 "tab2" "G" "square,edge2"]
+ Pad[-4724 -13189 -4724 -13189 7480 984 8268 "tab3" "G" "square"]
+ Pad[4723 -13189 4723 -13189 7480 984 8268 "tab4" "G" "square,edge2"]
+ Pad[-15748 -13386 -15748 -12992 7087 984 7874 "tab5" "G" "square"]
+ Pad[15747 -13386 15747 -12992 7087 984 7874 "tab6" "G" "square"]
+
)
Rat[322700 169507 0 326506 138493 0 ""]
Rat[326506 138493 0 287100 141207 0 ""]
Rat[243800 143707 0 237200 161907 0 ""]
Rat[243800 143707 0 221700 143807 0 ""]
Rat[221700 143807 0 198652 138507 0 ""]
+Rat[198652 138507 0 187500 107500 1 ""]
+Rat[243215 74281 0 111000 1000 3 "via"]
+Rat[169220 94682 0 111000 1000 3 "via"]
+Rat[38100 94200 0 1000 82000 3 "via"]
+Rat[159378 30117 0 111000 1000 3 "via"]
+Rat[150717 86021 0 111000 1000 3 "via"]
+Rat[198747 94682 0 111000 1000 3 "via"]
+Rat[179063 94682 0 111000 1000 3 "via"]
+Rat[334848 41107 0 111000 1000 3 "via"]
+Rat[280098 7850 0 111000 1000 3 "via"]
+Rat[288051 37849 0 111000 1000 3 "via"]
+Rat[215282 38778 0 111000 1000 3 "via"]
+Rat[215282 82084 0 111000 1000 3 "via"]
Rat[198652 138507 0 169105 165307 0 ""]
Rat[169105 165307 0 143200 152307 0 ""]
Rat[143200 152307 0 134600 159007 0 ""]
Rat[117312 139848 0 104798 146053 0 ""]
Rat[104798 146053 0 100821 134203 0 ""]
Rat[121643 148115 0 112948 164007 0 ""]
-Rat[104798 146053 0 69545 151613 0 ""]
-Rat[69545 151613 0 69545 156613 0 ""]
-Rat[69545 156613 0 37854 161612 0 ""]
-Rat[37854 161612 0 22015 167381 0 ""]
-Rat[146400 140907 0 155000 105000 1 ""]
-Rat[160818 79647 0 111000 1000 3 "via"]
-Rat[275498 6950 0 111000 1000 3 "via"]
-Rat[283451 36949 0 111000 1000 3 "via"]
-Rat[334848 41107 0 111000 1000 3 "via"]
-Rat[169479 31617 0 111000 1000 3 "via"]
-Rat[160818 50120 0 111000 1000 3 "via"]
-Rat[38100 94200 0 1000 82000 3 "via"]
-Rat[216722 96182 0 111000 1000 3 "via"]
-Rat[160818 59963 0 111000 1000 3 "via"]
-Rat[173416 96182 0 111000 1000 3 "via"]
-Rat[225383 40278 0 111000 1000 3 "via"]
-Rat[225383 63900 0 135500 72385 1 ""]
-Rat[135000 10000 1 181290 31617 0 ""]
-Rat[181290 31617 0 252500 140607 0 ""]
-Rat[322569 138493 0 204911 96182 0 ""]
-Rat[204911 96182 0 11386 167381 0 ""]
-Rat[130000 115000 1 69545 161612 0 ""]
-Rat[130000 115000 1 225383 85553 0 ""]
-Rat[225383 85553 0 310090 102366 0 ""]
-Rat[314695 138493 0 199006 31617 0 ""]
-Rat[150000 115000 1 206880 31617 0 ""]
-Rat[145000 105000 1 204911 31617 0 ""]
-Rat[37854 151613 0 200974 31617 0 ""]
-Rat[22015 152618 0 11386 152618 0 ""]
-Rat[314066 94453 0 202943 31617 0 ""]
-Rat[99052 38000 0 160818 67836 0 ""]
-Rat[99052 28000 0 160818 69805 0 ""]
-Rat[64200 60000 0 160818 71773 0 ""]
-Rat[64126 68800 0 160818 73742 0 ""]
-Rat[99100 91707 0 183258 96182 0 ""]
-Rat[99026 82000 0 185227 96182 0 ""]
+Rat[100821 134203 0 47545 149013 0 ""]
+Rat[47545 149013 0 47545 154013 0 ""]
+Rat[47545 154013 0 15854 159012 0 ""]
+Rat[183000 30117 0 135500 72385 1 ""]
+Rat[202500 117500 1 252500 140607 0 ""]
+Rat[202500 117500 1 150717 74210 0 ""]
+Rat[322569 138493 0 232586 74281 0 ""]
+Rat[232586 74281 0 215282 50589 0 ""]
+Rat[207500 7500 1 204653 30117 0 ""]
+Rat[204653 30117 0 310090 102366 0 ""]
+Rat[204653 30117 0 47545 159012 0 ""]
+Rat[314695 138493 0 150717 56494 0 ""]
+Rat[187500 7500 1 150717 48620 0 ""]
+Rat[192500 17500 1 150717 50589 0 ""]
+Rat[15854 149013 0 150717 54526 0 ""]
+Rat[243215 59518 0 232586 59518 0 ""]
+Rat[232586 59518 0 150717 58463 0 ""]
+Rat[314066 94453 0 150717 52557 0 ""]
+Rat[99052 38000 0 186936 94682 0 ""]
+Rat[99052 28000 0 188905 94682 0 ""]
+Rat[64200 60000 0 190873 94682 0 ""]
+Rat[64126 68800 0 192842 94682 0 ""]
+Rat[99100 91707 0 215282 72242 0 ""]
+Rat[99026 81607 0 215282 70273 0 ""]
Rat[34200 84400 0 1000 1000 2 "via"]
Rat[112548 83507 0 1000 1000 2 "via"]
Rat[75407 121300 0 1000 1000 2 "via"]
-Rat[160818 57994 0 1000 1000 2 "via"]
-Rat[160818 75710 0 1000 1000 2 "via"]
-Rat[160818 77679 0 1000 1000 2 "via"]
-Rat[171447 96182 0 1000 1000 2 "via"]
-Rat[214754 96182 0 1000 1000 2 "via"]
-Rat[225383 42246 0 1000 1000 2 "via"]
-Rat[171447 31617 0 1000 1000 2 "via"]
+Rat[243215 69360 0 1000 1000 2 "via"]
+Rat[243215 64439 0 1000 1000 2 "via"]
+Rat[177094 94682 0 1000 1000 2 "via"]
+Rat[194810 94682 0 1000 1000 2 "via"]
+Rat[196779 94682 0 1000 1000 2 "via"]
+Rat[215282 84053 0 1000 1000 2 "via"]
+Rat[215282 40746 0 1000 1000 2 "via"]
+Rat[161346 30117 0 1000 1000 2 "via"]
+Rat[150717 84053 0 1000 1000 2 "via"]
Rat[331700 41107 0 1000 1000 2 "via"]
-Rat[256602 6950 0 1000 1000 2 "via"]
-Rat[250303 6950 0 1000 1000 2 "via"]
-Rat[247153 6950 0 1000 1000 2 "via"]
-Rat[242350 21202 0 1000 1000 2 "via"]
-Rat[242350 33799 0 1000 1000 2 "via"]
+Rat[261202 7850 0 1000 1000 2 "via"]
+Rat[254903 7850 0 1000 1000 2 "via"]
+Rat[251753 7850 0 1000 1000 2 "via"]
+Rat[246950 22102 0 1000 1000 2 "via"]
+Rat[246950 34699 0 1000 1000 2 "via"]
Rat[112552 32007 0 1000 1000 2 "via"]
Rat[121952 34007 0 1000 1000 2 "via"]
Rat[80907 114548 0 1000 1000 2 "via"]
Rat[41752 103207 0 1000 1000 2 "via"]
Rat[75407 121300 0 68952 131807 0 ""]
Rat[68952 131807 0 68952 141707 0 ""]
-Rat[75407 121300 0 90980 134203 0 ""]
-Rat[90980 134203 0 104798 140148 0 ""]
+Rat[182500 117500 1 185800 132907 0 ""]
+Rat[185800 132907 0 195504 138507 0 ""]
+Rat[185800 132907 0 173100 132607 0 ""]
+Rat[195504 138507 0 202760 153800 0 ""]
+Rat[173100 132607 0 174960 150752 0 ""]
+Rat[174960 150752 0 161453 148207 0 ""]
+Rat[161453 148207 0 163453 158707 0 ""]
+Rat[163453 158707 0 160353 161807 0 ""]
+Rat[202760 153800 0 218552 143807 0 ""]
+Rat[161453 148207 0 143252 140907 0 ""]
+Rat[143252 140907 0 140052 152307 0 ""]
+Rat[143252 140907 0 125579 137486 0 ""]
+Rat[125579 137486 0 121643 137486 0 ""]
+Rat[121643 137486 0 104798 140148 0 ""]
Rat[104798 140148 0 104798 144084 0 ""]
+Rat[104798 140148 0 90980 134203 0 ""]
Rat[104798 144084 0 90980 151998 0 ""]
-Rat[104798 140148 0 121643 137486 0 ""]
-Rat[121643 137486 0 125579 137486 0 ""]
Rat[90980 151998 0 103348 164407 0 ""]
Rat[103348 164407 0 109800 164007 0 ""]
-Rat[125579 137486 0 143252 140907 0 ""]
-Rat[143252 140907 0 140052 152307 0 ""]
-Rat[143252 140907 0 161453 148207 0 ""]
-Rat[161453 148207 0 163453 158707 0 ""]
-Rat[163453 158707 0 160353 161807 0 ""]
-Rat[161453 148207 0 174960 150752 0 ""]
-Rat[174960 150752 0 173100 132607 0 ""]
-Rat[173100 132607 0 185800 132907 0 ""]
-Rat[185800 132907 0 195504 138507 0 ""]
-Rat[195504 138507 0 202760 153800 0 ""]
-Rat[202760 153800 0 218552 143807 0 ""]
+Rat[202760 153800 0 187752 167607 0 ""]
Rat[218552 143807 0 240652 143707 0 ""]
Rat[240652 143707 0 255648 140607 0 ""]
Rat[255648 140607 0 273972 157253 0 ""]
Rat[273972 157253 0 292081 166700 0 ""]
Rat[292081 166700 0 308593 156406 0 ""]
Rat[308593 156406 0 315089 156012 0 ""]
-Rat[326112 156012 0 326506 162508 0 ""]
Rat[315089 144989 0 308593 144595 0 ""]
+Rat[326112 156012 0 326506 162508 0 ""]
Rat[326112 150500 0 332608 148532 0 ""]
Rat[320600 156012 0 318632 162508 0 ""]
Rat[318632 162508 0 319552 169507 0 ""]
Rat[68952 141707 0 43306 139600 0 ""]
Rat[43306 139600 0 43306 136254 0 ""]
-Rat[43306 139600 0 37854 166612 0 ""]
-Rat[37854 166612 0 22015 162460 0 ""]
-Rat[22015 162460 0 22015 157539 0 ""]
-Rat[234052 161907 0 250800 57936 0 ""]
-Rat[250800 57936 0 250303 48051 0 ""]
-Rat[250303 48051 0 253452 48051 0 ""]
-Rat[253452 48051 0 259751 48051 0 ""]
-Rat[259751 48051 0 262900 48051 0 ""]
-Rat[262900 48051 0 266050 48051 0 ""]
-Rat[266050 48051 0 272349 48051 0 ""]
-Rat[272349 48051 0 278648 48051 0 ""]
-Rat[250303 48051 0 242350 43248 0 ""]
-Rat[242350 43248 0 242350 40098 0 ""]
-Rat[262900 48051 0 262413 57936 0 ""]
-Rat[160818 52089 0 104798 138180 0 ""]
-Rat[180000 20000 1 189164 31617 0 ""]
-Rat[165000 10000 1 216722 31617 0 ""]
-Rat[170000 20000 1 214754 31617 0 ""]
-Rat[175000 10000 1 191132 31617 0 ""]
-Rat[160000 20000 1 225383 46183 0 ""]
-Rat[60100 140007 0 225383 59963 0 ""]
-Rat[60100 135407 0 225383 57994 0 ""]
-Rat[332608 144595 0 208848 96182 0 ""]
-Rat[208848 96182 0 11386 157539 0 ""]
-Rat[140000 115000 1 225383 81616 0 ""]
-Rat[225383 81616 0 314066 98390 0 ""]
-Rat[140000 115000 1 37854 156613 0 ""]
-Rat[318632 138493 0 206880 96182 0 ""]
-Rat[206880 96182 0 11386 162460 0 ""]
-Rat[135000 105000 1 69545 166612 0 ""]
-Rat[135000 105000 1 225383 83584 0 ""]
-Rat[225383 83584 0 308121 102366 0 ""]
-Rat[166601 158707 0 160818 65868 0 ""]
-Rat[160818 65868 0 130000 20000 1 ""]
-Rat[130000 20000 1 28100 33100 0 ""]
-Rat[160818 65868 0 278648 6950 0 ""]
-Rat[278648 6950 0 298280 102366 0 ""]
-Rat[145000 10000 1 225383 52089 0 ""]
-Rat[210817 31617 0 283451 11753 0 ""]
-Rat[179321 31617 0 119674 148115 0 ""]
+Rat[43306 139600 0 15854 164012 0 ""]
+Rat[234052 161907 0 250800 57937 0 ""]
+Rat[250800 57937 0 262413 57937 0 ""]
+Rat[262413 57937 0 254903 48951 0 ""]
+Rat[254903 48951 0 258052 48951 0 ""]
+Rat[258052 48951 0 264351 48951 0 ""]
+Rat[264351 48951 0 267500 48951 0 ""]
+Rat[267500 48951 0 270650 48951 0 ""]
+Rat[270650 48951 0 276949 48951 0 ""]
+Rat[276949 48951 0 283248 48951 0 ""]
+Rat[254903 48951 0 246950 44148 0 ""]
+Rat[246950 44148 0 246950 40998 0 ""]
+Rat[171189 94682 0 104798 138180 0 ""]
+Rat[157500 107500 1 150717 66336 0 ""]
+Rat[172500 117500 1 150717 38778 0 ""]
+Rat[167500 107500 1 150717 40746 0 ""]
+Rat[162500 117500 1 150717 64368 0 ""]
+Rat[177500 107500 1 165283 30117 0 ""]
+Rat[60100 140007 0 179063 30117 0 ""]
+Rat[60100 135407 0 177094 30117 0 ""]
+Rat[332608 144595 0 232586 64439 0 ""]
+Rat[232586 64439 0 215282 46652 0 ""]
+Rat[197500 7500 1 200716 30117 0 ""]
+Rat[200716 30117 0 314066 98390 0 ""]
+Rat[200716 30117 0 15854 154013 0 ""]
+Rat[318632 138493 0 232586 69360 0 ""]
+Rat[232586 69360 0 215282 48620 0 ""]
+Rat[202500 17500 1 202684 30117 0 ""]
+Rat[202684 30117 0 308121 102366 0 ""]
+Rat[202684 30117 0 47545 164012 0 ""]
+Rat[166601 158707 0 207500 107500 1 ""]
+Rat[207500 107500 1 184968 94682 0 ""]
+Rat[207500 107500 1 298280 102366 0 ""]
+Rat[298280 102366 0 283248 7850 0 ""]
+Rat[184968 94682 0 28100 33100 0 ""]
+Rat[192500 117500 1 171189 30117 0 ""]
+Rat[150717 44683 0 288051 12653 0 ""]
+Rat[150717 76179 0 119674 148115 0 ""]
Rat[119674 148115 0 87003 146053 0 ""]
-Rat[190000 20000 1 210817 96182 0 ""]
-Rat[177353 31617 0 117312 145753 0 ""]
+Rat[147500 107500 1 215282 44683 0 ""]
+Rat[150717 78147 0 117312 145753 0 ""]
Rat[117312 145753 0 87003 148021 0 ""]
-Rat[185000 10000 1 212785 96182 0 ""]
-Rat[54526 38000 0 160818 83584 0 ""]
-Rat[54652 27900 0 160818 85553 0 ""]
-Rat[108652 60000 0 160818 87521 0 ""]
-Rat[108726 65000 0 169479 96182 0 ""]
-Rat[54626 96707 0 175384 96182 0 ""]
-Rat[54552 87100 0 177353 96182 0 ""]
-Rat[140000 20000 1 225383 54057 0 ""]
-Rat[212785 31617 0 283451 18052 0 ""]
-Rat[169952 132607 0 253452 6950 0 ""]
+Rat[152500 117500 1 215282 42715 0 ""]
+Rat[54526 38000 0 202684 94682 0 ""]
+Rat[54652 27900 0 204653 94682 0 ""]
+Rat[108652 60000 0 206621 94682 0 ""]
+Rat[108726 65000 0 215282 86021 0 ""]
+Rat[54626 96707 0 215282 80116 0 ""]
+Rat[54552 86707 0 215282 78147 0 ""]
+Rat[197500 107500 1 173157 30117 0 ""]
+Rat[150717 42715 0 288051 18952 0 ""]
+Rat[169952 132607 0 258052 7850 0 ""]
Rat[261800 74307 0 256606 66302 0 ""]
Rat[261800 74307 0 137748 159007 0 ""]
-Rat[275000 62500 1 275498 48051 0 ""]
-Rat[275000 62500 1 258652 74307 0 ""]
-Rat[213753 154200 1 259751 6950 0 ""]
+Rat[280000 62500 1 280098 48951 0 ""]
+Rat[280000 62500 1 258652 74307 0 ""]
+Rat[258652 74307 0 190900 167607 0 ""]
+Rat[213753 154200 1 264351 7850 0 ""]
Rat[34800 100507 0 30300 94200 0 ""]
Rat[125100 34007 0 322569 162508 0 ""]
Rat[115700 32007 0 314695 162508 0 ""]
-Rat[174960 153900 0 160818 63900 0 ""]
+Rat[174960 153900 0 183000 94682 0 ""]
Rat[174960 153900 0 273972 166700 0 ""]
+Rat[202760 150652 0 181031 94682 0 ""]
Rat[202760 150652 0 292081 157253 0 ""]
-Rat[202760 150652 0 160818 61931 0 ""]
-Rat[182652 132907 0 191132 96182 0 ""]
+Rat[182652 132907 0 215282 64368 0 ""]
Rat[72100 131807 0 104798 142117 0 ""]
Rat[72100 141707 0 87003 140148 0 ""]
Rat[49802 136254 0 56952 135407 0 ""]
Rat[93048 164207 0 119674 137486 0 ""]
Rat[96196 164207 0 127941 139848 0 ""]
Rat[100200 164407 0 123610 137486 0 ""]
-Rat[202442 107729 0 225383 50120 0 ""]
-Rat[205000 107729 0 225383 48152 0 ""]
+Rat[151535 17202 0 169220 30117 0 ""]
+Rat[148977 17202 0 167252 30117 0 ""]
Rat[75607 114148 0 75407 118152 0 ""]
-Rat[24200 75400 1 242350 30650 0 ""]
+Rat[24200 75400 1 246950 31550 0 ""]
Rat[80907 111400 0 75607 111000 0 ""]
Rat[75607 111000 0 38100 84400 0 ""]
Rat[38100 84400 0 30300 84400 0 ""]
Rat[30300 84400 0 34200 75400 1 ""]
-Rat[80907 111400 0 160000 115000 1 ""]
+Rat[44300 49600 1 177500 7500 1 ""]
Rat[111348 78307 0 109400 83507 0 ""]
Rat[108200 78307 0 29000 44000 3 "via"]
Rat[44900 103207 0 25207 101548 0 ""]
-Rat[44900 103207 0 199883 107729 0 ""]
+Rat[44900 103207 0 154094 17202 0 ""]
Rat[157205 161807 0 158305 148207 0 ""]
Rat[157205 161807 0 172253 165307 0 ""]
-Rat[158305 148207 0 160818 81616 0 ""]
+Rat[158305 148207 0 200716 94682 0 ""]
Layer(1 "top")
(
Line[94300 49600 94300 58900 4000 2000 ""]
Line[6100 95300 21100 101200 1000 2000 "clearline"]
Line[21172 101228 25252 101200 1000 2000 "clearline"]
Line[25252 101200 25600 101548 1000 2000 "clearline"]
- Line[210124 104232 210124 108394 1000 2000 "clearline"]
- Line[210124 108394 210118 108399 1000 2000 "clearline"]
Line[341000 62500 332000 62500 4000 2000 "clearline"]
Line[331000 62300 330800 62500 1000 2000 "clearline"]
Line[330800 58800 330800 62400 1000 2000 "clearline"]
Line[318326 74300 318326 78078 1000 2000 "clearline"]
Line[318326 78078 318348 78100 1000 2000 "clearline"]
Line[313900 76200 318326 76200 1000 2000 "clearline"]
+ Line[139859 17332 139859 24094 1000 2000 "clearline"]
+ Line[139859 24094 139853 24100 1000 2000 "clearline"]
)
Layer(2 "GND plane")
(
Layer(6 "silk")
(
Line[600 125000 299200 125000 1000 2000 "clearline"]
+ Line[170000 2500 120000 2500 1000 2000 "clearline,selected"]
+ Line[120000 2500 120000 0 1000 2000 "clearline,selected"]
+ Line[170000 2500 170000 0 1000 2000 "clearline,selected"]
)
NetList()
(
(
Connect("U4-4")
Connect("U4-5")
+ Connect("U7-86")
)
Net("cs_radio" "(unknown)")
(
Connect("C38-2")
Connect("C39-1")
Connect("C40-1")
+ Connect("C41-1")
Connect("C101-1")
Connect("C102-1")
Connect("C103-1")
(
Connect("A1-1")
Connect("C35-1")
+ Connect("C41-2")
Connect("U10-32")
)
Net("unnamed_net7" "(unknown)")
projects / hw / telemega / commitdiff