declare new version, update copyright yet, etc etc

diff --git a/easymega.sch b/easymega.sch
index eeebc8c173b8bb9ad59430aaf339221d3c88a5b9..586ea2ba8ed70386bc9dfa0f3cc94356cba425fa 100644 (file)
--- a/easymega.sch
+++ b/easymega.sch
@@ -138,13 +138,13 @@ Tolerate up to
 N 68000 43600 67900 43600 4
 N 67900 43600 67900 44000 4
 T 82400 40400 9 10 1 0 0 0 1
-2
+3
 T 80000 40400 9 10 1 0 0 0 1
 1
 T 80600 40400 9 10 1 0 0 0 1
 1
 T 77700 40400 9 10 1 0 0 0 1
-telemega.sch
+easymega.sch
 T 77700 40100 9 10 1 0 0 0 1
 http://altusmetrum.com/EasyMega
 N 78100 57000 77200 57000 4
@@ -335,7 +335,7 @@ T 50295 48670 5 10 0 1 0 0 1
 footprint=PDFN33
 T 50600 48700 5 10 0 0 0 0 1
 slot=1
-T 50600 48700 5 10 1 1 0 0 1
+T 50300 48700 5 10 1 1 0 0 1
 value=TSM200N03D
 T 50600 48700 5 10 0 1 0 0 1
 loadstatus=smt
@@ -350,7 +350,7 @@ T 43995 48670 5 10 0 1 0 0 1
 footprint=PDFN33
 T 44300 48700 5 10 0 0 0 0 1
 slot=2
-T 44300 48700 5 10 1 1 0 0 1
+T 44000 48700 5 10 1 1 0 0 1
 value=TSM200N03D
 T 44300 48700 5 10 0 1 0 0 1
 loadstatus=smt
@@ -665,7 +665,7 @@ T 50295 45270 5 10 0 1 0 0 1
 footprint=PDFN33
 T 50600 45300 5 10 0 0 0 0 1
 slot=2
-T 50600 45300 5 10 1 1 0 0 1
+T 50300 45300 5 10 1 1 0 0 1
 value=TSM200N03D
 T 50600 45300 5 10 0 1 0 0 1
 loadstatus=smt
@@ -680,7 +680,7 @@ T 43995 45270 5 10 0 1 0 0 1
 footprint=PDFN33
 T 44300 45300 5 10 0 0 0 0 1
 slot=1
-T 44300 45300 5 10 1 1 0 0 1
+T 44000 45300 5 10 1 1 0 0 1
 value=TSM200N03D
 T 44300 45300 5 10 0 1 0 0 1
 loadstatus=smt
@@ -831,7 +831,7 @@ T 50295 41870 5 10 0 1 0 0 1
 footprint=PDFN33
 T 50600 41900 5 10 0 0 0 0 1
 slot=1
-T 50600 41900 5 10 1 1 0 0 1
+T 50300 41900 5 10 1 1 0 0 1
 value=TSM200N03D
 T 50600 41900 5 10 0 1 0 0 1
 loadstatus=smt
@@ -846,7 +846,7 @@ T 43995 41870 5 10 0 1 0 0 1
 footprint=PDFN33
 T 44300 41900 5 10 0 0 0 0 1
 slot=2
-T 44300 41900 5 10 1 1 0 0 1
+T 44000 41900 5 10 1 1 0 0 1
 value=TSM200N03D
 T 44300 41900 5 10 0 1 0 0 1
 loadstatus=smt
@@ -1356,8 +1356,8 @@ netname=cs_flash
 }
 N 64300 65500 65600 65500 4
 {
-T 64900 65600 5 10 1 1 0 0 1
-netname=gyro_int
+T 65600 65600 5 10 1 1 0 6 1
+netname=imu_gyro_int
 }
 N 60400 72400 60400 72300 4
 N 53500 64700 54800 64700 4
@@ -1391,8 +1391,8 @@ loadstatus=smt
 }
 N 64300 66300 65600 66300 4
 {
-T 64900 66400 5 10 1 1 0 0 1
-netname=cs_gyro
+T 65600 66400 5 10 1 1 0 6 1
+netname=cs_imu_gyro
 }
 T -30400 -57400 8 10 0 1 0 0 1
 vendor_part_number=MMA7260QT-ND
@@ -1600,7 +1600,7 @@ netname=ba_miso1
 }
 N 64300 66700 65600 66700 4
 {
-T 64800 66800 5 10 1 1 0 0 1
+T 65600 66800 5 10 1 1 0 6 1
 netname=cs_accel
 }
 T -72100 -78700 8 10 0 1 0 0 1
@@ -1976,7 +1976,7 @@ T 55200 72000 5 10 1 1 0 0 1
 refdes=U7
 T 54800 51900 5 10 0 0 0 0 1
 footprint=lqfp64
-T 62900 72000 5 10 1 1 0 0 1
+T 63900 72000 5 10 1 1 0 6 1
 value=STM32L151RBT6
 T 54800 51900 5 10 0 1 0 0 1
 loadstatus=smt
@@ -2075,27 +2075,6 @@ value=NoConnection
 T 64400 64900 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 64300 67000 1 0 0 nc-right.sym
-{
-T 64400 67500 5 10 0 0 0 0 1
-value=NoConnection
-T 64400 67700 5 10 0 0 0 0 1
-device=DRC_Directive
-}
-C 54300 64200 1 0 0 nc-left.sym
-{
-T 54300 64600 5 10 0 0 0 0 1
-value=NoConnection
-T 54300 65000 5 10 0 0 0 0 1
-device=DRC_Directive
-}
-C 54300 62600 1 0 0 nc-left.sym
-{
-T 54300 63000 5 10 0 0 0 0 1
-value=NoConnection
-T 54300 63400 5 10 0 0 0 0 1
-device=DRC_Directive
-}
 C 68900 67400 1 0 0 conn-6.sym
 {
 T 68900 67400 5 10 0 1 0 6 1
@@ -2295,7 +2274,7 @@ T 43595 68595 5 10 0 1 0 0 1
 device=IC
 T 42695 68595 5 10 1 1 0 0 1
 refdes=U3
-T 42400 64400 5 10 1 1 0 0 1
+T 44400 68600 5 10 1 1 0 6 1
 value=ADXL375
 T 42400 64400 5 10 0 1 0 0 1
 loadstatus=smt
@@ -2311,125 +2290,203 @@ T 45750 66700 5 10 1 1 0 6 1
 netname=accel_int1
 }
 N 41400 67800 41400 68200 4
-N 46000 70300 47100 70300 4
+T 77000 40800 9 10 1 0 0 0 2
+                                Copyright 2023 by Bdale Garbee
+Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
+C 42300 62800 1 0 0 3.3V-plus.sym
+C 41800 60900 1 90 0 capacitor.sym
+{
+T 41100 61100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 40900 61100 5 10 0 0 90 0 1
+symversion=0.1
+T 41800 60900 5 10 0 1 0 0 1
+footprint=0402
+T 41500 61500 5 10 1 1 0 6 1
+refdes=C22
+T 41500 61100 5 10 1 1 0 6 1
+value=1uF
+}
+C 42700 60900 1 90 0 capacitor.sym
+{
+T 42000 61100 5 10 0 0 90 0 1
+device=CAPACITOR
+T 41800 61100 5 10 0 0 90 0 1
+symversion=0.1
+T 42700 60900 5 10 0 1 0 0 1
+footprint=0402
+T 42400 61500 5 10 1 1 0 6 1
+refdes=C21
+T 42400 61100 5 10 1 1 0 6 1
+value=10uF
+}
+C 42400 59800 1 0 0 gnd.sym
+N 45200 60200 46600 60200 4
+{
+T 46600 60300 5 10 1 1 0 6 1
+netname=mag_int
+}
+C 42800 60100 1 0 0 MMC5983MA.sym
+{
+T 44895 62850 5 10 0 1 0 6 1
+device=IC
+T 43092 63400 5 10 0 0 0 0 1
+footprint=LPCC16
+T 43105 62845 5 10 1 1 0 0 1
+refdes=U9
+T 44900 62850 5 10 1 1 0 6 1
+value=MMC5983MA
+}
+N 42800 62200 41600 62200 4
+N 41600 62200 41600 61800 4
+N 42500 62800 42500 62200 4
+N 42800 62600 42500 62600 4
+N 42800 61800 42500 61800 4
+N 42500 60900 42500 60100 4
+N 42800 60200 42500 60200 4
+N 42500 60200 41600 60200 4
+N 41600 60200 41600 60900 4
+N 42800 60600 42500 60600 4
+N 46600 62200 45200 62200 4
+{
+T 46550 62300 5 10 1 1 0 6 1
+netname=cs_mag
+}
+N 46600 61800 45200 61800 4
 {
-T 46700 70400 5 10 1 1 0 0 1
+T 46550 61900 5 10 1 1 0 6 1
+netname=mag_miso2
+}
+N 46600 61400 45200 61400 4
+{
+T 46550 61500 5 10 1 1 0 6 1
+netname=mag_mosi2
+}
+N 46600 61000 45200 61000 4
+{
+T 46550 61100 5 10 1 1 0 6 1
+netname=mag_sck2
+}
+N 46600 72700 48100 72700 4
+{
+T 48150 72800 5 10 1 1 0 6 1
 netname=sck2
 }
-N 46000 69900 47100 69900 4
+N 46600 72300 48100 72300 4
 {
-T 46600 70000 5 10 1 1 0 0 1
+T 48150 72400 5 10 1 1 0 6 1
 netname=mosi2
 }
-C 41000 72700 1 0 0 3.3V-plus.sym
-N 41200 72700 43300 72700 4
-C 41400 71800 1 90 0 capacitor.sym
+C 41300 72700 1 0 0 3.3V-plus.sym
+N 41500 72700 44300 72700 4
+C 41700 71800 1 90 0 capacitor.sym
 {
-T 40700 72000 5 10 0 0 90 0 1
+T 41000 72000 5 10 0 0 90 0 1
 device=CAPACITOR
-T 40500 72000 5 10 0 0 90 0 1
+T 40800 72000 5 10 0 0 90 0 1
 symversion=0.1
-T 41400 71800 5 10 0 1 0 0 1
+T 41700 71800 5 10 0 1 0 0 1
 footprint=0402
-T 41100 72500 5 10 1 1 180 0 1
+T 41400 72400 5 10 1 1 0 6 1
 refdes=C301
-T 40700 72000 5 10 1 1 0 0 1
+T 41400 72000 5 10 1 1 0 6 1
 value=0.1uF
-T 41400 71800 5 10 0 1 0 0 1
-loadstatus=smt
 }
-C 42000 71100 1 90 0 capacitor.sym
+C 42400 71000 1 90 0 capacitor.sym
 {
-T 41300 71300 5 10 0 0 90 0 1
+T 41700 71200 5 10 0 0 90 0 1
 device=CAPACITOR
-T 41100 71300 5 10 0 0 90 0 1
+T 41500 71200 5 10 0 0 90 0 1
 symversion=0.1
-T 42000 71100 5 10 0 1 0 0 1
+T 42400 71000 5 10 0 1 0 0 1
 footprint=0402
-T 41700 71800 5 10 1 1 180 0 1
-refdes=C303
-T 41300 71300 5 10 1 1 0 0 1
-value=10nF
-T 42000 71100 5 10 0 1 0 0 1
-loadstatus=smt
-}
-C 42600 70400 1 90 0 capacitor.sym
-{
-T 41900 70600 5 10 0 0 90 0 1
-device=CAPACITOR
-T 41700 70600 5 10 0 0 90 0 1
-symversion=0.1
-T 42600 70400 5 10 0 1 0 0 1
-footprint=0402
-T 42300 71100 5 10 1 1 180 0 1
+T 42100 71600 5 10 1 1 0 6 1
 refdes=C302
-T 41900 70600 5 10 1 1 0 0 1
+T 42100 71200 5 10 1 1 0 6 1
 value=0.1uF
-T 42600 70400 5 10 0 1 0 0 1
-loadstatus=smt
 }
-N 41200 69900 43300 69900 4
-N 41200 69900 41200 71800 4
-C 42500 69600 1 0 0 gnd.sym
-N 46000 71900 47100 71900 4
+N 42800 71100 44300 71100 4
 {
-T 46500 72000 5 10 1 1 0 0 1
-netname=gyro_int
+T 42750 71200 5 10 1 1 0 0 1
+netname=imu_gyro_int
 }
-N 41800 71100 41800 69900 4
-N 42400 71500 42400 71300 4
-N 42400 70400 42400 69900 4
-N 46000 71100 47100 71100 4
+N 44300 72300 42200 72300 4
+N 46600 70700 48100 70700 4
 {
-T 46500 71200 5 10 1 1 0 0 1
-netname=cs_gyro
+T 48150 70800 5 10 1 1 0 6 1
+netname=cs_imu_gyro
 }
-N 46000 70700 47100 70700 4
+N 46600 71900 48100 71900 4
 {
-T 46600 70800 5 10 1 1 0 0 1
+T 48150 72000 5 10 1 1 0 6 1
 netname=miso2
 }
-C 42800 71000 1 0 0 nc-left.sym
+C 44300 69700 1 0 0 BMI088.sym
 {
-T 42800 71400 5 10 0 0 0 0 1
+T 44595 73395 5 10 0 0 0 0 1
+footprint=lga16
+T 44605 73695 5 10 0 0 0 0 1
+device=IC
+T 46305 73095 5 10 1 1 0 6 1
+value=BMI088
+T 44595 73095 5 10 1 1 0 0 1
+refdes=U12
+}
+C 44100 69500 1 0 0 gnd.sym
+N 44300 70300 44200 70300 4
+N 44200 70300 44200 69800 4
+N 44300 69900 44200 69900 4
+N 42200 71900 42200 72700 4
+N 42200 71000 42200 69900 4
+N 41500 69900 44200 69900 4
+N 41500 71800 41500 69900 4
+N 46600 71500 46800 71500 4
+N 46800 71500 46800 71900 4
+N 46600 71100 48100 71100 4
+{
+T 48150 71200 5 10 1 1 0 6 1
+netname=cs_imu_accel
+}
+C 46600 69500 1 0 0 gnd.sym
+N 46600 70300 46700 70300 4
+N 46700 70300 46700 69800 4
+N 46600 69900 46700 69900 4
+C 43800 71400 1 0 0 nc-left.sym
+{
+T 43800 71800 5 10 0 0 0 0 1
 value=NoConnection
-T 42800 71800 5 10 0 0 0 0 1
+T 43800 72200 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 42800 70600 1 0 0 nc-left.sym
+C 43800 70600 1 0 0 nc-left.sym
 {
-T 42800 71000 5 10 0 0 0 0 1
+T 43800 71000 5 10 0 0 0 0 1
 value=NoConnection
-T 42800 71400 5 10 0 0 0 0 1
+T 43800 71400 5 10 0 0 0 0 1
 device=DRC_Directive
 }
-C 43300 69700 1 0 0 MPU9250.sym
+N 42800 71900 44300 71900 4
 {
-T 44595 71895 5 10 0 1 0 0 1
-device=IC
-T 43300 69700 5 10 0 1 0 0 1
-footprint=ufqfpn24
-T 43595 73095 5 10 1 1 0 0 1
-refdes=U12
-T 44795 73095 5 10 1 1 0 0 1
-value=MPU-9250
-}
-N 43300 70300 43100 70300 4
-N 43100 70300 43100 69900 4
-N 43300 71500 42400 71500 4
-N 41800 72300 43300 72300 4
-N 41800 72000 41800 72700 4
-N 43300 71900 43100 71900 4
-N 43100 71900 43100 72300 4
-C 47600 72000 1 0 0 gnd.sym
-N 46000 72300 47700 72300 4
-T 77500 40800 9 10 1 0 0 0 2
-                          Copyright 2018 by Bdale Garbee
-Licensed under the TAPR Open Hardware License, http://www.tapr.org/OHL
-C 64300 65800 1 0 0 nc-right.sym
+T 42750 72000 5 10 1 1 0 0 1
+netname=imu_accel_int
+}
+N 64300 65900 65600 65900 4
 {
-T 64400 66300 5 10 0 0 0 0 1
-value=NoConnection
-T 64400 66500 5 10 0 0 0 0 1
-device=DRC_Directive
+T 65600 66000 5 10 1 1 0 6 1
+netname=cs_imu_accel
+}
+N 64300 67100 65600 67100 4
+{
+T 65600 67200 5 10 1 1 0 6 1
+netname=imu_accel_int
+}
+N 53500 64300 54800 64300 4
+{
+T 53500 64400 5 10 1 1 0 0 1
+netname=cs_mag
+}
+N 53500 62700 54800 62700 4
+{
+T 53500 62800 5 10 1 1 0 0 1
+netname=mag_int
 }