altos/stm: Interrupt priority is in the upper bits of the priority mask
authorKeith Packard <keithp@keithp.com>
Mon, 21 Nov 2016 04:54:10 +0000 (20:54 -0800)
committerKeith Packard <keithp@keithp.com>
Mon, 21 Nov 2016 04:54:10 +0000 (20:54 -0800)
Because the STM32L only offers 16 priority levels, the bottom four
bits of each priority mask are not used. All of the interrupt priority
settings in the system were using values < 16, making them all
effectively the same. Fix that by moving them into the upper 4 bits
and using symbolic constants everywhere.

Signed-off-by: Keith Packard <keithp@keithp.com>
src/stm/ao_arch.h
src/stm/ao_dma_stm.c
src/stm/ao_exti_stm.c
src/stm/ao_serial_stm.c
src/stm/ao_timer.c
src/stm/ao_usb_stm.c

index 1527014ab46e22999a486caab25f299a4f1ce57b..3a794e5a6adabc3c22d0d22affff90371d9488ef 100644 (file)
@@ -119,10 +119,19 @@ extern const uint32_t ao_radio_cal;
 #define AO_TIM91011_CLK                (2 * AO_PCLK2)
 #endif
 
-#define AO_STM_NVIC_HIGH_PRIORITY      4
-#define AO_STM_NVIC_CLOCK_PRIORITY     6
-#define AO_STM_NVIC_MED_PRIORITY       8
-#define AO_STM_NVIC_LOW_PRIORITY       10
+/* The stm32l implements only 4 bits of the priority fields */
+
+#define AO_STM_NVIC_NON_MASK_PRIORITY  0x00
+
+/* Set the basepri register to this value to mask all
+ * non-maskable priorities
+ */
+#define AO_STM_NVIC_BASEPRI_MASK       0x10
+
+#define AO_STM_NVIC_HIGH_PRIORITY      0x40
+#define AO_STM_NVIC_MED_PRIORITY       0x80
+#define AO_STM_NVIC_LOW_PRIORITY       0xC0
+#define AO_STM_NVIC_CLOCK_PRIORITY     0xf0
 
 void ao_lcd_stm_init(void);
 
index a24c6d3a7e2c7078bfcb1afc529b56902b4b67ba..962b3acc57b2824a7f79fe768a721bd8dcb633e5 100644 (file)
@@ -191,7 +191,8 @@ ao_dma_init(void)
                }
 #endif
                stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
-               stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index, 4);
+               stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index,
+                                     AO_STM_NVIC_MED_PRIORITY);
                ao_dma_allocated[index] = 0;
                ao_dma_mutex[index] = 0;
        }
index 3e0b3e5c84e29953833bdf235503c68932504f98..2491b609893607b2a340a455be93f59c513f860b 100644 (file)
@@ -123,7 +123,7 @@ ao_exti_set_mode(struct stm_gpio *gpio, uint8_t pin, uint8_t mode) {
        (void) gpio;
 
        uint32_t        mask = 1 << pin;
-       
+
        if (mode & AO_EXTI_MODE_RISING)
                stm_exti.rtsr |= mask;
        else
index db0be992b4fbf65d90a455dbeef5d9cc122613f3..c625471e4b1e9ce39caaf6b7c17a346be76e6953 100644 (file)
@@ -444,7 +444,7 @@ ao_serial_init(void)
        ao_usart_init(&ao_stm_usart1);
 
        stm_nvic_set_enable(STM_ISR_USART1_POS);
-       stm_nvic_set_priority(STM_ISR_USART1_POS, 4);
+       stm_nvic_set_priority(STM_ISR_USART1_POS, AO_STM_NVIC_MED_PRIORITY);
 #if USE_SERIAL_1_STDIN && !DELAY_SERIAL_1_STDIN
        ao_add_stdio(_ao_serial1_pollchar,
                     ao_serial1_putchar,
@@ -500,7 +500,7 @@ ao_serial_init(void)
 #endif
 
        stm_nvic_set_enable(STM_ISR_USART2_POS);
-       stm_nvic_set_priority(STM_ISR_USART2_POS, 4);
+       stm_nvic_set_priority(STM_ISR_USART2_POS, AO_STM_NVIC_MED_PRIORITY);
 #if USE_SERIAL_2_STDIN && !DELAY_SERIAL_2_STDIN
        ao_add_stdio(_ao_serial2_pollchar,
                     ao_serial2_putchar,
@@ -544,7 +544,7 @@ ao_serial_init(void)
        ao_usart_init(&ao_stm_usart3);
 
        stm_nvic_set_enable(STM_ISR_USART3_POS);
-       stm_nvic_set_priority(STM_ISR_USART3_POS, 4);
+       stm_nvic_set_priority(STM_ISR_USART3_POS, AO_STM_NVIC_MED_PRIORITY);
 #if USE_SERIAL_3_STDIN && !DELAY_SERIAL_3_STDIN
        ao_add_stdio(_ao_serial3_pollchar,
                     ao_serial3_putchar,
index b25dbd1acf071145f58b5c03745337db083db511..a641eb2a7656e147ddd216fab0c92decea12a1ab 100644 (file)
@@ -42,7 +42,6 @@ volatile __data uint8_t       ao_data_count;
 
 void stm_systick_isr(void)
 {
-       ao_arch_release_interrupts();
        ao_validate_cur_stack();
        ++ao_tick_count;
 #if HAS_TASK_QUEUE
@@ -89,7 +88,7 @@ ao_timer_init(void)
        stm_systick.csr = ((1 << STM_SYSTICK_CSR_ENABLE) |
                           (1 << STM_SYSTICK_CSR_TICKINT) |
                           (STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 << STM_SYSTICK_CSR_CLKSOURCE));
-       stm_nvic.shpr15_12 |= 0xff << 24;
+       stm_nvic.shpr15_12 |= AO_STM_NVIC_CLOCK_PRIORITY << 24;
 }
 
 #endif
index 0de501ab5cfac7a05adcf8498e965021add0faf4..e4414084c5c61878c6b2c64db08e24c3474ff442 100644 (file)
@@ -1015,7 +1015,7 @@ ao_usb_enable(void)
        ao_arch_block_interrupts();
 
        /* Route interrupts */
-       stm_nvic_set_priority(STM_ISR_USB_LP_POS, 3);
+       stm_nvic_set_priority(STM_ISR_USB_LP_POS, AO_STM_NVIC_LOW_PRIORITY);
        stm_nvic_set_enable(STM_ISR_USB_LP_POS);
 
        ao_usb_configuration = 0;
@@ -1109,7 +1109,7 @@ struct ao_usb_dbg {
        int             line;
        char            *msg;
        uint32_t        value;
-       uint32_t        primask;
+       uint32_t        basepri;
 #if TX_DBG
        uint16_t        in_count;
        uint32_t        in_epr;
@@ -1125,19 +1125,19 @@ struct ao_usb_dbg {
 #endif
 };
 
-#define NUM_USB_DBG    128
+#define NUM_USB_DBG    16
 
-static struct ao_usb_dbg dbg[128];
+static struct ao_usb_dbg dbg[NUM_USB_DBG];
 static int dbg_i;
 
 static void _dbg(int line, char *msg, uint32_t value)
 {
-       uint32_t        primask;
+       uint32_t        basepri;
        dbg[dbg_i].line = line;
        dbg[dbg_i].msg = msg;
        dbg[dbg_i].value = value;
-       asm("mrs %0,primask" : "=&r" (primask));
-       dbg[dbg_i].primask = primask;
+       asm("mrs %0,basepri" : "=&r" (basepri));
+       dbg[dbg_i].basepri = basepri;
 #if TX_DBG
        dbg[dbg_i].in_count = in_count;
        dbg[dbg_i].in_epr = stm_usb.epr[AO_USB_IN_EPR];