*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
/* Buffer description tables */
static union stm_usb_bdt *ao_usb_bdt;
/* USB address of end of allocated storage */
+#if AO_USB_DIRECTIO
static uint16_t ao_usb_sram_addr;
+#endif
/* Pointer to ep0 tx/rx buffers in USB memory */
static uint16_t *ao_usb_ep0_tx_buffer;
static uint16_t *ao_usb_ep0_rx_buffer;
+#if AO_USB_HAS_INT
/* Pointer to interrupt buffer in USB memory */
static uint16_t ao_usb_int_tx_offset;
+#endif
/* Pointer to bulk data tx/rx buffers in USB memory */
-static uint16_t ao_usb_in_tx_offset;
-static uint16_t *ao_usb_in_tx_buffer;
+#if AO_USB_HAS_IN
+static uint16_t ao_usb_in_tx_offset[2];
+static uint16_t *ao_usb_in_tx_buffer[2];
+static uint8_t ao_usb_in_tx_which;
+static uint8_t ao_usb_tx_count;
+
+#endif
+#if AO_USB_HAS_OUT
static uint16_t ao_usb_out_rx_offset;
static uint16_t *ao_usb_out_rx_buffer;
/* System ram shadow of USB buffer; writing individual bytes is
* too much of a pain (sigh) */
-static uint8_t ao_usb_tx_buffer[AO_USB_IN_SIZE];
-static uint8_t ao_usb_tx_count;
-
static uint8_t ao_usb_rx_buffer[AO_USB_OUT_SIZE];
static uint8_t ao_usb_rx_count, ao_usb_rx_pos;
+#endif
+#if AO_USB_HAS_IN2
+static uint16_t ao_usb_in2_tx_offset[2];
+static uint16_t *ao_usb_in2_tx_buffer[2];
+static uint8_t ao_usb_in_tx2_which;
+static uint8_t ao_usb_tx2_count;
+#endif
+
/*
* End point register indices
*/
#define AO_USB_INT_EPR 1
#define AO_USB_OUT_EPR 2
#define AO_USB_IN_EPR 3
+#define AO_USB_IN2_EPR 4
/* Marks when we don't need to send an IN packet.
* This happens only when the last IN packet is not full,
*/
static uint8_t ao_usb_in_pending;
+#if AO_USB_HAS_IN2
+/* Marks when we have delivered an IN packet to the hardware
+ * and it has not been received yet. ao_sleep on this address
+ * to wait for it to be delivered.
+ */
+static uint8_t ao_usb_in2_pending;
+static uint16_t in2_count;
+static uint8_t ao_usb_in2_flushed;
+#endif
+
/* Marks when an OUT packet has been received by the hardware
* but not pulled to the shadow buffer.
*/
static inline uint16_t *ao_usb_packet_buffer_addr(uint16_t sram_addr)
{
- return (uint16_t *) (stm_usb_sram + sram_addr);
+ return (uint16_t *) (void *) (stm_usb_sram + sram_addr);
}
static inline uint16_t ao_usb_packet_buffer_offset(uint16_t *addr)
static void
ao_usb_alloc_buffers(void)
{
- ao_usb_sram_addr = 0;
+ uint16_t sram_addr = 0;
ao_usb_bdt = (void *) stm_usb_sram;
- ao_usb_sram_addr += 8 * STM_USB_BDT_SIZE;
+ sram_addr += 8 * STM_USB_BDT_SIZE;
+
+ ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(sram_addr);
+ sram_addr += AO_USB_CONTROL_SIZE;
+
+ ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(sram_addr);
+ sram_addr += AO_USB_CONTROL_SIZE;
- ao_usb_ep0_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
- ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
- ao_usb_ep0_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
- ao_usb_sram_addr += AO_USB_CONTROL_SIZE;
+#if AO_USB_HAS_INT
+ sram_addr += (sram_addr & 1);
+ ao_usb_int_tx_offset = sram_addr;
+ sram_addr += AO_USB_INT_SIZE;
+#endif
- ao_usb_int_tx_offset = ao_usb_sram_addr;
- ao_usb_sram_addr += AO_USB_INT_SIZE;
+#if AO_USB_HAS_OUT
+ sram_addr += (sram_addr & 1);
+ ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(sram_addr);
+ ao_usb_out_rx_offset = sram_addr;
+ sram_addr += AO_USB_OUT_SIZE;
+#endif
- ao_usb_out_rx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
- ao_usb_out_rx_offset = ao_usb_sram_addr;
- ao_usb_sram_addr += AO_USB_OUT_SIZE;
+#if AO_USB_HAS_IN
+ sram_addr += (sram_addr & 1);
+ ao_usb_in_tx_buffer[0] = ao_usb_packet_buffer_addr(sram_addr);
+ ao_usb_in_tx_offset[0] = sram_addr;
+ sram_addr += AO_USB_IN_SIZE;
+ ao_usb_in_tx_buffer[1] = ao_usb_packet_buffer_addr(sram_addr);
+ ao_usb_in_tx_offset[1] = sram_addr;
+ sram_addr += AO_USB_IN_SIZE;
+ ao_usb_in_tx_which = 0;
+#endif
- ao_usb_in_tx_buffer = ao_usb_packet_buffer_addr(ao_usb_sram_addr);
- ao_usb_in_tx_offset = ao_usb_sram_addr;
- ao_usb_sram_addr += AO_USB_IN_SIZE;
+#if AO_USB_HAS_IN2
+ sram_addr += (sram_addr & 1);
+ ao_usb_in2_tx_buffer[0] = ao_usb_packet_buffer_addr(sram_addr);
+ ao_usb_in2_tx_offset[0] = sram_addr;
+ sram_addr += AO_USB_IN_SIZE;
+
+ sram_addr += (sram_addr & 1);
+ ao_usb_in2_tx_buffer[1] = ao_usb_packet_buffer_addr(sram_addr);
+ ao_usb_in2_tx_offset[1] = sram_addr;
+ sram_addr += AO_USB_IN_SIZE;
+ ao_usb_in2_tx_which = 0;
+#endif
+
+#if AO_USB_DIRECTIO
+ sram_addr += (sram_addr & 1);
+ ao_usb_sram_addr = sram_addr;
+#endif
}
static void
ao_usb_set_address(0);
ao_usb_running = 0;
+
+ /* Reset our internal state
+ */
+
+ ao_usb_ep0_state = AO_USB_EP0_IDLE;
+
+ ao_usb_ep0_in_data = NULL;
+ ao_usb_ep0_in_len = 0;
+
+ ao_usb_ep0_out_data = 0;
+ ao_usb_ep0_out_len = 0;
}
static void
#if AO_USB_HAS_IN
/* Set up the IN end point */
- ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_in_tx_offset;
+ ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = 0;
ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = 0;
ao_usb_init_ep(AO_USB_IN_EPR,
STM_USB_EPR_STAT_TX_NAK);
#endif
+#if AO_USB_HAS_IN2
+ /* Set up the IN2 end point */
+ ao_usb_bdt[AO_USB_IN2_EPR].single.addr_tx = 0;
+ ao_usb_bdt[AO_USB_IN2_EPR].single.count_tx = 0;
+
+ ao_usb_init_ep(AO_USB_IN2_EPR,
+ AO_USB_IN2_EP,
+ STM_USB_EPR_EP_TYPE_BULK,
+ STM_USB_EPR_STAT_RX_DISABLED,
+ STM_USB_EPR_STAT_TX_NAK);
+#endif
+
+ ao_usb_in_flushed = 0;
+ ao_usb_in_pending = 0;
+ ao_wakeup(&ao_usb_in_pending);
+#if AO_USB_HAS_IN2
+ ao_usb_in2_flushed = 0;
+ ao_usb_in2_pending = 0;
+ ao_wakeup(&ao_usb_in2_pending);
+#endif
+
+ ao_usb_out_avail = 0;
+ ao_usb_configuration = 0;
+
+ ao_wakeup(AO_USB_OUT_SLEEP_ADDR);
+
ao_usb_running = 1;
#if AO_USB_DIRECTIO
ao_wakeup(&ao_usb_running);
#endif
}
+#if USB_STATUS
static uint16_t control_count;
static uint16_t int_count;
static uint16_t in_count;
static uint16_t out_count;
static uint16_t reset_count;
+#endif
/* The USB memory must be accessed in 16-bit units
*/
*dst = *base;
}
+static uint8_t
+ao_usb_tx_byte(uint16_t *base, uint8_t tx_count, char byte)
+{
+ if (tx_count & 1)
+ base[tx_count >> 1] |= ((uint16_t) byte) << 8;
+ else
+ base[tx_count >> 1] = (uint16_t) (uint8_t) byte;
+ return tx_count + 1;
+}
+
/* Send an IN data packet */
static void
ao_usb_ep0_flush(void)
ao_usb_ep0_flush();
}
-static struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
+struct ao_usb_line_coding ao_usb_line_coding = {115200, 0, 0, 8};
+
+#if AO_USB_DEVICE_ID_SERIAL
+static uint8_t ao_usb_serial[2 + 48];
+
+/* Convert a 32-bit value to 8 hexidecimal UCS2 characters */
+static void
+hex_to_ucs2(uint32_t in, uint8_t *out)
+{
+ int i;
+
+ for (i = 28; i >= 0; i -= 4) {
+ uint8_t bits = (in >> i) & 0xf;
+ *out++ = ((bits < 10) ? '0' : ('a' - 10)) + bits;
+ *out++ = 0;
+ }
+}
+
+/* Encode the device ID (96 bits) in hexidecimal to use as a device
+ * serial number
+ */
+static void
+ao_usb_serial_init(void)
+{
+ ao_usb_serial[0] = 50; /* length */
+ ao_usb_serial[1] = AO_USB_DESC_STRING;
+ hex_to_ucs2(stm_device_id.u_id0, ao_usb_serial + 2 + 0);
+ hex_to_ucs2(stm_device_id.u_id1, ao_usb_serial + 2 + 16);
+ hex_to_ucs2(stm_device_id.u_id2, ao_usb_serial + 2 + 32);
+}
+#endif
/* Walk through the list of descriptors and find a match
*/
static void
-ao_usb_get_descriptor(uint16_t value)
+ao_usb_get_descriptor(uint16_t value, uint16_t length)
{
const uint8_t *descriptor;
uint8_t type = value >> 8;
len = descriptor[2];
else
len = descriptor[0];
+#if AO_USB_DEVICE_ID_SERIAL
+ /* Slightly hacky - the serial number is string 3 */
+ if (type == AO_USB_DESC_STRING && (value & 0xff) == 3) {
+ descriptor = ao_usb_serial;
+ len = sizeof (ao_usb_serial);
+ }
+#endif
+ if (len > length)
+ len = length;
ao_usb_ep0_in_set(descriptor, len);
break;
}
break;
case AO_USB_REQ_GET_DESCRIPTOR:
debug ("get descriptor %d\n", ao_usb_setup.value);
- ao_usb_get_descriptor(ao_usb_setup.value);
+ ao_usb_get_descriptor(ao_usb_setup.value, ao_usb_setup.length);
break;
case AO_USB_REQ_GET_CONFIGURATION:
debug ("get configuration %d\n", ao_usb_configuration);
switch (ep) {
case 0:
+#if USB_STATUS
++control_count;
+#endif
if (ao_usb_epr_ctr_rx(epr)) {
if (ao_usb_epr_setup(epr))
ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
ao_usb_ep0_handle(ao_usb_ep0_receive);
break;
case AO_USB_OUT_EPR:
+#if USB_STATUS
++out_count;
+#endif
if (ao_usb_epr_ctr_rx(epr)) {
_rx_dbg1("RX ISR", epr);
ao_usb_out_avail = 1;
}
break;
case AO_USB_IN_EPR:
+#if USB_STATUS
++in_count;
+#endif
_tx_dbg1("TX ISR", epr);
if (ao_usb_epr_ctr_tx(epr)) {
ao_usb_in_pending = 0;
ao_wakeup(&ao_usb_in_pending);
}
break;
+#if AO_USB_HAS_IN2
+ case AO_USB_IN2_EPR:
+ ++in2_count;
+ _tx_dbg1("TX2 ISR", epr);
+ if (ao_usb_epr_ctr_tx(epr)) {
+ ao_usb_in2_pending = 0;
+ ao_wakeup(&ao_usb_in2_pending);
+ }
+ break;
+#endif
case AO_USB_INT_EPR:
+#if USB_STATUS
++int_count;
+#endif
if (ao_usb_epr_ctr_tx(epr))
_ao_usb_set_stat_tx(AO_USB_INT_EPR, STM_USB_EPR_STAT_TX_NAK);
break;
}
if (istr & (1 << STM_USB_ISTR_RESET)) {
+#if USB_STATUS
++reset_count;
+#endif
debug ("\treset\n");
ao_usb_set_ep0();
}
#endif
}
+#if AO_USB_HAS_IN
/* Queue the current IN buffer for transmission */
static void
_ao_usb_in_send(void)
ao_usb_in_pending = 1;
if (ao_usb_tx_count != AO_USB_IN_SIZE)
ao_usb_in_flushed = 1;
- ao_usb_copy_tx(ao_usb_tx_buffer, ao_usb_in_tx_buffer, ao_usb_tx_count);
- ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_in_tx_offset;
+ ao_usb_bdt[AO_USB_IN_EPR].single.addr_tx = ao_usb_in_tx_offset[ao_usb_in_tx_which];
ao_usb_bdt[AO_USB_IN_EPR].single.count_tx = ao_usb_tx_count;
ao_usb_tx_count = 0;
+ ao_usb_in_tx_which = 1 - ao_usb_in_tx_which;
_ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
_tx_dbg0("in_send end");
}
_ao_usb_in_wait();
ao_usb_in_flushed = 0;
- ao_usb_tx_buffer[ao_usb_tx_count++] = (uint8_t) c;
+ ao_usb_tx_count = ao_usb_tx_byte(ao_usb_in_tx_buffer[ao_usb_in_tx_which], ao_usb_tx_count, c);
/* Send the packet when full */
if (ao_usb_tx_count == AO_USB_IN_SIZE) {
}
ao_arch_release_interrupts();
}
+#endif
+
+#if AO_USB_HAS_IN2
+/* Queue the current IN buffer for transmission */
+static void
+_ao_usb_in2_send(void)
+{
+ _tx_dbg0("in2_send start");
+ debug ("send2 %d\n", ao_usb_tx_count);
+ while (ao_usb_in2_pending)
+ ao_sleep(&ao_usb_in2_pending);
+ ao_usb_in2_pending = 1;
+ if (ao_usb_tx2_count != AO_USB_IN_SIZE)
+ ao_usb_in2_flushed = 1;
+ ao_usb_bdt[AO_USB_IN2_EPR].single.addr_tx = ao_usb_in2_tx_offset[ao_usb_in2_tx_which];
+ ao_usb_bdt[AO_USB_IN2_EPR].single.count_tx = ao_usb_tx2_count;
+ ao_usb_tx2_count = 0;
+ ao_usb_in2_tx_which = 1 - ao_usb_in2_tx_which;
+ _ao_usb_set_stat_tx(AO_USB_IN2_EPR, STM_USB_EPR_STAT_TX_VALID);
+ _tx_dbg0("in2_send end");
+}
+
+/* Wait for a free IN buffer. Interrupts are blocked */
+static void
+_ao_usb_in2_wait(void)
+{
+ for (;;) {
+ /* Check if the current buffer is writable */
+ if (ao_usb_tx2_count < AO_USB_IN_SIZE)
+ break;
+
+ _tx_dbg0("in2_wait top");
+ /* Wait for an IN buffer to be ready */
+ while (ao_usb_in2_pending)
+ ao_sleep(&ao_usb_in2_pending);
+ _tx_dbg0("in_wait bottom");
+ }
+}
+
+void
+ao_usb_flush2(void)
+{
+ if (!ao_usb_running)
+ return;
+
+ /* Anytime we've sent a character since
+ * the last time we flushed, we'll need
+ * to send a packet -- the only other time
+ * we would send a packet is when that
+ * packet was full, in which case we now
+ * want to send an empty packet
+ */
+ ao_arch_block_interrupts();
+ while (!ao_usb_in2_flushed) {
+ _tx_dbg0("flush2 top");
+ _ao_usb_in2_send();
+ _tx_dbg0("flush2 end");
+ }
+ ao_arch_release_interrupts();
+}
+
+void
+ao_usb_putchar2(char c)
+{
+ if (!ao_usb_running)
+ return;
+
+ ao_arch_block_interrupts();
+ _ao_usb_in2_wait();
+
+ ao_usb_in2_flushed = 0;
+ ao_usb_tx2_count = ao_usb_tx_byte(ao_usb_in2_tx_buffer[ao_usb_in2_tx_which], ao_usb_tx2_count, c);
+
+ /* Send the packet when full */
+ if (ao_usb_tx2_count == AO_USB_IN_SIZE) {
+ _tx_dbg0("putchar2 full");
+ _ao_usb_in2_send();
+ _tx_dbg0("putchar2 flushed");
+ }
+ ao_arch_release_interrupts();
+}
+#endif
+#if AO_USB_HAS_OUT
static void
_ao_usb_out_recv(void)
{
ao_arch_release_interrupts();
return c;
}
+#endif
#if AO_USB_DIRECTIO
uint16_t *
return buffer;
}
-void
-ao_usb_free(uint16_t *addr)
-{
- uint16_t offset = ao_usb_packet_buffer_offset(addr);
- if (offset < ao_usb_sram_addr)
- ao_usb_sram_addr = offset;
-}
-
void
ao_usb_write(uint16_t *buffer, uint16_t len)
{
_ao_usb_set_stat_tx(AO_USB_IN_EPR, STM_USB_EPR_STAT_TX_VALID);
ao_arch_release_interrupts();
}
+
+#if AO_USB_HAS_IN2
+void
+ao_usb_write2(uint16_t *buffer, uint16_t len)
+{
+ ao_arch_block_interrupts();
+
+ /* Wait for everything to be ready at the same time */
+ for (;;) {
+ /* Make sure USB is connected */
+ if (!ao_usb_running) {
+ ao_sleep(&ao_usb_running);
+ continue;
+ }
+
+ /* Flush any pending regular I/O */
+ if (ao_usb_tx2_count) {
+ _ao_usb_in2_send();
+ continue;
+ }
+
+ /* Wait for an idle IN buffer */
+ if (ao_usb_in2_pending) {
+ ao_sleep(&ao_usb_in2_pending);
+ continue;
+ }
+ break;
+ }
+
+ ao_usb_in2_pending = 1;
+ ao_usb_in2_flushed = (len != AO_USB_IN_SIZE);
+ ao_usb_bdt[AO_USB_IN2_EPR].single.addr_tx = ao_usb_packet_buffer_offset(buffer);
+ ao_usb_bdt[AO_USB_IN2_EPR].single.count_tx = len;
+ _ao_usb_set_stat_tx(AO_USB_IN2_EPR, STM_USB_EPR_STAT_TX_VALID);
+ ao_arch_release_interrupts();
+}
+#endif
#endif
void
/* Set PA11/PA12 remapping bit */
stm_syscfg.cfgr1 |= (AO_PA11_PA12_RMP << STM_SYSCFG_CFGR1_PA11_PA12_RMP);
+#ifndef AO_USB_START_DISABLED
ao_usb_enable();
+#endif
+
+#if AO_USB_DEVICE_ID_SERIAL
+ ao_usb_serial_init();
+#endif
debug ("ao_usb_init\n");
ao_usb_ep0_state = AO_USB_EP0_IDLE;
projects / fw / altos / blobdiff